Patents by Inventor Ran Yan

Ran Yan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140357028
    Abstract: A method for fabricating an integrated circuit includes forming a first gate electrode structure above a first active region and a second gate electrode structure above a second active region, forming a sacrificial spacer on sidewalls of the first and second gate electrode structures, and forming deep drain and source regions selectively in the first and second active regions by using the sacrificial spacer as an implantation mask. The method further includes forming drain and source extension and halo regions in the first and second active regions after removal of the sacrificial spacer and forming a fluorine implant region in the halo region of the first active region before or after formation of the drain and source extension and halo regions.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 4, 2014
    Inventors: Nicolas Sassiat, Shiang Yang Ong, Ran Yan, Torben Balzer
  • Publication number: 20140342514
    Abstract: A method for fabricating an integrated circuit includes forming a first gate electrode structure above a first active region and a second gate electrode structure above a second active region, forming a sacrificial spacer on sidewalls of the first and second gate electrode structures, and forming deep drain and source regions selectively in the first and second active regions by using the sacrificial spacer as an implantation mask. The method further includes forming drain and source extension and halo regions in the first and second active regions after removal of the sacrificial spacer and forming a nitrogen implant region in the halo region of the first active region after formation of the drain and source extension and halo regions.
    Type: Application
    Filed: May 17, 2013
    Publication date: November 20, 2014
    Inventors: Ran Yan, Jan Hoentschel, Shiang Yang Ong
  • Publication number: 20140264347
    Abstract: When forming cavities in active regions of semiconductor devices in order to incorporate a strain-inducing semiconductor material, an improved shape of the cavities may be achieved by using an amorphization process and a heat treatment so as to selectively modify the etch behavior of exposed portions of the active regions and to adjust the shape of the amorphous regions. In this manner, the basic configuration of the cavities may be adjusted with a high degree of flexibility. Consequently, the efficiency of the strain-inducing technique may be improved.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Nicolas Sassiat, Carsten Grass, Jan Hoentschel, Ran Yan, Ralf Richter
  • Publication number: 20140264484
    Abstract: Methods for forming P-type channel metal-oxide-semiconductor field effect transistors (PMOSFETs) with improved interface roughness at the channel silicon-germanium (cSiGe) layer and the resulting devices are disclosed. Embodiments may include designating a region in a substrate as a channel region, forming a cSiGe layer above the designated channel region, and implanting fluorine directly into the cSiGe layer. Embodiments may alternatively include implanting fluorine into a region in a silicon substrate designated a channel region, forming a cSiGe layer above the designated channel region, and heating the silicon substrate and the cSiGe layer to diffuse the fluorine into the cSiGe layer.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Nicolas SASSIAT, Ran Yan, Jan Hoentschel, Shiang Yang Ong
  • Publication number: 20140264626
    Abstract: The present disclosure provides, in some aspects, a gate electrode structure for a semiconductor device. In some illustrative embodiments herein, the gate electrode structure includes a first high-k dielectric layer over a first active region of a semiconductor substrate and a second high-k dielectric layer on the first high-k dielectric layer. The first high-k dielectric layer has a metal species incorporated therein for adjusting the work function of the first high-k dielectric layer.
    Type: Application
    Filed: February 6, 2014
    Publication date: September 18, 2014
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Ran Yan, Alban Zaka, Nicolas Sassiat, Jan Hoentschel, Martin Trentzsch, Carsten Grass
  • Publication number: 20140256097
    Abstract: A method for forming a semiconductor device is provided which includes providing a gate structure in an active region of a semiconductor substrate, wherein the gate structure includes a gate insulating layer having a high-k material, a gate metal layer and a gate electrode layer, forming sidewall spacers adjacent to the gate structure and, thereafter, performing a fluorine implantation process. Also a method for forming a CMOS integrated circuit structure is provided which includes providing a semiconductor substrate with a first active region and a second active region, forming a first gate structure in the first active region and a second gate structure in the second active region, wherein each gate structure includes a gate insulating layer having a high-k material, a gate metal layer and a gate electrode layer, forming sidewall spacers adjacent to each of the first and second gate structures and, thereafter, performing a fluorine implantation process.
    Type: Application
    Filed: March 5, 2013
    Publication date: September 11, 2014
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Ran Yan, Nicolas Sassiat, Jan Hoentschel, Torben Balzer
  • Publication number: 20140197498
    Abstract: Integrated circuits and methods for fabricating integrated circuits are provided herein. In an embodiment, a method for fabricating an integrated circuit includes forming over a semiconductor substrate a gate structure. The method further includes depositing a non-conformal spacer material around the gate structure. A protection mask is formed over the non-conformal spacer material. The method etches the non-conformal spacer material and protection mask to form a salicidation spacer. Further, a self-aligned silicide contact is formed adjacent the salicidation spacer.
    Type: Application
    Filed: January 14, 2013
    Publication date: July 17, 2014
    Applicant: GLOBALFOUNDRIES, INC.
    Inventors: Jan Hoentschel, Stefan Flachowsky, Nicolas Sasiat, Ran Yan
  • Publication number: 20140103449
    Abstract: A method of fabricating a semiconductor device with improved Vt and the resulting device are disclosed. Embodiments include forming an HKMG stack on a substrate; implanting dopants in active regions of the substrate; and performing an RTA in an environment of nitrogen and no more than 30% oxygen.
    Type: Application
    Filed: October 11, 2012
    Publication date: April 17, 2014
    Applicant: GlobalFoundries Singapore Pte. Ltd.
    Inventors: Jan HOENTSCHEL, Shiang Yang Ong, Ran Yan
  • Publication number: 20130209361
    Abstract: The present invention relates to a new synthetic process in which an alkyne and an azide react to form a radioisotopic bioconjugate construct. The reaction is particularly useful for producing compounds for use in imaging and radiotherapy applications. The present invention also provides bioconjugate labels and further relates to the use of these compounds in diagnostic and therapeutic methods. In addition, the invention provides a related process for introducing a radioisotopic halogen atom into a terminal alkyne.
    Type: Application
    Filed: August 12, 2011
    Publication date: August 15, 2013
    Applicant: UCL BUSINESS PLC
    Inventors: Erik Arstad, Ran Yan
  • Patent number: 8457162
    Abstract: An apparatus for and a method of performing packet detection in a receiver is provided. The apparatus is configured to determine a measure of a correlation between information of one or more received symbols and synchronization information. The apparatus is also configured to determine a measure of an energy value of one or more of the received symbols. The apparatus is also configured to determine if a packet has been detected based on the measure of the correlation and the measure of the energy value of the one or more received symbols.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: June 4, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Turgut Aytur, Stephan ten Brink, Ravishankar H. Mahadevappa, Ran Yan
  • Patent number: 8416870
    Abstract: An automatic gain control method and system for use in signal processing of OFDM symbols at a receiver. Two stages of coarse and fine automatic gain control are implemented that adjust different gains in an analog RF processing stage of the receiver. Gain of a low noise amplifier and a mixer are adjusted during a first and coarse automatic gain control stage based on feedback from a digital baseband stage. During a subsequent fine gain control period, the gain of a programmable gain amplifier is adjusted separately for each frequency band used by the OFDM symbols based on a histogram bin that counts the number of output samples of an analog to digital converter whose magnitude falls within certain ranges. Coarse and fine gains are updated after each OFDM symbol.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: April 9, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Turgut Aytur, Stephan ten Brink, Ravishankar H. Mahadevappa, Ran Yan
  • Patent number: 8399612
    Abstract: A process comprising substitution of an acceptor molecule comprising a group —XC(O)— wherein X is O, S, or NR8, where R8 is C1-6 alkyl, C6-12 aryl or hydrogen, with a nucleophile, wherein the acceptor molecule is cyclised such that said nucleophilic substitution at —XC(O)— occurs without racemization, is provided. This process has particular application for the production of a peptide by extension from the activated carboxy-terminus of an acyl amino acid residue without epimerization.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: March 19, 2013
    Assignee: University of Reading
    Inventors: Laurence M. Harwood, Ran Yan
  • Patent number: 8254480
    Abstract: An automatic gain control method and system for use in signal processing of OFDM symbols at a receiver. Two stages of coarse and fine automatic gain control are implemented that adjust different gains in an analog RF processing stage of the receiver. Gain of a low noise amplifier and a mixer are adjusted during a first and coarse automatic gain control stage based on feedback from a digital baseband stage. During a subsequent fine gain control period, the gain of a programmable gain amplifier is adjusted separately for each frequency band used by the OFDM symbols based on a histogram bin that counts the number of output samples of an analog to digital converter whose magnitude falls within certain ranges. Coarse and fine gains are updated after each OFDM symbol.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: August 28, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventors: Turgut Aytur, Stephan ten Brink, Ravishankar H. Mahadevappa, Ran Yan
  • Publication number: 20120190816
    Abstract: The present invention provides a process comprising substitution of an acceptor molecule comprising a group —XC(O)— wherein X is O, S or NR8, where R8 is C1-6 alkyl, C6-12 aryl or hydrogen, with a nucleophile, wherein the acceptor molecule is cyclised such that said nucleophilic substitution at —XC (O)— occurs without racemisation. This process has particular application for the production of a peptide by extension from the activated carboxy-terminus of an acyl amino acid residue without epimerisation.
    Type: Application
    Filed: July 20, 2011
    Publication date: July 26, 2012
    Inventors: Laurence M. Harwood, Ran Yan
  • Publication number: 20120140794
    Abstract: An automatic gain control method and system for use in signal processing of OFDM symbols at a receiver. Two stages of coarse and fine automatic gain control are implemented that adjust different gains in an analog RF processing stage of the receiver. Gain of a low noise amplifier and a mixer are adjusted during a first and coarse automatic gain control stage based on feedback from a digital baseband stage. During a subsequent fine gain control period, the gain of a programmable gain amplifier is adjusted separately for each frequency band used by the OFDM symbols based on a histogram bin that counts the number of output samples of an analog to digital converter whose magnitude falls within certain ranges. Coarse and fine gains are updated after each OFDM symbol.
    Type: Application
    Filed: February 14, 2012
    Publication date: June 7, 2012
    Inventors: Turgut Aytur, Stephan ten Brink, Ravishankar H. Mahadevappa, Ran Yan
  • Patent number: 8093405
    Abstract: An iodonium compound of formula (I): where RAR1 is a C5-6 aryl group, bearing at least one substituent selected from formyl, thionoacyl, acylamidocarboxy, thionoester, azo, C2-20 alkenyl, C2-20 alkynyl, and (CH2)nRC, where RC is selected from ether, amino, azo and thioether; RAR2 is a C5-10 aryl group, optionally substituted by one or more groups selected from C1-12 alkyl, C5-12 aryl, C3-12 heterocyclyl, ether, thioether, nitro, cyano and halo, and may be linked to a solid support or fluorous tag; and X is a counteranion.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: January 10, 2012
    Assignee: University of Newcastle Upon Tyne
    Inventors: Michael Andrew Carroll, Ran Yan
  • Publication number: 20110275784
    Abstract: The present invention provides a process comprising substitution of an acceptor molecule comprising a group —XC(O)— wherein X is O, S or NR8, where R8 is C1-6 alkyl, C6-12 aryl or hydrogen, with a nucleophile, wherein the acceptor molecule is cyclised such that said nucleophilic substitution at —XC (O)— occurs without racemisation. This process has particular application for the production of a peptide by extension from the activated carboxy-terminus of an acyl amino acid residue without epimerisation.
    Type: Application
    Filed: July 20, 2011
    Publication date: November 10, 2011
    Inventors: Laurence M. Harwood, Ran Yan
  • Patent number: 8044173
    Abstract: A process comprising substitution of an acceptor molecule comprising a group —XC(O)— wherein X is O, S, or NR8, where R8 is C1-6 alkyl, C6-12 aryl or hydrogen, with a nucleophile, wherein the acceptor molecule is cyclised such that said nucleophilic substitution at —XC(O)— occurs without racemisation, is provided. This process has particular application for the production of a peptide by extension from the activated carboxy-terminus of an acyl amino acid residue without epimerisation.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: October 25, 2011
    Assignee: University of Reading
    Inventors: Laurence M. Harwood, Ran Yan
  • Patent number: 7986726
    Abstract: A direct conversion ultrawideband transceiver employing three phase locked loops (PLLs). The PLLs are preferably fixed-frequency PLLs that operate continuously, at different frequencies, with a selected frequency determined by selecting the output of one of the three PLLs. The use of three PLLs is suitable for use in a communication system employing frequency hopping across three bands or sub-bands.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: July 26, 2011
    Assignee: Realtek Semiconductor Corp.
    Inventors: Behzad Razavi, Han-Chang Kang, Turgut Aytur, Ran Yan
  • Publication number: 20110158291
    Abstract: An automatic gain control method and system for use in signal processing of OFDM symbols at a receiver. Two stages of coarse and fine automatic gain control are implemented that adjust different gains in an analog RF processing stage of the receiver. Gain of a low noise amplifier and a mixer are adjusted during a first and coarse automatic gain control stage based on feedback from a digital baseband stage. During a subsequent fine gain control period, the gain of a programmable gain amplifier is adjusted separately for each frequency band used by the OFDM symbols based on a histogram bin that counts the number of output samples of an analog to digital converter whose magnitude falls within certain ranges. Coarse and fine gains are updated after each OFDM symbol.
    Type: Application
    Filed: March 9, 2011
    Publication date: June 30, 2011
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Turgut Aytur, Stephan ten Brink, Ravishankar H. Mahadevappa, Ran Yan