Patents by Inventor Randall C. Gray

Randall C. Gray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150004902
    Abstract: Embodiments of inductive communication devices include first and second galvanically isolated IC die. The first IC die has a first coil proximate to a first surface of the first IC die, and the second IC die has a second coil proximate to a first surface of the second IC die. The first and second IC die are arranged so that the first surfaces of the first and second IC die face each other, and the first coil and the second coil are aligned across a gap between the first and second IC die. One or more dielectric components are positioned within the gap directly between the first and second coils. During operation, a first signal is provided to the first coil, and the first coil converts the signal into a time-varying magnetic field. The magnetic field couples with the second coil, which produces a corresponding second signal.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 1, 2015
    Inventors: John M. Pigott, Fred T. Brauchler, Darrel R. Frear, Vivek Gupta, Randall C. Gray, Norman L. Owens, Carl E. D'Acosta
  • Publication number: 20140035561
    Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.
    Type: Application
    Filed: August 1, 2012
    Publication date: February 6, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: John M. Pigott, Fred T. Brauchler, William E. Edwards, Mike R. Garrard, Randall C. Gray, John M. Hall
  • Publication number: 20130328554
    Abstract: A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal.
    Type: Application
    Filed: June 12, 2012
    Publication date: December 12, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: John M. Pigott, Fred T. Brauchler, William E. Edwards, Mike R. Garrard, Randall C. Gray, John M. Hall
  • Patent number: 8278932
    Abstract: In an integrated circuit, a state of a switch coupled to the integrated circuit is determined by comparing a switch voltage at a first terminal of the switch to a reference voltage at a first time. If the switch voltage is higher than the reference voltage, the switch is determined to be in a first state. If the switch voltage is lower than the reference voltage, the switch voltage is stored in a storage element to produce a stored voltage. The stored voltage is compared to the switch voltage at a second time after the first time. A determination is made that the switch is in the first state if the switch voltage is higher than the stored voltage at the second time. A determination is made that the switch is in a second state if the switch voltage is not higher than the stored voltage at the second time.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: October 2, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bryan Quinones, Randall C. Gray
  • Publication number: 20110115527
    Abstract: In an integrated circuit, a state of a switch coupled to the integrated circuit is determined by comparing a switch voltage at a first terminal of the switch to a reference voltage at a first time. If the switch voltage is higher than the reference voltage, the switch is determined to be in a first state. If the switch voltage is lower than the reference voltage, the switch voltage is stored in a storage element to produce a stored voltage. The stored voltage is compared to the switch voltage at a second time after the first time. A determination is made that the switch is in the first state if the switch voltage is higher than the stored voltage at the second time. A determination is made that the switch is in a second state if the switch voltage is not higher than the stored voltage at the second time.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 19, 2011
    Inventors: Bryan Quinones, Randall C. Gray
  • Patent number: 7929266
    Abstract: An electronic device can be used with a system, such as an ignition system, that operates a relatively high voltage. The device can include a signal clamping control module that can include a signal reference module and a feedback control module. The signal reference module is operable to provide a reference signal to the feedback control module. The feedback control can be configured to receive a scaled signal from a signal scaling module, wherein the scaled signal is representative of a signal at a current carrying electrode of a power transistor. Based on the comparison of the reference signal to the scaled signal, the measurement module provides one or more signals to a control signal drive module. The feedback control module provides a control electrode signal to a control electrode of the power transistor.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: April 19, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ibrahim Kandah, Shiraz J. Contractor, William E. Edwards, Randall C. Gray
  • Publication number: 20090161287
    Abstract: An electronic device can be used with a system, such as an ignition system, that operates a relatively high voltage. The device can include a signal clamping control module that can include a signal reference module and a feedback control module. The signal reference module is operable to provide a reference signal to the feedback control module. The feedback control can be configured to receive a scaled signal from a signal scaling module, wherein the scaled signal is representative of a signal at a current carrying electrode of a power transistor. Based on the comparison of the reference signal to the scaled signal, the measurement module provides one or more signals to a control signal drive module. The feedback control module provides a control electrode signal to a control electrode of the power transistor.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 25, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Ibrahim Kandah, Shiraz J. Contractor, William E. Edwards, Randall C. Gray
  • Patent number: 7538559
    Abstract: A system (28) includes a microelectronic device (10) including first transistors (22) and second transistors (24), a power supply (40) electrically connected to the first and second transistors to provide power to the first and second transistors such that current flows through the first and second transistors, a switch (32) in operable communication with the second transistors, the switch allowing current to flow from the power supply through the second transistors when in a first mode of operation and preventing current from flowing from the power supply through the second transistors when in a second mode of operation, control circuitry in operable communication with the switch, and current sensing circuitry coupled to the first transistors to detect a test amount of current flowing through at least one of the first transistors when the switch is in the first mode of operation.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: May 26, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray
  • Patent number: 7423416
    Abstract: A voltage regulator includes first and second MOS transistors and a bipolar transistor. The first MOS transistor has a first conductivity type and has a drain coupled to a first power supply voltage terminal, a gate for receiving a first bias voltage, and a source. The second MOS transistor has a second conductivity type and has a source coupled to the first power supply voltage terminal, a drain coupled to the source of the first MOS transistor, and a gate for receiving a second bias voltage. The bipolar transistor has a collector coupled to the source of the first MOS transistor, a base for receiving a third bias voltage, and an emitter for providing an output voltage. The first MOS transistor and the second MOS transistor control a voltage level at the collector of the bipolar transistor in response to a varying power supply voltage provided to the first power supply voltage terminal.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: September 9, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bryan Quinones, William E. Edwards, Randall C. Gray
  • Patent number: 7365584
    Abstract: Apparatus and methods that reduce the amount of conducted/radiated emissions from a power switch (200) when a transistor (210) is switched OFF are disclosed. In addition, apparatus and methods that reduce the slew rate in a power switch when the power switch is switched off are disclosed. The apparatus comprises a transistor (210) including an inductive load (230) coupled to the transistor, a plurality of current sources (222, 224) coupled to the gate of the transistor, and a clamp (250) coupled to either the gate and the drain of the transistor, or to the gate and to ground depending on the location of the inductive load, wherein the clamp comprises a resistive element (260) to increase the voltage of the clamp when current flows through the clamp, and wherein the increased voltage causes the apparatus to include a different slew rate.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: April 29, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray, Matthew D. Thompson
  • Publication number: 20070279069
    Abstract: A method for testing an electronic assembly (10) is provided. A portion (22) of the electronic assembly is electrically isolated from a remainder (24) of the electronic assembly. Power is provided to the electronic assembly such that a reduced amount of current flows only through the portion of the electronic assembly. The reduced amount of current is determined. A combined amount of current flowing through both the portion and the remainder of the electronic assembly when power is provided to both the portion and the remainder of the electronic assembly is calculated based on the reduced amount of current.
    Type: Application
    Filed: April 9, 2007
    Publication date: December 6, 2007
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Paul T. Bennett, Randall C. Gray
  • Publication number: 20070279106
    Abstract: Apparatus and methods that reduce the amount of conducted/radiated emissions from a power switch (200) when a transistor (210) is switched OFF are disclosed. In addition, apparatus and methods that reduce the slew rate in a power switch when the power switch is switched off are disclosed. The apparatus comprises a transistor (210) including an inductive load (230) coupled to the transistor, a plurality of current sources (222, 224) coupled to the gate of the transistor, and a clamp (250) coupled to either the gate and the drain of the transistor, or to the gate and to ground depending on the location of the inductive load, wherein the clamp comprises a resistive element (260) to increase the voltage of the clamp when current flows through the clamp, and wherein the increased voltage causes the apparatus to include a different slew rate.
    Type: Application
    Filed: June 2, 2006
    Publication date: December 6, 2007
    Inventors: Paul T. Bennett, Randall C. Gray, Matthew D. Thompson
  • Patent number: 7276419
    Abstract: A semiconductor device may include first, second, and third semiconductor layers. The first and third layers may have a first dopant type, and the second layer may have a second dopant type. A first region within the third semiconductor layer may have the second dopant type. A second region between the first region and the second semiconductor layer may have the first dopant type. A third region above the second region may have the first dopant type. A fourth semiconductor region adjacent to the third region may have a first concentration of the second dopant type. A source contact region may have a second concentration of the second dopant type adjacent to the third semiconductor region and adjacent to the fourth semiconductor region. The second concentration may be higher than the first concentration.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: October 2, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Vishnu Khemka, John M. Pigott, Ronghua Zhu, Amitava Bose, Randall C. Gray, Jeffrey J. Braun
  • Patent number: 7218119
    Abstract: A method for testing an electronic assembly (10) is provided. A portion (22) of the electronic assembly is electrically isolated from a remainder (24) of the electronic assembly. Power is provided to the electronic assembly such that a reduced amount of current flows only through the portion of the electronic assembly. The reduced amount of current is determined. A combined amount of current flowing through both the portion and the remainder of the electronic assembly when power is provided to both the portion and the remainder of the electronic assembly is calculated based on the reduced amount of current.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: May 15, 2007
    Assignee: Freescale Semiconductors, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray
  • Publication number: 20040027097
    Abstract: An open loop current control system for regulating the flow of electrical current in an inductor that utilizes two methods of monitoring the current flow in the inductor. The open loop control system maintains the level of current in the inductor between two boundary levels by switching a boost transistor between an on and an off position based upon the level of current in the inductor. The control system measures the level of current in the inductor when a boost transistor is turned on. When the boost transistor is turned off, the control system determines the time period that is required for the current in the inductor to decay from the upper boundary level to the lower boundary level based upon the measured voltage difference across the inductor.
    Type: Application
    Filed: August 9, 2002
    Publication date: February 12, 2004
    Applicant: Motorola, Inc.
    Inventors: Joseph DeNicholas, Randall C. Gray
  • Patent number: 6690144
    Abstract: An open loop current control system for regulating the flow of electrical current in an inductor that utilizes two methods of monitoring the current flow in the inductor. The open loop control system maintains the level of current in the inductor between two boundary levels by switching a boost transistor between an on and an off position based upon the level of current in the inductor. The control system measures the level of current in the inductor when a boost transistor is turned on. When the boost transistor is turned off, the control system determines the time period that is required for the current in the inductor to decay from the upper boundary level to the lower boundary level based upon the measured voltage difference across the inductor.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: February 10, 2004
    Assignee: Motorola, Inc.
    Inventors: Joseph DeNicholas, Randall C Gray
  • Patent number: 6348820
    Abstract: A high-side, low-side driver that controls voltage from a voltage source to an inductive or resistive load includes a power transistor with a gate, a source and a drain. The driver is configured in a high-side configuration when the load is connected between the source and ground and the drain is connected to the voltage source and in a low-side configuration when the load is connected between the drain and the voltage source and the source is connected to ground. A gate drive circuit turns the power transistor on and off. The positive clamp circuit is connected to the drain and the voltage source. The positive clamp circuit provides a recirculation path for inductive energy that is stored in the inductive load when a loss of reverse battery condition occurs or when ground is lost.
    Type: Grant
    Filed: July 17, 2000
    Date of Patent: February 19, 2002
    Assignee: Motorola, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray, Michael Garrett Neaves, Joseph V. DeNicholas
  • Patent number: 5872460
    Abstract: The firing circuit of an inflatable restraint system is tested to verify operation of two FETs in series with a squib which are used to apply current to the squib. For the test the squib is biased to an intermediate voltage and each FET is turned on alone to apply battery or ground voltage to the squib. High and low voltage detectors sense the voltage excursion past respective thresholds to verify FET operation. A current detector for each FET senses a short when its FET is conducting, and a logic circuit immediately turns off the FET to result in a very brief FET on time. In addition, the voltage detectors may be used to detect shorts prior to FET testing and also to turn off or hold off the FETs when a high or low voltage is detected upon FET testing.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: February 16, 1999
    Assignee: Delco Electronics Corp.
    Inventors: Paul T. Bennett, Richard Joseph Ravas, Robert Keith Constable, Randall C. Gray, Terrell Anderson
  • Patent number: 5734317
    Abstract: An air bag deployment system (10) generates the proper current to activate a squib (74) and deploy an air bag. A separate capacitor (48) powers circuitry in a drive limit controller (54) for providing a variable voltage drive to a MOS device (68) to regulate squib (74) firing current. A switch circuit (38) supplies gate current to a transistor (46) such that an electrical connecting path allows a capacitor (22) to charge a capacitor (48). During squib (74) firing and air bag deployment, the switch circuit (38) provides electrical isolation between the decaying voltage stored on the capacitor (22) that powers the squib (74) current and the capacitor (48) that provides current regulation to the squib (74) from the drive limit controller (54).
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: March 31, 1998
    Assignee: Motorola, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray
  • Patent number: 5604373
    Abstract: A lateral transistor (14) is configured as a reverse protection diode that allows low and high current modes of operation while maintaining low forward voltage drop. The base region (38) of the lateral transistor is formed inside a collector ring (34) and adjacent to the emitter region (36). In low current mode, the transistor operates as a conventional diode. In high current mode, the excessive number of minority carriers injected into the base region causes the device to enter conductivity modulation that effectively increases the doping concentration and lowers the bulk resistance. The lower bulk resistance keeps the forward voltage drop low. By having the base region inside the collector ring, the bulk resistance is kept low to aid in the onset of conductivity modulation. Thus, the transition between low current mode and high current mode is minimized.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: February 18, 1997
    Assignee: Motorola, Inc.
    Inventors: David M. Susak, Randall C. Gray