Patents by Inventor Randall C. Gray

Randall C. Gray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070279106
    Abstract: Apparatus and methods that reduce the amount of conducted/radiated emissions from a power switch (200) when a transistor (210) is switched OFF are disclosed. In addition, apparatus and methods that reduce the slew rate in a power switch when the power switch is switched off are disclosed. The apparatus comprises a transistor (210) including an inductive load (230) coupled to the transistor, a plurality of current sources (222, 224) coupled to the gate of the transistor, and a clamp (250) coupled to either the gate and the drain of the transistor, or to the gate and to ground depending on the location of the inductive load, wherein the clamp comprises a resistive element (260) to increase the voltage of the clamp when current flows through the clamp, and wherein the increased voltage causes the apparatus to include a different slew rate.
    Type: Application
    Filed: June 2, 2006
    Publication date: December 6, 2007
    Inventors: Paul T. Bennett, Randall C. Gray, Matthew D. Thompson
  • Publication number: 20070279069
    Abstract: A method for testing an electronic assembly (10) is provided. A portion (22) of the electronic assembly is electrically isolated from a remainder (24) of the electronic assembly. Power is provided to the electronic assembly such that a reduced amount of current flows only through the portion of the electronic assembly. The reduced amount of current is determined. A combined amount of current flowing through both the portion and the remainder of the electronic assembly when power is provided to both the portion and the remainder of the electronic assembly is calculated based on the reduced amount of current.
    Type: Application
    Filed: April 9, 2007
    Publication date: December 6, 2007
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Paul T. Bennett, Randall C. Gray
  • Patent number: 7276419
    Abstract: A semiconductor device may include first, second, and third semiconductor layers. The first and third layers may have a first dopant type, and the second layer may have a second dopant type. A first region within the third semiconductor layer may have the second dopant type. A second region between the first region and the second semiconductor layer may have the first dopant type. A third region above the second region may have the first dopant type. A fourth semiconductor region adjacent to the third region may have a first concentration of the second dopant type. A source contact region may have a second concentration of the second dopant type adjacent to the third semiconductor region and adjacent to the fourth semiconductor region. The second concentration may be higher than the first concentration.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: October 2, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Vishnu Khemka, John M. Pigott, Ronghua Zhu, Amitava Bose, Randall C. Gray, Jeffrey J. Braun
  • Patent number: 7218119
    Abstract: A method for testing an electronic assembly (10) is provided. A portion (22) of the electronic assembly is electrically isolated from a remainder (24) of the electronic assembly. Power is provided to the electronic assembly such that a reduced amount of current flows only through the portion of the electronic assembly. The reduced amount of current is determined. A combined amount of current flowing through both the portion and the remainder of the electronic assembly when power is provided to both the portion and the remainder of the electronic assembly is calculated based on the reduced amount of current.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: May 15, 2007
    Assignee: Freescale Semiconductors, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray
  • Publication number: 20040027097
    Abstract: An open loop current control system for regulating the flow of electrical current in an inductor that utilizes two methods of monitoring the current flow in the inductor. The open loop control system maintains the level of current in the inductor between two boundary levels by switching a boost transistor between an on and an off position based upon the level of current in the inductor. The control system measures the level of current in the inductor when a boost transistor is turned on. When the boost transistor is turned off, the control system determines the time period that is required for the current in the inductor to decay from the upper boundary level to the lower boundary level based upon the measured voltage difference across the inductor.
    Type: Application
    Filed: August 9, 2002
    Publication date: February 12, 2004
    Applicant: Motorola, Inc.
    Inventors: Joseph DeNicholas, Randall C. Gray
  • Patent number: 6690144
    Abstract: An open loop current control system for regulating the flow of electrical current in an inductor that utilizes two methods of monitoring the current flow in the inductor. The open loop control system maintains the level of current in the inductor between two boundary levels by switching a boost transistor between an on and an off position based upon the level of current in the inductor. The control system measures the level of current in the inductor when a boost transistor is turned on. When the boost transistor is turned off, the control system determines the time period that is required for the current in the inductor to decay from the upper boundary level to the lower boundary level based upon the measured voltage difference across the inductor.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: February 10, 2004
    Assignee: Motorola, Inc.
    Inventors: Joseph DeNicholas, Randall C Gray
  • Patent number: 6348820
    Abstract: A high-side, low-side driver that controls voltage from a voltage source to an inductive or resistive load includes a power transistor with a gate, a source and a drain. The driver is configured in a high-side configuration when the load is connected between the source and ground and the drain is connected to the voltage source and in a low-side configuration when the load is connected between the drain and the voltage source and the source is connected to ground. A gate drive circuit turns the power transistor on and off. The positive clamp circuit is connected to the drain and the voltage source. The positive clamp circuit provides a recirculation path for inductive energy that is stored in the inductive load when a loss of reverse battery condition occurs or when ground is lost.
    Type: Grant
    Filed: July 17, 2000
    Date of Patent: February 19, 2002
    Assignee: Motorola, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray, Michael Garrett Neaves, Joseph V. DeNicholas
  • Patent number: 5872460
    Abstract: The firing circuit of an inflatable restraint system is tested to verify operation of two FETs in series with a squib which are used to apply current to the squib. For the test the squib is biased to an intermediate voltage and each FET is turned on alone to apply battery or ground voltage to the squib. High and low voltage detectors sense the voltage excursion past respective thresholds to verify FET operation. A current detector for each FET senses a short when its FET is conducting, and a logic circuit immediately turns off the FET to result in a very brief FET on time. In addition, the voltage detectors may be used to detect shorts prior to FET testing and also to turn off or hold off the FETs when a high or low voltage is detected upon FET testing.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: February 16, 1999
    Assignee: Delco Electronics Corp.
    Inventors: Paul T. Bennett, Richard Joseph Ravas, Robert Keith Constable, Randall C. Gray, Terrell Anderson
  • Patent number: 5734317
    Abstract: An air bag deployment system (10) generates the proper current to activate a squib (74) and deploy an air bag. A separate capacitor (48) powers circuitry in a drive limit controller (54) for providing a variable voltage drive to a MOS device (68) to regulate squib (74) firing current. A switch circuit (38) supplies gate current to a transistor (46) such that an electrical connecting path allows a capacitor (22) to charge a capacitor (48). During squib (74) firing and air bag deployment, the switch circuit (38) provides electrical isolation between the decaying voltage stored on the capacitor (22) that powers the squib (74) current and the capacitor (48) that provides current regulation to the squib (74) from the drive limit controller (54).
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: March 31, 1998
    Assignee: Motorola, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray
  • Patent number: 5604373
    Abstract: A lateral transistor (14) is configured as a reverse protection diode that allows low and high current modes of operation while maintaining low forward voltage drop. The base region (38) of the lateral transistor is formed inside a collector ring (34) and adjacent to the emitter region (36). In low current mode, the transistor operates as a conventional diode. In high current mode, the excessive number of minority carriers injected into the base region causes the device to enter conductivity modulation that effectively increases the doping concentration and lowers the bulk resistance. The lower bulk resistance keeps the forward voltage drop low. By having the base region inside the collector ring, the bulk resistance is kept low to aid in the onset of conductivity modulation. Thus, the transition between low current mode and high current mode is minimized.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: February 18, 1997
    Assignee: Motorola, Inc.
    Inventors: David M. Susak, Randall C. Gray
  • Patent number: 5483406
    Abstract: An overvoltage protection circuit (11) for decoupling circuitry (12) from a voltage applied to an input (38). The overvoltage protection circuit (11) is integrated on an integrated circuit along with the circuitry (12). The overvoltage protection circuit (11) comprises a sense circuit (13), a timing circuit (14), a decoupling circuit (16), and a circuit (17). The sense circuit (13) detects when the voltage applied to the input (38) exceeds a threshold voltage. The timing circuit (14) is responsive to the sense circuit (13) and determines when the voltage exceeds the threshold voltage for a predetermined time. The decoupling circuit (16) is responsive to the timing circuit (14) and decouples the circuitry from the voltage applied to the input (38). The circuit (17) generates a logic signal indicating the circuitry has been decoupled.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: January 9, 1996
    Assignee: Motorola, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray, John M. Pigott
  • Patent number: 5386201
    Abstract: An oscillator circuit with enhanced frequency characteristics is provided. This oscillator circuit includes a buffer (102) to amplify the output signal and provide a positive feedback, an inverter (106) to provide negative feedback to cause oscillation, a capacitive divider circuit (110, 112) for charge storage, a resistor (116) to provide controlled discharge, and a diode circuit (114) for providing frequency stability. Since frequency stability is included within the oscillator circuit, there may be no need to perform resistor trimming at the time of manufacture. Further, the capacitive divider circuit eliminates parasitic charge injection.
    Type: Grant
    Filed: November 26, 1993
    Date of Patent: January 31, 1995
    Assignee: Motorola, Inc.
    Inventors: Paul T. Bennett, Randall C. Gray, John Pigott
  • Patent number: 5371415
    Abstract: A two stage gate drive circuit (10) for controlling a power transistor (12) has been provided. The drive circuit includes a first stage (14) coupled to a first supply voltage terminal for providing a high current drive signal to the power transistor for quickly switching on the power transistor. However, once the power transistor is turned on, the first stage becomes inactive and a second stage (16) coupled to a second supply voltage terminal provides a low current drive signal to the power transistor for fully enhancing the power transistor and lowering its on resistance. The gate drive circuit further includes a timer circuit (18) for rendering the first stage active for predetermined period of time.
    Type: Grant
    Filed: June 21, 1993
    Date of Patent: December 6, 1994
    Assignee: Motorola, Inc.
    Inventors: Robert P. Dixon, Randall C. Gray
  • Patent number: 5194760
    Abstract: A slew rate limited load driver is disclosed with a transistor switch (123) driving a load (125). The transistor switch (123) is controlled by a current from a current amplifier (107) and a current sink (111). The current amplifier (107) is driven from the combination of a source of compensating current (120) and a turn on current source (115). As a command signal (103) transitions, the source of compensating current (120) adds a transitional compensating current to the current derived from the turn on current source (115) and is amplified by the current amplifier (107). The output of the current amplifier (107) is combined with the output of the turn off current sink (111), to control the voltage slew rate to the load (101).
    Type: Grant
    Filed: December 23, 1991
    Date of Patent: March 16, 1993
    Assignee: Motorola, Inc.
    Inventors: Jeffrey J. Braun, Randall C. Gray
  • Patent number: 4975798
    Abstract: An automobile alternator regulator integrated circuit having a voltage-supply or -sense node (6) for connection to an external voltage, and a voltage clamp comprising: a pnp bypass transistor (Q1) having a base electrode, an emitter electrode coupled to the node and a collector electrode coupled to ground; a resistor (R1) connected between the base electrode and the node; a Zener diode (Z1-Z4) connected between the base electrode and ground for enabling the bypass transistor when the voltage at the node exceeds a predetermined value, whereby the voltage at the node is clamped to a voltage no greater than the predetermined value; and a fuse (F1) connected between the node and the emitter electrode so as to provide a subsequently identifiable cause of failure if the fuse becomes blown due to excess voltage while allowing subsequent operation of the integrated circuit if the clamp means fails but another part of the integrated circuit remains functional.
    Type: Grant
    Filed: September 5, 1989
    Date of Patent: December 4, 1990
    Assignee: Motorola Inc.
    Inventors: Arthur J. Edwards, Randall C. Gray
  • Patent number: 4961045
    Abstract: A digital to analog converter circuit produces an output voltage which includes a small error voltage floating on a larger direct current voltage component. The circuit includes a controlled current supply coupled to the emitter of an NPN transistor to which the direct current voltage component is supplied to the base thereof. The error voltage is generated by modulating the current through the transistor by controlling the current supply, independent of the voltage component supplied to its base, such that the output voltage occurring at the emitter of the transistor is a function of the difference between the direct current component and the natural log of the modulated emitter current.
    Type: Grant
    Filed: October 27, 1989
    Date of Patent: October 2, 1990
    Assignee: Motorola, Inc.
    Inventors: Randall C. Gray, Arthur Edwards
  • Patent number: 4931717
    Abstract: A regulator is responsive to an input signal proportional to the system supply voltage for adjusting the current flowing in the field windings of an electrical alternator which controls the output power thereof. The primary regulation loop of the regulator generates a pulse train having a duty cycle inversely proportional to the amplitude of the input signal while an oscillator provides a sawtooth signal at a predetermined frequency which controls the response frequency of the regulator. The regulator limits the rate of increase in the duty cycle of pulse train upon detecting a decrease in the system supply voltage by converting the duty cycle of the pulse train to a charging signal for developing a voltage across a capacitor proportional to the duty cycle of the pulse train. The voltage across the capacitor is compared to the sawtooth signal and triggers a latch which disables the output signal of the regulator as the duty cycle lengthens in response to the decrease in the system supply voltage.
    Type: Grant
    Filed: September 5, 1989
    Date of Patent: June 5, 1990
    Assignee: Motorola Inc.
    Inventors: Randall C. Gray, Robert Jarrett
  • Patent number: 4920308
    Abstract: A regulator for a vehicle charging system senses when it applies and terminates excitation to the field winding of the charging system's alternator. When the excitation is applied to the field windings, the output of the alternator is connected to an input filter in the regulator so that the regulator can sense the alternator's output. When the excitation is terminated, the input filter is disconnected from the alternator's output to isolate the filter from voltage steps induced in the alternator's output by the turn-on and turn-off of the field excitation.
    Type: Grant
    Filed: April 3, 1989
    Date of Patent: April 24, 1990
    Assignee: Motorola, Inc.
    Inventors: Arthur J. Edwards, Randall C. Gray
  • Patent number: 4885484
    Abstract: A MOS differential to single ended converter circuit is provided for supplying a single ouput signal in response to first and second differentially related current being supplied to first and second junctions thereof. The converter circuit includes first and second MOS transistors each having gate, drain and source electrodes with the gate electrodes being coupled together while the drain and gate electrodes of the first transistor are interconnected. The drain and source electrodes of the pair of transistors are respectively coupled in series with the first and second junctions. First and second bipolar transistors each having first, second and control electrodes are provided for limiting the voltage swing at the drain of the second MOS transistor.
    Type: Grant
    Filed: July 5, 1988
    Date of Patent: December 5, 1989
    Assignee: Motorola, Inc.
    Inventor: Randall C. Gray
  • Patent number: 4882531
    Abstract: Integrated circuit voltage regulator (60; 81; 91) is provided for use in a battery charging system (10) for providing excitation current to a field coil (13) of an alternator (11). The integrated circuit voltage regulator includes a transistor (70) which is selectively switched on and off to implement the prior art diesel diode (26) functions of providing initial field coil excitation current while preventing undesired current flow from an alternator voltage supply terminal (20) during subsequent field coil excitation current. The transistor (70) is provided as part of an integrated circuit and, therefore, eliminates the need for a diesel diode (26) external to the integrated circuit. In addition, use of the switched transistor (70) minimizes voltage drop loss when providing initial field excitation current. Constructing the transistor (70) as a PNP vertical substrate transistor minimizes integrated circuit area and simplifies integrated circuit topology.
    Type: Grant
    Filed: September 26, 1988
    Date of Patent: November 21, 1989
    Assignee: Motorola Inc.
    Inventors: Arthur J. Edwards, Randall C. Gray