Abstract: An automatic line integrity monitoring system may include a cable having a plurality of wires, and a controller configured to sequentially swap each wire of the cable from a main power supply to an auxiliary power supply. The controller further checks each wire for a current flow while the wire is connected to the auxiliary power supply, and, in response to the current flow satisfying a criterion, automatically disconnect the cable from the main power supply. The criterion may, for example, be an amperage threshold.

Abstract: Disclosed herein are systems and devices capable of wireless communications based on RF transmissions from discharges. A transmitting device includes a discharge generator having a plurality of electrodes spaced to support generation of the discharge, and a circuit coupled to the plurality of spaced electrodes to control a supply for the discharge generator. In some embodiments, controlling the supply for the discharge generator modifies a property of the discharge to modulate the RF transmission such that the resulting RF transmission is indicative of the device state or other information to be communicated.

Abstract: Techniques are disclosed relating to microwave ovens. In one embodiment, an apparatus is disclosed that includes a microwave heating unit. The microwave heating unit is configured to radiate microwaves into a cavity and includes an antenna array coupled to one or more amplifiers. The antenna array is configured to generate the radiated microwaves. In some embodiments, the microwave oven is configured to measure temperatures of a item within the cavity, and to steer a microwave beam produced by the antenna array based on the measured temperatures.

Abstract: A PHY entity for a UWB system utilizes the unlicensed 3.1-10.6 GHZ UWB band, as regulated in the United States by the Code of Federal Regulation, Title 47, Section 15. The UWB system provides a wireless pico area network (PAN) with data payload communication capabilities of 55, 80, 110, 160, 200, 320 and 480 Mb/s. The UWB system employs orthogonal frequency division multiplexing (OFDM) and uses a total of 122 sub-carriers that are modulated using quadrature phase shift keying (QPSK). Forward error correction coding (convolutional coding) is used with a coding rate of 11/32, 1/2, 5/8 and 3/4.

Abstract: A radio such as a frequency division duplex (FDD) radio (100) has a first local oscillator (LO1I and LO1Q) that is set to coincide with the transmitter section's (126) center frequency or a sub-harmonic thereof. In this way, after the first down-conversion, the transmit interferer is converted to DC, where it can be effectively removed using a simple high-pass filter (110, 112) such as a DC blocking capacitor. Image rejection is achieved by the use of a two-step down-conversion approach that uses quadrature local oscillators to implement a single-sideband down-converter.

Abstract: System for ultra-wideband communications providing high data rates over an extended operating range in the presence of interferers. A preferred embodiment comprises an ultra-wideband (UWB) device that makes use of a portion of the UWB frequency range to help provide good performance in the presence of interferers. Additionally, since only a portion of the UWB frequency range is used, multiple devices can simultaneously transmit and receive by using different portions of the UWB frequency range.

Abstract: System and method for maximizing a signal strength of a received signal pulse. A preferred embodiment comprises a self-adjusting correlator/integrator (for example, correlator/integrator 325) that uses no historical timing information. The self-adjusting correlator/integrator uses a plurality of simple correlators/integrators (for example, correlator/integrator 805) which are configured to process a received signal at various times surrounding the signal pulse's expected arrival. A comparator (for example, comparator 820) selects an output of the simple correlators/integrators with greatest magnitude.

Abstract: System and method for combining maximizing a received signal in a multipath environment. A preferred embodiment comprises a rake receiver (for example, rake receiver 1100), created from switched capacitors, with N fingers. Each of the fingers is coupled to a signal input for a period of time to accumulate a charge on a storing capacitor (for example, storing capacitor 1115). The charges stored on the storing capacitors can then be read-out to produce a value. The rake receiver can implement either equal ratio combining or maximum gain combining to further improve received signal strength.

Abstract: A system and method implement very high data rate baseband DACs suitable for wireless applications related to new standards (e.g. Ultra-Wide Band) using CMOS processes allowing an integrated solution with the deep-submicron CMOS digital baseband. A single CMOS block working at full speed is discarded in favor of several blocks, each working at a fraction of the original data rate.

Abstract: A circuit provides a reduced harmonic content output signal OUTA and/or OUTB that is modulated according to an input signal 231. The circuit has an oscillator circuit 210 and a harmonic rejection mixer (HRM) 230. The oscillator circuit 210 includes at least one “circuit portion” (FIG. 2A) configured to receive first and second orthogonal oscillator input signals (two of I, I?, Q, Q?) having respective first and second phases, and to provide an arbitrarily large number of oscillator output signals (?M) having respective mutually distinct phases that are interpolated between the first and second phases. Harmonic rejection mixer 230 is configured to use the input signal to modulate a combination of the oscillator output signals, the oscillator output signals being respectively weighted so as to provide an emulated sinusoidal signal constituting the reduced harmonic content output signal.

Abstract: A current-domain transmitter is configured to receive an input signal and provide a transmitted signal. The transmitter has a plurality of elements, operatively arranged between the input signal and the transmitted signal and configured to represent the input signal with respective electric currents whose respective current magnitudes are each substantially proportional to the input signal. The elements may include a current-steering digital-to-analog converter (DAC), a current mode filter (such as an LPF), a current mode mixer, and/or a current mode amplifier.

Abstract: Disclosed herein are systems and devices capable of wireless communications based on RF transmissions from discharges. A transmitting device includes a discharge generator having a plurality of electrodes spaced to support generation of the discharge, and a circuit coupled to the plurality of spaced electrodes to control a supply for the discharge generator. In some embodiments, controlling the supply for the discharge generator modifies a property of the discharge to modulate the RF transmission such that the resulting RF transmission is indicative of the device state or other information to be communicated.

Abstract: A speed-up mode control system is operative to generate a speed-up mode signal based on a gain control signal from associated digital circuitry. The speed-up mode signal controls electronics associated with one or more amplifiers to facilitate settling time of an output signal of the amplifier(s) that occurs when the gain of the amplifier changes. The gain control signal also can be delayed to provide a delayed version of the gain control signal for controlling gain of the amplifier(s).

Abstract: System and method for analog signal generation and manipulation in an ultra-wideband (UWB) transmitter. A preferred embodiment comprises a digital portion 305 of an UWB transmitter (for example, transmitter 300), which is responsible for encoding a data stream to be transmitted, and an analog portion 330. The analog portion 330 creates a stream of short duration pulses from the encoded data stream and then filters the stream of short duration pulses. To simplify the generation of the short duration pulses, a quantized representation of the short duration pulse is used. The quantized representation is created via the use of control signals that by coupling differential amplifiers together (such as amplifier 611), generate a voltage drop across a resistor (such as resistor 619) and hence, a current.

Abstract: The mixer circuit includes a differential rf input driver; a differential local oscillator input circuit coupled to the differential rf input driver; a non-linear load coupled to the differential local oscillator input circuit wherein the non-linear load compensates for non-linearity of the differential rf input driver. The non-linear load has a V-I (voltage-current) transfer function the inverse of the input driver. This improves the mixer linearity without sacrificing the Gain or Noise Figure.

Abstract: The present invention pertains to a MOS type differential buffer circuit. The buffer proposed herein utilizes capacitive coupling to apply small AC signals to an amplifying current source to mitigate attenuation owing to body effect and output impedance, among other things, in an associated follower component. The proposed circuit does not, however, promote an increase in current and/or power dissipation. Additionally, the circuit allows a desired gain to be achieved while maintaining a relatively constant output impedance, compared to a simple differential source follower.

Abstract: The mixer circuit includes a differential rf input driver; a differential local oscillator input circuit coupled to the differential rf input driver; a non-linear load coupled to the differential local oscillator input circuit wherein the non-linear load compensates for non-linearity of the differential rf input driver. The non-linear load has a V-I (voltage-current) transfer function the inverse of the input driver. This improves the mixer linearity without sacrificing the Gain or Noise Figure.

Abstract: The circuit with adaptive amplifier output common mode voltage adjustment includes: a differential pre-amplifier; a re-generated comparator having a differential input coupled to a differential output of the pre-amplifier; and a replica comparator coupled to a common mode node of the pre-amplifier for adjusting a common mode of the pre-amplifier. The replica comparator provides a trip-point reference to set the output common mode of the pre-amplifier. This sets the output common mode of the pre-amplifier to the most sensitive region of the re-generated comparator.

Abstract: A system and method implement very high data rate baseband DACs suitable for wireless applications related to new standards (e.g. Ultra-Wide Band) using CMOS processes allowing an integrated solution with the deep-submicron CMOS digital baseband. A single CMOS block working at full speed is discarded in favor of several blocks, each working at a fraction of the original data rate.

Abstract: A circuit provides a reduced harmonic content output signal OUTA and/or OUTB that is modulated according to an input signal 231. The circuit has an oscillator circuit 210 and a harmonic rejection mixer (HRM) 230. The oscillator circuit 210 includes at least one “circuit portion” (FIG. 2A) configured to receive first and second orthogonal oscillator input signals (two of I, I-, Q, Q-) having respective first and second phases, and to provide an arbitrarily large number of oscillator output signals (?M) having respective mutually distinct phases that are interpolated between the first and second phases. Harmonic rejection mixer 230 is configured to use the input signal to modulate a combination of the oscillator output signals, the oscillator output signals being respectively weighted so as to provide an emulated sinusoidal signal constituting the reduced harmonic content output signal.