Patents by Inventor Ravinder Aggarwal

Ravinder Aggarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060045663
    Abstract: A load port comprises a platform for receiving a FOUP. The platform includes features for manually removing a FOUP door. The platform also includes features for placing the FOUP in operative relation to a wafer transfer robot configured to transfer wafers between first and second containers.
    Type: Application
    Filed: August 5, 2004
    Publication date: March 2, 2006
    Inventors: Ravinder Aggarwal, James Kusbel
  • Publication number: 20050193952
    Abstract: A substrate support system comprises a relatively thin circular substrate holder having a plurality of passages extending between top and bottom surfaces thereof. The substrate holder includes a single substrate support ledge or a plurality of substrate support spacer vanes configured to support a peripheral portion of the substrate backside so that a thin gap is formed between the substrate and the substrate holder. The vanes can be angled to resist backside deposition of reactant gases as the substrate holder is rotated. A hollow support member provides support to an underside of the substrate holder. The hollow support member is configured to convey gas (e.g., inert gas or cleaning gas) upward into one or more of the passages of the substrate holder. The upwardly conveyed gas flows into the gap between the substrate and the substrate holder.
    Type: Application
    Filed: February 11, 2005
    Publication date: September 8, 2005
    Inventors: Matt Goodman, Jereon Stoutyesdijk, Ravinder Aggarwal, Mike Halpin, Tony Keeton, Mark Hawkins, Lee Haen, Armand Ferro, Paul Brabant, Robert Vyne, Gregory Bartlett, Joseph Italiano, Bob Haro
  • Publication number: 20050184270
    Abstract: A slit valve for a semiconductor processing apparatus, for fluidly sealing a passage connecting two chambers of the apparatus, such as a substrate reaction chamber and a region outside the reaction chamber. The slit valve comprises an actuator plate movable within a slot in one wall of the passage, the actuator plate and the slot oriented generally transverse to the passage. The actuator plate has a first position in which the valve is open, permitting the transfer of a substrate through the passage. The actuator plate also has a second position in which the valve is closed, and in which the actuator plate fluidly seals the passage such that fluid cannot flow through the passage across the actuator plate. A protective cover is configured to prevent debris within the passage (e.g., broken wafers, shards, particulate contaminants, etc.) from flowing into the slot when the actuator plate occupies its second position.
    Type: Application
    Filed: April 22, 2005
    Publication date: August 25, 2005
    Inventors: Ravinder Aggarwal, Jim Kusbel, Jerry Davis
  • Publication number: 20050176252
    Abstract: Disclosed herein is an apparatus and method for treating the frontside and backside of a semiconductor substrate with a process gas. A reactor chamber is equipped with a first load platform configured to permit the access of a process gas to both sides of a substrate. In some embodiments, the apparatus also comprises a second load platform configured for further processing the frontside of the substrate. The substrate is loaded on the first load platform and processed on both sides, then moved to the second load platform and processed on one side.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 11, 2005
    Inventors: Matthew Goodman, Ravinder Aggarwal, Mark Hawkins, Tony Keeton
  • Publication number: 20050169730
    Abstract: A sealing member provides a seal between a front opening unified pod (FOUP) and a semiconductor processing tool. The seal inhibits fluid flow between an ambient environment and a minienvironment in a front end of the processing tool while the FOUP and minienvironment are open to one another for transporting wafers between the processing tool and the FOUP.
    Type: Application
    Filed: April 29, 2004
    Publication date: August 4, 2005
    Inventors: Ravinder Aggarwal, James Kusbel
  • Publication number: 20050145180
    Abstract: A stationary cooling station for cooling wafers after the wafers have been subjected to semiconductor processing supports the wafer by flowing gas in accordance with the Bernoulli principle. An upper wall of the cooling station contains a plurality of gas outlets that direct gas to flow over the top surface of the wafer. In this way, a low-pressure region is created over the wafer and the wafer is suspended within the cooling station, without directly contacting any surface for support. In addition to providing lift for the wafer, the gas is a thermally conductive gas that can cool the wafer by conducting heat away from it.
    Type: Application
    Filed: February 15, 2005
    Publication date: July 7, 2005
    Inventors: Ravinder Aggarwal, Bob Haro
  • Patent number: 6899145
    Abstract: A front opening unified pod (FOUP) used for temporarily and portably storing semiconductor wafers between processing steps includes a manifold for uniformly distributing a purge gas in the FOUP during a purging process between wafer processing steps. The manifold can be a variety of shapes, and can be located in a number of appropriate locations within the FOUP. The manifold generally extends the full height of the FOUP and includes a plurality of openings configured to direct a flow of purge gas above and below each wafer held by the FOUP.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: May 31, 2005
    Assignee: ASM America, Inc.
    Inventor: Ravinder Aggarwal
  • Publication number: 20050091992
    Abstract: A stationary cooling station for cooling wafers after the wafers have been subjected to semiconductor processing supports the wafer by flowing gas in accordance with the Bernoulli principle. An upper wall of the cooling station contains a plurality of gas outlets that direct gas to flow over the top surface of the wafer. In this way, a low-pressure region is created over the wafer and the wafer is suspended within the cooling station, without directly contacting any surface for support. In addition to providing lift for the wafer, the gas is a thermally conductive gas that can cool the wafer by conducting heat away from it.
    Type: Application
    Filed: November 4, 2003
    Publication date: May 5, 2005
    Inventors: Ravinder Aggarwal, Bob Haro
  • Patent number: 6883776
    Abstract: A slit valve for a semiconductor processing apparatus, for fluidly sealing a passage connecting two chambers of the apparatus, such as a substrate reaction chamber and a region outside the reaction chamber. The slit valve comprises an actuator plate movable within a slot in one wall of the passage, the actuator plate and the slot oriented generally transverse to the passage. The actuator plate has a first position in which the valve is open, permitting the transfer of a substrate through the passage. The actuator plate also has a second position in which the valve is closed, and in which the actuator plate fluidly seals the passage such that fluid cannot flow through the passage across the actuator plate. A protective cover is configured to prevent debris within the passage (e.g., broken wafers, shards, particulate contaminants, etc.) from flowing into the slot when the actuator plate occupies its second position.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: April 26, 2005
    Assignee: ASM America, Inc.
    Inventors: Ravinder Aggarwal, Jim Kusbel, Jerry Davis
  • Patent number: 6883250
    Abstract: A stationary cooling station for cooling wafers after the wafers have been subjected to semiconductor processing supports the wafer by flowing gas in accordance with the Bernoulli principle. An upper wall of the cooling station contains a plurality of gas outlets that direct gas to flow over the top surface of the wafer. In this way, a low-pressure region is created over the wafer and the wafer is suspended within the cooling station, without directly contacting any surface for support. In addition to providing lift for the wafer, the gas is a thermally conductive gas that can cool the wafer by conducting heat away from it.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: April 26, 2005
    Assignee: ASM America, Inc.
    Inventors: Ravinder Aggarwal, Bob Haro
  • Patent number: 6879777
    Abstract: An apparatus for processing a semiconductor substrate, including a process chamber having a plurality of walls and a substrate support to support the substrate within the process chamber. A radiative heat source is positioned outside the process chamber to heat the substrate through the walls when the substrate is positioned on the substrate support. In some embodiments, lenses are positioned between the heat source and the substrate to focus or diffuse radiation from the heat source and thereby selectively alter the radiation intensity incident on certain portions of the substrate. In other embodiments, diffusing surfaces are positioned between the heat source and the substrate to diffuse radiation from the heat source and thereby selectively reduce the radiation intensity incident on certain portions of the substrate.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: April 12, 2005
    Assignee: ASM America, Inc.
    Inventors: Matthew G. Goodman, Tony J Keeton, Ravinder Aggarwal, Mark Hawkins
  • Publication number: 20050011458
    Abstract: A wafer holder for supporting a wafer within a CVD processing chamber includes a vertically moveable lift ring configured to support the bottom peripheral surface of the wafer, and an inner plug having a top flat surface configured to support the wafer during wafer processing. The lift ring has a central aperture configured to closely surround the inner plug. When a wafer is to be loaded onto the wafer holder, the lift ring is elevated above the inner plug. The wafer is loaded onto the lift ring in the elevated position. Then, the lift ring is maintained in the elevated position for a time period sufficient to allow the wafer temperature to rise to a level that is sufficient to significantly reduce or even substantially prevent thermal shock to the wafer when the wafer is brought into contact with the inner plug. The lift ring is then lowered into surrounding engagement with the inner plug. This is the wafer processing position of the wafer holder.
    Type: Application
    Filed: July 30, 2004
    Publication date: January 20, 2005
    Inventors: Ravinder Aggarwal, Tony Keeton, Matthew Goodman
  • Publication number: 20040182472
    Abstract: A front opening unified pod (FOUP) used for temporarily and portably storing semiconductor wafers between processing steps includes a manifold for uniformly distributing a purge gas in the FOUP during a purging process between wafer processing steps. The manifold can be a variety of shapes, and can be located in a number of appropriate locations within the FOUP. The manifold generally extends the full height of the FOUP and includes a plurality of openings configured to direct a flow of purge gas above and below each wafer held by the FOUP.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Inventor: Ravinder Aggarwal
  • Publication number: 20040067052
    Abstract: An apparatus for processing a semiconductor substrate is provided. The apparatus comprises a process chamber having a plurality of walls and a substrate support to support the substrate within the process chamber. A radiative heat source is positioned outside the process chamber to heat the substrate through the walls when the substrate is positioned on the substrate support. In some embodiments, lenses are provided between the heat source and the substrate to focus or diffuse radiation from the heat source and thereby selectively alter the radiation intensity incident on certain portions of the substrate. In other embodiments, diffusing surfaces are provided between the heat source and the substrate to diffuse radiation from the heat source and thereby selectively reduce the radiation intensity incident on certain portions of the substrate.
    Type: Application
    Filed: October 3, 2002
    Publication date: April 8, 2004
    Inventors: Matthew G. Goodman, Tony J. Keeton, Ravinder Aggarwal, Mark Hawkins
  • Publication number: 20040062627
    Abstract: A substrate fabrication system is provided which includes a buffer station located inline between a front docking port and a loadlock chamber, the buffer station being operatively joined with a front handling chamber. Preferred embodiments employ a buffer station having a rack with reduced pitch, or relative spacing between shelves. Additional embodiments provide variable pitch end effectors as part of the disclosed fabrication system.
    Type: Application
    Filed: September 17, 2003
    Publication date: April 1, 2004
    Inventors: Ravinder Aggarwal, Jim Kusbel, Jim Alexander
  • Patent number: 6704496
    Abstract: A substrate to be processed in a high temperature processing chamber is preheated to avoid the problems associated with thermal shock when the substrate is dropped onto a heated susceptor. Preheating is effected by holding the substrate over a susceptor maintained at or near the processing temperature until the temperature of the substrate approaches the processing temperature. Thus, wafer warping and breakage are greatly reduced, and wafer throughput is improved because of time saved in maintaining the susceptor at constant temperature without cool down and reheat periods.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: March 9, 2004
    Assignee: ASM America, Inc.
    Inventors: Paul Jacobson, Ivo Raaijmakers, Ravinder Aggarwal, Robert C. Haro
  • Publication number: 20040043575
    Abstract: A substrate to be processed in a high temperature processing chamber is preheated to avoid the problems associated with thermal shock when the substrate is dropped onto a heated susceptor. Preheating is effected by holding the substrate over a susceptor maintained at or near the processing temperature until the temperature of the substrate approaches the processing temperature. Thus, wafer warping and breakage are greatly reduced, and wafer throughput is improved because of time saved in maintaining the susceptor at constant temperature without cool down and reheat periods.
    Type: Application
    Filed: September 3, 2003
    Publication date: March 4, 2004
    Inventors: Paul Jacobson, Ivo Raaijmakers, Ravinder Aggarwal, Robert C. Haro
  • Publication number: 20040036053
    Abstract: A slit valve for a semiconductor processing apparatus, for fluidly sealing a passage connecting two chambers of the apparatus, such as a substrate reaction chamber and a region outside the reaction chamber. The slit valve comprises an actuator plate movable within a slot in one wall of the passage, the actuator plate and the slot oriented generally transverse to the passage. The actuator plate has a first position in which the valve is open, permitting the transfer of a substrate through the passage. The actuator plate also has a second position in which the valve is closed, and in which the actuator plate fluidly seals the passage such that fluid cannot flow through the passage across the actuator plate. A protective cover is configured to prevent debris within the passage (e.g., broken wafers, shards, particulate contaminants, etc.) from flowing into the slot when the actuator plate occupies its second position.
    Type: Application
    Filed: August 20, 2002
    Publication date: February 26, 2004
    Inventors: Ravinder Aggarwal, Jim Kusbel, Jerry Davis
  • Patent number: 6696367
    Abstract: A substrate fabrication system is provided which includes a buffer station located inline between a front docking port and a loadlock chamber, the buffer station being operatively joined with a front handling chamber. Preferred embodiments employ a buffer station having a rack with reduced pitch, or relative spacing between shelves. Additional embodiments provide variable pitch end effectors as part of the disclosed fabrication system. Methods of fabricating wafers by quickly transferring them to purgeable buffer stations upon wafers arriving at a docking port are also provided.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: February 24, 2004
    Assignee: ASM America, Inc.
    Inventors: Ravinder Aggarwal, Jim Kusbel, Jim Alexander
  • Publication number: 20030234548
    Abstract: Manually operated wafer handlers are provided for handling and transporting semiconductor wafers. The wafer handlers contact the wafers only at the outer edges of the wafers, thereby preventing damage to the interior surfaces of the wafers on which integrated circuits are formed.
    Type: Application
    Filed: June 24, 2002
    Publication date: December 25, 2003
    Inventor: Ravinder Aggarwal