Patents by Inventor Ravinder Aggarwal

Ravinder Aggarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030194298
    Abstract: A substrate processing system includes a substrate handling chamber and an integrated load lock chamber. The load lock chamber has a gated inlet for the transfer of a substrate into and out of the load lock chamber and a gated port for transferring a substrate between the load lock chamber and the substrate handling chamber. The substrate handling chamber includes a staging shelf that is positioned above the load lock chamber and a substrate handler for moving a substrate between the load lock chamber and the staging shelf. In use, a first substrate is placed at a load lock station that is located inside the load lock chamber. The first substrate is moved from the load lock station to a staging shelf located inside the substrate handling chamber. A second substrate is moved from a cooling station in the substrate handling chamber to the load lock station. A third substrate is moved from a substrate processing chamber to the cooling station.
    Type: Application
    Filed: May 9, 2003
    Publication date: October 16, 2003
    Inventors: Ravinder Aggarwal, James F. Kusbel
  • Patent number: 6609869
    Abstract: A substrate processing system includes a substrate handling chamber and an integrated load lock chamber. The load lock chamber has a gated inlet for the transfer of a substrate into and out of the load lock chamber and a gated port for transferring a substrate between the load lock chamber and the substrate handling chamber. The substrate handling chamber includes a staging shelf that is positioned above the load lock chamber and a substrate handler for moving a substrate between the load lock chamber and the staging shelf. In use, a first substrate is placed at a load lock station that is located inside the load lock chamber. The first substrate is moved from the load lock station to a staging shelf located inside the substrate handling chamber. A second substrate is moved from a cooling station in the substrate handling chamber to the load lock station. A third substrate is moved from a substrate processing chamber to the cooling station.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: August 26, 2003
    Assignee: ASM America
    Inventors: Ravinder Aggarwal, James F. Kusbel
  • Patent number: 6550158
    Abstract: An apparatus and method for reducing particles in reactors. The apparatus includes an enclosure with a wafer handling chamber connected by an isolation gate valve to a processing chamber. Pipes deliver purge gas into the wafer handling chamber to eliminate particles from the enclosure. A pilot operated back pressure regulator regulates the delivery and removal of the purge gas. The apparatus actuates the isolation gate valve in a controlled rate to reduce disturbances from the purge gas entering into the enclosure. A Bernoulli wand is provided for lifting and holding a single semiconductor wafer. A dome loaded regulator actuated by a pilot gas is used to control the ramp rates of gas to the Bernoulli wand. The ramping rates of the Bernoulli wand gas can be controlled by restrictions and check valves in the pilot gas line. The apparatus also utilizes ionizers in the purge gas lines entering the wafer handling chamber and load locks.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: April 22, 2003
    Assignee: ASM America, Inc.
    Inventors: Allan Doley, Dennis Goodwin, Kenneth O'Neill, Gerben Vrijburg, David Rodriguez, Ravinder Aggarwal
  • Publication number: 20030070758
    Abstract: A substrate to be processed in a high temperature processing chamber is preheated to avoid the problems associated with thermal shock when the substrate is dropped onto a heated susceptor. Preheating is effected by holding the substrate over a susceptor maintained at or near the processing temperature until the temperature of the substrate approaches the processing temperature. Thus, wafer warping and breakage are greatly reduced, and wafer throughput is improved because of time saved in maintaining the susceptor at constant temperature without cool down and reheat periods.
    Type: Application
    Filed: November 8, 2002
    Publication date: April 17, 2003
    Inventors: Paul Jacobson, Ivo Raaijmakers, Ravinder Aggarwal, Robert C. Haro
  • Patent number: 6521503
    Abstract: A substrate to be processed in a high temperature processing chamber is preheated to avoid the problems associated with thermal shock when the substrate is dropped onto a heated susceptor. Preheating is effected by holding the substrate over a susceptor maintained at or near the processing temperature until the temperature of the substrate approaches the processing temperature. Thus, wafer warping and breakage are greatly reduced, and wafer throughput is improved because of time saved in maintaining the susceptor at constant temperature without cool down and reheat periods.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: February 18, 2003
    Assignee: ASM America, Inc.
    Inventors: Paul Jacobson, Ivo Raaijmakers, Ravinder Aggarwal, Robert C. Haro
  • Publication number: 20020155669
    Abstract: A substrate to be processed in a high temperature processing chamber is preheated to avoid the problems associated with thermal shock when the substrate is dropped onto a heated susceptor. Preheating is effected by holding the substrate over a susceptor maintained at or near the processing temperature until the temperature of the substrate approaches the processing temperature. Thus, wafer warping and breakage are greatly reduced, and wafer throughput is improved because of time saved in maintaining the susceptor at constant temperature without cool down and reheat periods.
    Type: Application
    Filed: April 23, 2001
    Publication date: October 24, 2002
    Inventors: Paul Jacobson, Ivo Raaijmakers, Ravinder Aggarwal, Robert C. Haro
  • Publication number: 20020153578
    Abstract: Wafer buffering systems for use with a wafer processing system include a frame and wheel. The wheel includes a plurality of shelves for supporting a plurality of wafer carriers. The wheel is supported by the frame for rotation about a generally horizontal axis. The plane of the wheel faces a semiconductor processing system (e.g., a cluster tool) with an intervening wafer transfer robot located preferably between the wheel and the semiconductor processing system. A cassette transfer system moves cassettes from the wheel to a port for interfacing with the wafer transfer robot. In another arrangement, a horizontal carousel stocks cassettes above the processing system.
    Type: Application
    Filed: February 28, 2002
    Publication date: October 24, 2002
    Inventors: Ravinder Aggarwal, Ivo Raaijmakers
  • Publication number: 20020085899
    Abstract: A substrate processing system includes a substrate handling chamber and an integrated load lock chamber. The load lock chamber has a gated inlet for the transfer of a substrate into and out of the load lock chamber and a gated port for transferring a substrate between the load lock chamber and the substrate handling chamber. The substrate handling chamber includes a staging shelf that is positioned above the load lock chamber and a substrate handler for moving a substrate between the load lock chamber and the staging shelf. In use, a first substrate is placed at a load lock station that is located inside the load lock chamber. The first substrate is moved from the load lock station to a staging shelf located inside the substrate handling chamber. A second substrate is moved from a cooling station in the substrate handling chamber to the load lock station. A third substrate is moved from a substrate processing chamber to the cooling station.
    Type: Application
    Filed: January 4, 2001
    Publication date: July 4, 2002
    Inventors: Ravinder Aggarwal, James F. Kusbel
  • Patent number: 6242718
    Abstract: A Bernoulli wand type semiconductor wafer pickup device that is adapted to regulate the temperature of a wafer while the wafer is being repositioned within a semiconductor processing system. In one embodiment, the device is comprised of a resistive heating element that is adapted to raise the temperature of the pickup device. In particular, by raising the temperature of the pickup device, a portion of the thermal radiation emitted from the device is absorbed by the wafer, thus providing a means for regulating the wafer temperature. In another embodiment, the device is adapted with the characteristics of a black body absorber so as to enable the device to optimally absorb thermal radiation from external radiant sources, thereby providing a means for increasing the temperature of the device. In another embodiment, the device is coated with reflective material that enables a large portion of thermal radiation emitted from the wafer to be reflected and absorbed back into the wafer.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: June 5, 2001
    Assignee: ASM America, Inc.
    Inventors: Armand Ferro, Ivo Raaijmakers, Ravinder Aggarwal, Ronald R. Stevens
  • Publication number: 20010000759
    Abstract: An apparatus and method for reducing particles in reactors. The apparatus includes an enclosure with a wafer handling chamber connected by an isolation gate valve to a processing chamber. Pipes deliver purge gas into the wafer handling chamber to eliminate particles from the enclosure. A pilot operated back pressure regulator regulates the delivery and removal of the purge gas. The apparatus actuates the isolation gate valve in a controlled rate to reduce disturbances from the purge gas entering into the enclosure. A Bernoulli wand is provided for lifting and holding a single semiconductor wafer. A dome loaded regulator actuated by a pilot gas is used to control the ramp rates of gas to the Bernoulli wand. The ramping rates of the Bernoulli wand gas can be controlled by restrictions and check valves in the pilot gas line. The apparatus also utilizes ionizers in the purge gas lines entering the wafer handling chamber and load locks.
    Type: Application
    Filed: December 1, 2000
    Publication date: May 3, 2001
    Inventors: Allan Doley, Dennis Goodwin, Kenneth O'Neill, Gerben Vrijburg, David Rodriguez, Ravinder Aggarwal
  • Patent number: 6162006
    Abstract: A stackable cassette for testing at least one separate wafer during the processing of a plurality of semiconductor wafers is disclosed. The stackable cassette includes a bottom surface which conforms to a top portion of a base cassette having a plurality of wafers. In addition, the stackable cassette includes two or more supports which extend vertically from the bottom surface and a top surface horizontally connected to the two supports. The supports include ribs which form channels for holding at least one wafer. When processing the plurality of wafers, the stackable cassette is placed on top of a base cassette. A specified processed wafer is placed within the stackable cassette. The stackable cassette is then removed for inspection of the test wafer.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: December 19, 2000
    Assignee: ASM America, Inc.
    Inventors: Ronald R. Stevens, Ravinder Aggarwal
  • Patent number: 6042324
    Abstract: Two FOUPs are stacked and moved together towards an equipment wall by a horizontal actuator. FOUP doors are withdrawn as a unit by a horizontal actuator, and lowered as a unit by a vertical actuator to provide access to the interior of the FOUPs.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: March 28, 2000
    Assignee: ASM America, Inc.
    Inventors: Ravinder Aggarwal, Ronald R. Stevens