Abstract: An inventive method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating IC's on the wafers. At probe, a unique fuse ID is stored in each IC, and an electronic wafer map is electronically stored for each wafer indicating the locations of good and bad IC's on the wafer and the fuse ID's of the IC's on the wafer. Each IC is then separated from its wafer to form an IC die, and the IC dice are assembled into IC devices. At the opens/shorts test at the end of assembly, the fuse ID of each IC device is automatically retrieved so the wafer map of the IC device may be accessed and evaluated to identify any IC devices containing bad IC's that have accidentally been assembled into IC devices. These "bad" IC devices are discarded, and the remaining IC devices continue on to back-end testing.

Abstract: A semiconductor wafer having dice that include circuitry that is placed into a mode when the circuitry receives an alternating signal having certain characteristics. The alternating signal may be supplied from a system controller through a probe, probe pad, and conductive path on the wafer. In a preferred embodiment, the conductive path simultaneously carries a VCC power signal and the alternating signal to the circuitry. However, the alternating signal may be carried on a conductive path different from the one carrying the VCC signal. A great deal of information may be conveyed through the alternating signal, making other signals unnecessary in controlling, testing, stressing, and repairing dice on the wafer. For example, clocking information may be conveyed through the alternating signal. The circuitry may be placed in different modes in response to different characteristics of the alternating signal. The alternating signal and a VCC power signal are received through a single contact on each die.

Abstract: A method for sorting integrated circuit (IC) devices of the type having a fuse identification (ID) into those devices requiring enhanced reliability testing and those requiring standard testing includes storing fabrication deviation data, probe data, and test data in association with the fuse ID of each of the devices indicating each of the devices requires either enhanced reliability testing or standard testing. The fuse ID of each of the devices is then automatically read before, during, or after standard testing of the devices. The testing process requirement data stored in association with the fuse ID of each of the devices is then accessed, and the devices are sorted in accordance with the accessed data into those devices requiring enhanced reliability testing and those requiring standard testing. The method thus directs those devices needing enhanced reliability testing to such testing without the need for all devices from the same wafer or wafer lot to proceed through special testing.