Patents by Inventor Reinhard Stengl
Reinhard Stengl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8178966Abstract: An integrated circuit arrangement and method of fabricating the integrated circuit arrangement is provided. At least one integrated electronic component is arranged at a main area of a substrate. The component is arranged in the substrate or is isolated from the substrate by an electrically insulating region. Main channels are formed in the substrate and arranged along the main area. Each main channel is completely surrounded by the substrate transversely with respect to a longitudinal axis. Transverse channels are arranged transversely with respect to the main channels. Each transverse channel opens into at least one main channel. More than about ten transverse channels open into a main channel.Type: GrantFiled: November 5, 2010Date of Patent: May 15, 2012Assignee: Infineon Technologies AGInventors: Volker Lehmann, Reinhard Stengl, Herbert Schäfer
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Patent number: 8003475Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.Type: GrantFiled: March 20, 2008Date of Patent: August 23, 2011Assignee: Infineon Technologies AGInventors: Josef Böck, Rudolf Lachner, Thomas Meister, Reinhard Stengl, Herbert Schäfer, Martin Seck
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Patent number: 7968972Abstract: A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the base connection region. The collector connection region contains a buried layer, which connects the collector contact to a collector zone. A silicide or salicide region is provided on the buried layer and connects the collector contact to the collector zone in a low-impedance manner. A second insulation layer is disposed on the collector connection region but not on the silicide region.Type: GrantFiled: March 3, 2010Date of Patent: June 28, 2011Assignee: Infineon Technologies AGInventors: Josef Böck, Thomas Meister, Reinhard Stengl, Herbert Schäfer
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Publication number: 20110042046Abstract: An integrated circuit arrangement and method of fabricating the integrated circuit arrangement is provided. At least one integrated electronic component is arranged at a main area of a substrate. The component is arranged in the substrate or is isolated from the substrate by an electrically insulating region. Main channels are formed in the substrate and arranged along the main area. Each main channel is completely surrounded by the substrate transversely with respect to a longitudinal axis. Transverse channels are arranged transversely with respect to the main channels. Each transverse channel opens into at least one main channel. More than about ten transverse channels open into a main channel.Type: ApplicationFiled: November 5, 2010Publication date: February 24, 2011Inventors: Volker Lehmann, Reinhard Stengl, Herbert Schäfer
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Patent number: 7872349Abstract: An integrated circuit arrangement and method of fabricating the integrated circuit arrangement is provided. At least one integrated electronic component is arranged at a main area of a substrate. The component is arranged in the substrate or is isolated from the substrate by an electrically insulating region. Main channels are formed in the substrate and arranged along the main area. Each main channel is completely surrounded by the substrate transversely with respect to a longitudinal axis. Transverse channels are arranged transversely with respect to the main channels. Each transverse channel opens into at least one main channel. More than about ten transverse channels open into a main channel.Type: GrantFiled: January 3, 2006Date of Patent: January 18, 2011Assignee: Infineon Technologies AGInventors: Volker Lehmann, Reinhard Stengl, Herbert Schaefer
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Publication number: 20100155896Abstract: A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the base connection region. The collector connection region contains a buried layer, which connects the collector contact to a collector zone. A silicide or salicide region is provided on the buried layer and connects the collector contact to the collector zone in a low-impedance manner. A second insulation layer is disposed on the collector connection region but not on the silicide region.Type: ApplicationFiled: March 3, 2010Publication date: June 24, 2010Inventors: Josef Böck, Thomas Meister, Reinhard Stengl, Herbert Schafer
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Patent number: 7719088Abstract: A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the base connection region. The collector connection region contains a buried layer, which connects the collector contact to a collector zone. A silicide or salicide region is provided on the buried layer and connects the collector contact to the collector zone in a low-impedance manner. A second insulation layer is disposed on the collector connection region but not on the silicide region.Type: GrantFiled: October 20, 2005Date of Patent: May 18, 2010Assignee: Infineon Technologies AGInventors: Josef Böck, Thomas Meister, Reinhard Stengl, Herbert Schäfer
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Patent number: 7612430Abstract: The silicon bipolar transistor (100) comprises a base, with a first highly-doped base layer (105) and a second poorly-doped base layer (106) which together form the base. The emitter is completely highly-doped and mounted directly on the second base layer (106).Type: GrantFiled: June 15, 2001Date of Patent: November 3, 2009Assignee: Infineon Technologies AGInventors: Martin Franosch, Thomas Meister, Herbert Schäfer, Reinhard Stengl, Konrad Wolf
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Publication number: 20090011556Abstract: A method for producing a microelectronic structure is suggested in which a layer structure (30) which partially covers a substrate (5) and which comprises at least one first conductive layer (15,20) which reaches to a side wall (35) of the layer structure (30), is covered with a second conductive layer (45). The second conductive layer (45) is then subsequently back-etched to as great an extent as possible with an etching process with physical delamination, wherein delaminated material deposits on the side wall (35) of the layer structure (30). On the side wall (35) the delaminated material forms a protection layer (60) by means of which the first conductive layer (15,20) is to be protected from attack by oxygen to the furthest extent possible.Type: ApplicationFiled: September 5, 2001Publication date: January 8, 2009Inventors: Gerhard Beitel, Wolfgang Hoenlein, Reinhard Stengl, Elke Fritsch, Siegfried Schwarzl, Hermann Wendt
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Publication number: 20080227261Abstract: The invention relates to a method for fabricating a transistor structure, comprising at least a first and a second bipolar transistor having different collector widths. The invention is distinguished by the fact that all junctions between differently doped regions have a sharp interface. In this case, by way of example, a first collector region 2.1 is suitable for a high-frequency transistor with high limiting frequencies fT and a second collector region 2.2 is suitable for a high-voltage transistor with increased breakdown voltages.Type: ApplicationFiled: March 20, 2008Publication date: September 18, 2008Inventors: Josef Bock, Rudolf Lachner, Thomas Meister, Reinhard Stengl, Herbert Schafer, Martin Seck
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Patent number: 7420228Abstract: A bipolar transistor comprising a collector region of a first conduction type, and a subcollector region of the first conduction type at a first side of the collector region. The transistor further includes a base region of the second conduction type provided at a second side of the collector region, and an emitter region of the first conduction type which is provided above the base region on the side remote from the collection region. A carbon-doped semiconductor region is provided on the first side alongside the collector region. The bipolar transistor is characterized in that the carbon-doped semiconductor region has a carbon concentration of 1019-1021 cm?3 and the base region has a smaller cross section than the collector region and the collector region has, in the overlap region with the base region, a region having an increased doping compared with the remaining region.Type: GrantFiled: October 7, 2005Date of Patent: September 2, 2008Assignee: Infineon Technologies AGInventors: Josef Bock, Thomas Meister, Reinhard Stengl, Herbert Schafer
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Patent number: 7371650Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.Type: GrantFiled: October 24, 2003Date of Patent: May 13, 2008Assignee: Infineon Technologies AGInventors: Josef Böck, Rudolf Lachner, Thomas Meister, Reinhard Stengl, Herbert Schäfer, Martin Seck
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Patent number: 7285470Abstract: The invention relates to a method for producing a bipolar semiconductor element, especially a bipolar transistor, and a corresponding bipolar semiconductor component.Type: GrantFiled: September 30, 2005Date of Patent: October 23, 2007Assignee: Infineon Technologies AGInventors: Josef Bock, Thomas Meister, Reinhard Stengl, Herbert Schafer
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Patent number: 7135757Abstract: A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third layer is formed with an emitter cutout for an emitter. An undercut is formed in the second layer adjoining the base cutout. The base is at least partially located in the undercut. In order to obtain a low transition resistance between the lead and the base, an intermediate layer is provided between the first and the second layer. The intermediate layer is selectively etchable with respect to the second layer. At least in the region of the undercut between the lead and the base, a base connection zone is provided that can be adjusted independent of other production conditions. The intermediate layer is removed in a contact region with the base.Type: GrantFiled: August 4, 2004Date of Patent: November 14, 2006Assignee: Infineon Technologies AGInventors: Reinhard Stengl, Thomas Meister, Herbert Schäfer, Martin Franosch
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Patent number: 7105415Abstract: The invention relates to a method for producing a bipolar transistor. A semiconductor substrate is provided that encompasses a collector area of a first conductivity type, which is embedded therein and is bare towards the top. A monocrystalline base area is provided and a base-connecting area of the second conductivity type is provided above the base area. An insulating area is provided above the base-connecting area and a window is formed in the insulating area and the base-connecting area so as to at least partly expose the base area. An insulating sidewall spacer is provided in the window in order to insulate the base-connecting area. An emitter layer which forms a monocrystalline emitter area above the base area and a polycrystalline emitter area above the insulating area and the sidewall spacer is differentially deposited and structured, and a tempering step is carried out.Type: GrantFiled: June 15, 2005Date of Patent: September 12, 2006Assignee: Infineon Technologies AGInventors: Josef Bock, Thomas Meister, Reinhard Stengl, Herbert Schafer
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Publication number: 20060171116Abstract: An integrated circuit arrangement and method of fabricating the integrated circuit arrangement is provided. At least one integrated electronic component is arranged at a main area of a substrate. The component is arranged in the substrate or is isolated from the substrate by an electrically insulating region. Main channels are formed in the substrate and arranged along the main area. Each main channel is completely surrounded by the substrate transversely with respect to a longitudinal axis. Transverse channels are arranged transversely with respect to the main channels. Each transverse channel opens into at least one main channel. More than about ten transverse channels open into a main channel.Type: ApplicationFiled: January 3, 2006Publication date: August 3, 2006Inventors: Volker Lehmann, Reinhard Stengl, Herbert Schafer
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Patent number: 7064360Abstract: A method is provided to fabricate a bipolar transistor with a low base connection resistance, low defect density and improved scalability. Scalability is to be understood in this case as both the lateral scaling of the emitter window and the vertical scaling of the base width (low temperature budget). The temperature budget can be kept low in the base region since no implantations are required in order to reduce the base connection resistance. Furthermore, the difficulties associated with the point defects are largely avoided.Type: GrantFiled: February 4, 2002Date of Patent: June 20, 2006Assignee: Infineon Technologies AGInventors: Martin Franosch, Thomas Meister, Herbert Schaefer, Reinhard Stengl
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Publication number: 20060040453Abstract: A bipolar transistor comprising a collector region of a first conduction type, and a subcollector region of the first conduction type at a first side of the collector region. The transistor further includes a base region of the second conduction type provided at a second side of the collector region, and an emitter region of the first conduction type which is provided above the base region on the side remote from the collection region. A carbon-doped semiconductor region is provided on the first side alongside the collector region. The bipolar transistor is characterized in that the carbon-doped semiconductor region has a carbon concentration of 1019-1021 cm?3 and the base region has a smaller cross section than the collector region and the collector region has, in the overlap region with the base region, a region having an increased doping compared with the remaining region.Type: ApplicationFiled: October 7, 2005Publication date: February 23, 2006Inventors: Josef Bock, Thomas Meister, Reinhard Stengl, Herbert Schafer
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Publication number: 20060038258Abstract: A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the base connection region. The collector connection region contains a buried layer, which connects the collector contact to a collector zone. A silicide or salicide region is provided on the buried layer and connects the collector contact to the collector zone in a low-impedance manner. A second insulation layer is disposed on the collector connection region but not on the silicide region.Type: ApplicationFiled: October 20, 2005Publication date: February 23, 2006Inventors: Josef Bock, Thomas Meister, Reinhard Stengl, Hertbert Schafer
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Publication number: 20060040456Abstract: The invention relates to a method for producing a bipolar semiconductor element, especially a bipolar transistor, and a corresponding bipolar semiconductor component.Type: ApplicationFiled: September 30, 2005Publication date: February 23, 2006Inventors: Josef Bock, Thomas Meister, Reinhard Stengl, Herbert Schafer