Patents by Inventor Ren Kimura

Ren Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210351092
    Abstract: A semiconductor apparatus includes a heatsink plate, a substrate disposed on the heatsink plate, a circuit pattern disposed on the substrate, a semiconductor chip disposed on the circuit pattern, a case fixed to the heatsink plate and surrounding an outer perimeter of the substrate, a terminal attached to the case, and a wire configured to electrically connect the terminal to the circuit pattern or to the semiconductor chip. In a plan view as viewed in the thickness direction of the heatsink plate, a portion of the circuit pattern overlaps the terminal.
    Type: Application
    Filed: October 10, 2019
    Publication date: November 11, 2021
    Inventors: Toru HIYOSHI, Hirotaka OOMORI, Ren KIMURA
  • Publication number: 20190236268
    Abstract: A behavior determining method includes causing a program to operate on a virtual environment including a virtual memory, while the program is operating on the virtual environment, generating access information of the virtual memory for determining a behavior of the program, based on information of at least one of a first flag or a second flag, the first flag indicating whether or not the program has read from a location in a virtual address space, and the second flag indicating whether or not the program has written to the location in the virtual address space, and inferring whether the behavior of the program is normal or abnormal, based on the access information.
    Type: Application
    Filed: January 30, 2019
    Publication date: August 1, 2019
    Applicant: Preferred Networks, Inc.
    Inventors: Ren KIMURA, Hirochika ASAI, Yusuke DOI
  • Patent number: 9831080
    Abstract: A method for manufacturing a semiconductor device includes a step of preparing a SiC substrate, a step of fixing the SiC substrate on an electrostatic chuck and heat-treating the SiC substrate, and a step of performing ion implantation treatment on the SiC substrate fixed on the electrostatic chuck and heat-treated. The step of heat-treating includes an outer circumferential-side chucking step which generates an electrostatic attraction force between an outer circumferential region of the SiC substrate and an outer circumferential portion of the electrostatic chuck, the outer circumferential portion facing the outer circumferential region, and an inner circumferential-side chucking step which is started after the outer circumferential-side chucking step is started, and generates an electrostatic attraction force between an inner circumferential region of the SiC substrate and an inner circumferential portion of the electrostatic chuck, the inner circumferential portion facing the inner circumferential region.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: November 28, 2017
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ryosuke Kubota, Ren Kimura, So Tanaka, Kazuhito Kobashi
  • Publication number: 20170076934
    Abstract: A method for manufacturing a semiconductor device includes a step of preparing a SiC substrate, a step of fixing the SiC substrate on an electrostatic chuck and heat-treating the SiC substrate, and a step of performing ion implantation treatment on the SiC substrate fixed on the electrostatic chuck and heat-treated. The step of heat-treating includes an outer circumferential-side chucking step which generates an electrostatic attraction force between an outer circumferential region of the SiC substrate and an outer circumferential portion of the electrostatic chuck, the outer circumferential portion facing the outer circumferential region, and an inner circumferential-side chucking step which is started after the outer circumferential-side chucking step is started, and generates an electrostatic attraction force between an inner circumferential region of the SiC substrate and an inner circumferential portion of the electrostatic chuck, the inner circumferential portion facing the inner circumferential region.
    Type: Application
    Filed: March 25, 2015
    Publication date: March 16, 2017
    Inventors: Ryosuke Kubota, Ren Kimura, So Tanaka, Kazuhito Kobashi
  • Publication number: 20150287817
    Abstract: A first portion of a silicon carbide substrate having an impurity of a first conductivity type is disposed deeper than a first depth position. A second portion is disposed to extend from the first depth position to a second depth position shallower than the first depth position. A third portion is disposed to extend from the second depth position to a main surface. The second portion has a second impurity concentration higher than a first impurity concentration of the first portion. The third portion has a third impurity concentration not less than the first impurity concentration and less than the second impurity concentration. A body region having an impurity of a second conductivity type has an impurity concentration peak at a depth position shallower than the first depth position and deeper than the second depth position.
    Type: Application
    Filed: September 17, 2013
    Publication date: October 8, 2015
    Inventors: Ryosuke Kubota, Toru Hiyoshi, Ren Kimura
  • Publication number: 20130344626
    Abstract: A semiconductor substrate having a surface is prepared. An electrical conductor film is formed on a region including the surface of the semiconductor substrate. The step of forming the electrical conductor film includes the steps of measuring, at a point of time when the electrical conductor film is partially formed, a characteristic related to at least one of alternating current loss and alternating current electrical conductivity of the electrical conductor film partially formed, and adjusting a film formation condition for forming the electrical conductor film based on the characteristic. Thereby, a surface roughness of the film being formed can be fed back to the film formation condition.
    Type: Application
    Filed: May 14, 2013
    Publication date: December 26, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Ren Kimura
  • Patent number: D702655
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: April 15, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Ren Kimura
  • Patent number: D703161
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: April 22, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Ren Kimura