Abstract: A semiconductor includes: a substrate; a circuit pattern on the substrate, and including a first region, a second region located away from the first region, and a third region between the first region and the second region; a first chip disposed in the second region and including a diode; a second chip disposed in the third region, the second chip including a vertical transistor having a source pad disposed on a surface opposite to a surface facing the third region in a thickness direction of the substrate, and a gate pad disposed at a position different from the source pad; a first wire including a first bonded portion bonded to the first region, a second bonded portion bonded to the second chip, and a third bonded portion bonded to the first chip; and a second wire arranged to be adjacent to the first wire with the gate pad sandwiched therebetween.

Abstract: A method of manufacturing a photodetection device includes preparing a first substrate having a first electrode; forming, on the first substrate, a photoresist film having an opening through which the first electrode is exposed; forming, through the opening, a metallic film containing a first metal on the first electrode; and removing, after the forming of the metallic film, the photoresist film. The forming of the metallic film includes vapor-depositing the metallic film on the first electrode and on the photoresist film, and heating the metallic film formed on the photoresist film.

Abstract: A method of manufacturing a photodetection device, the method includes preparing a light-receiving element including a first main surface including an arrangement of a plurality of first electrodes, forming a first bump containing In on each of the plurality of first electrodes, preparing a circuit substrate including a second main surface including an arrangement of a plurality of second electrodes, forming a second bump containing In on each of the plurality of second electrodes, forming, at at least one of a surface of the first bump or a surface of the second bump, a first oxide film containing In, placing the first main surface and the second main surface so as to face each other, and placing the first bump and the second bump on top of each other with the first oxide film therebetween.

Abstract: Provided is an accurate, minimally invasive method for diagnosing dementia or mild cognitive impairment. The method for examining the likelihood of mild cognitive impairment or dementia, or the risk of dementia includes the steps of: measuring the amount of stereoisomers of proline in the biological sample collected from a subject; and comparing the level of D-proline with a reference value.

Abstract: A semiconductor includes: a substrate; a circuit pattern on the substrate, and including a first region, a second region located away from the first region, and a third region between the first region and the second region; a first chip disposed in the second region and including a diode; a second chip disposed in the third region, the second chip including a vertical transistor having a source pad disposed on a surface opposite to a surface facing the third region in a thickness direction of the substrate, and a gate pad disposed at a position different from the source pad; a first wire including a first bonded portion bonded to the first region, a second bonded portion bonded to the second chip, and a third bonded portion bonded to the first chip; and a second wire arranged to be adjacent to the first wire with the gate pad sandwiched therebetween.

Abstract: A semiconductor apparatus includes a heatsink plate, a substrate disposed on the heatsink plate, a circuit pattern disposed on the substrate, a semiconductor chip disposed on the circuit pattern, a case fixed to the heatsink plate and surrounding an outer perimeter of the substrate, a terminal attached to the case, and a wire configured to electrically connect the terminal to the circuit pattern or to the semiconductor chip. In a plan view as viewed in the thickness direction of the heatsink plate, a portion of the circuit pattern overlaps the terminal.

Abstract: A behavior determining method includes causing a program to operate on a virtual environment including a virtual memory, while the program is operating on the virtual environment, generating access information of the virtual memory for determining a behavior of the program, based on information of at least one of a first flag or a second flag, the first flag indicating whether or not the program has read from a location in a virtual address space, and the second flag indicating whether or not the program has written to the location in the virtual address space, and inferring whether the behavior of the program is normal or abnormal, based on the access information.

Abstract: A method for manufacturing a semiconductor device includes a step of preparing a SiC substrate, a step of fixing the SiC substrate on an electrostatic chuck and heat-treating the SiC substrate, and a step of performing ion implantation treatment on the SiC substrate fixed on the electrostatic chuck and heat-treated. The step of heat-treating includes an outer circumferential-side chucking step which generates an electrostatic attraction force between an outer circumferential region of the SiC substrate and an outer circumferential portion of the electrostatic chuck, the outer circumferential portion facing the outer circumferential region, and an inner circumferential-side chucking step which is started after the outer circumferential-side chucking step is started, and generates an electrostatic attraction force between an inner circumferential region of the SiC substrate and an inner circumferential portion of the electrostatic chuck, the inner circumferential portion facing the inner circumferential region.

Abstract: A method for manufacturing a semiconductor device includes a step of preparing a SiC substrate, a step of fixing the SiC substrate on an electrostatic chuck and heat-treating the SiC substrate, and a step of performing ion implantation treatment on the SiC substrate fixed on the electrostatic chuck and heat-treated. The step of heat-treating includes an outer circumferential-side chucking step which generates an electrostatic attraction force between an outer circumferential region of the SiC substrate and an outer circumferential portion of the electrostatic chuck, the outer circumferential portion facing the outer circumferential region, and an inner circumferential-side chucking step which is started after the outer circumferential-side chucking step is started, and generates an electrostatic attraction force between an inner circumferential region of the SiC substrate and an inner circumferential portion of the electrostatic chuck, the inner circumferential portion facing the inner circumferential region.

Abstract: A first portion of a silicon carbide substrate having an impurity of a first conductivity type is disposed deeper than a first depth position. A second portion is disposed to extend from the first depth position to a second depth position shallower than the first depth position. A third portion is disposed to extend from the second depth position to a main surface. The second portion has a second impurity concentration higher than a first impurity concentration of the first portion. The third portion has a third impurity concentration not less than the first impurity concentration and less than the second impurity concentration. A body region having an impurity of a second conductivity type has an impurity concentration peak at a depth position shallower than the first depth position and deeper than the second depth position.

Abstract: A semiconductor substrate having a surface is prepared. An electrical conductor film is formed on a region including the surface of the semiconductor substrate. The step of forming the electrical conductor film includes the steps of measuring, at a point of time when the electrical conductor film is partially formed, a characteristic related to at least one of alternating current loss and alternating current electrical conductivity of the electrical conductor film partially formed, and adjusting a film formation condition for forming the electrical conductor film based on the characteristic. Thereby, a surface roughness of the film being formed can be fed back to the film formation condition.