Patents by Inventor Ren Wang

Ren Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149438
    Abstract: A semiconductor structure includes a first dielectric layer, a first conductive feature, a second conductive feature, a first etch stop layer, and a conductive via. The first conductive feature and the second conductive feature are embedded in the first dielectric layer. The first etch stop layer is disposed over the dielectric layer. The conductive via is surrounded by the first etch stop layer and electrically connected to the first conductive feature, in which the conductive via is in contact with a top surface of the first etch stop layer.
    Type: Application
    Filed: January 7, 2025
    Publication date: May 8, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Ren WANG, Tze-Liang LEE, Jen-Hung WANG
  • Patent number: 12293947
    Abstract: A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain. The method may include filling the opening with a metal layer that covers the exposed portions of the first source/drain and the second source/drain, and forming a gap in the metal layer to create a first metal contact and a second metal contact. The first metal contact may electrically couple to the first source/drain and the second metal contact may electrically couple to the second source/drain. The gap may separate the first metal contact from the second metal contact by less than nineteen nanometers.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: May 6, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Lien Huang, Ching-Feng Fu, Huan-Just Lin, Fu-Sheng Li, Tsai-Jung Ho, Bor Chiuan Hsieh, Guan-Xuan Chen, Guan-Ren Wang
  • Patent number: 12293231
    Abstract: Examples described herein include a device interface; a first set of one or more processing units; and a second set of one or more processing units. In some examples, the first set of one or more processing units are to perform heavy flow detection for packets of a flow and the second set of one or more processing units are to perform processing of packets of a heavy flow. In some examples, the first set of one or more processing units and second set of one or more processing units are different. In some examples, the first set of one or more processing units is to allocate pointers to packets associated with the heavy flow to a first set of one or more queues of a load balancer and the load balancer is to allocate the packets associated with the heavy flow to one or more processing units of the second set of one or more processing units based, at least in part on a packet receive rate of the packets associated with the heavy flow.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: May 6, 2025
    Assignee: Intel Corporation
    Inventors: Chenmin Sun, Yipeng Wang, Rahul R. Shah, Ren Wang, Sameh Gobriel, Hongjun Ni, Mrittika Ganguli, Edwin Verplanke
  • Patent number: 12288522
    Abstract: An electronic device includes a display and a sensor underneath the display. The display has a full pixel density region and a reduced pixel density region. Compared to pixels in the full pixel density region, pixels in the reduced pixel density region can be controlled using overdriven power supply voltages, overdriven scan control signals, different initialization and reset voltages, and can include capacitors and transistors with different physical and electrical characteristics. Gate drivers provide scan signals to pixels in the full pixel density region, whereas overdrive buffers provide overdrive scan signals to pixels in the reduced pixel density region. The pixels in the full pixel density region and the pixels in the reduced pixel density region can be controlled using different black level or gamma settings for each color channel and can be adjusted physically to match luminance, color, as well as to mitigate differences in temperature and aging impact.
    Type: Grant
    Filed: July 11, 2023
    Date of Patent: April 29, 2025
    Assignee: Apple Inc.
    Inventors: Shyuan Yang, Salman Kabir, Ricardo A Peterson, Warren S Rieutort-Louis, Ting-Kuo Chang, Qing Li, Yuchi Che, Tsung-Ting Tsai, Feng Wen, Abbas Jamshidi Roudbari, Kyounghwan Kim, Graeme M Williams, Kingsuk Brahma, Yue Jack Chu, Junbo Wu, Chieh-Wei Chen, Bo-Ren Wang, Injae Hwang, Wenbing Hu
  • Publication number: 20250120113
    Abstract: A semiconductor device and method of manufacture are provided which help to support contacts while material is removed to form air gaps. In embodiments a contact is formed with an enlarged base to help support overlying portions of the contact. In other embodiments a scaffold material may also be placed prior to the formation of the air gaps in order to provide additional support.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Inventors: Ching-Feng Fu, Guan-Ren Wang, Yun-Min Chang, Yu-Lien Huang
  • Publication number: 20250110755
    Abstract: A method for providing an interface includes acquiring a general interface specification associated with a back-end interface. The method further includes generating, based on the general interface specification and a first mapping, a first front-end interface specification. The method further includes converting, based on the first front-end interface specification, a first front-end request into a first back-end request associated with the back-end interface. The method further includes generating, based on the general interface specification and a second mapping, a second front-end interface specification, the second mapping indicating a relationship between the general interface specification and the second front-end interface specification. Furthermore, the method further includes converting, based on the second front-end interface specification, a second front-end request into a second back-end request associated with the back-end interface.
    Type: Application
    Filed: November 9, 2023
    Publication date: April 3, 2025
    Inventors: Yuefeng Li, Ren Wang, Yun Zhang, Weiyang Liu, Qi Wang
  • Patent number: 12264207
    Abstract: A rotary engine that generates electricity using differences in relative humidity. A water-responsive material expands and contracts as water evaporates which drives the rotation of two wheels. The rotary motion drives an electrical generator which produces electricity. In another embodiment, the water-responsive material is used to actuate an artificial muscle of a robotic device.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: April 1, 2025
    Assignee: Research Foundation of the City University of New York
    Inventors: Xi Chen, Rein V. Ulijn, Zhi-Lun Liu, Yi-Ren Wang, Daniela Kroiss, Haozhen Wang
  • Patent number: 12265857
    Abstract: A method of managing resources is provided in embodiments of the present disclosure. The method includes determining a set of candidate historical requests associated with a target request. Here, the set of candidate historical requests has the same request type and target resource as the target request. The method further includes determining a target request pattern of the target request based on at least one previous request of the target request. The method includes determining a target historical request from the set of candidate historical requests based on the target request pattern. The method includes generating a target response to the target request based on a historical response to the target historical request. In this way, by determining a response to a historical request that has the most similar request pattern to the target request, a simulated response that is more in line with the context can be generated.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 1, 2025
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Qi Wang, Ren Wang, Yun Zhang, Ming Zhang, Weiyang Liu
  • Patent number: 12237224
    Abstract: An improved method of forming conductive features and a semiconductor device formed by the same are disclosed. In an embodiment, a method includes forming a metal line extending through a first dielectric layer, the metal line being electrically coupled to a transistor; selectively depositing a sacrificial material over the metal line; selectively depositing a first dielectric material over the first dielectric layer and adjacent to the sacrificial material; selectively depositing a second dielectric material over the first dielectric material; removing the sacrificial material to form a first recess exposing the metal line; and forming a metal via in the first recess and electrically coupled to the metal line.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: February 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Wei-Ren Wang, Jen Hung Wang, Tze-Liang Lee
  • Patent number: 12237398
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: February 25, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Yu-Ren Wang, Ying-Wei Yen, Fu-Jung Chuang, Ya-Yin Hsiao, Nan-Yuan Huang
  • Patent number: 12230567
    Abstract: A semiconductor structure includes a first dielectric layer, a first conductive feature, a second conductive feature, a first etch stop layer, and a conductive via. The first conductive feature and the second conductive feature are embedded in the first dielectric layer. The first etch stop layer is disposed over the dielectric layer. The conductive via is surrounded by the first etch stop layer and electrically connected to the first conductive feature, in which the conductive via is in contact with a top surface of the first etch stop layer.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: February 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Ren Wang, Tze-Liang Lee, Jen-Hung Wang
  • Patent number: 12224339
    Abstract: An HEMT includes an aluminum gallium nitride layer. A gallium nitride layer is disposed below the aluminum gallium nitride layer. A zinc oxide layer is disposed under the gallium nitride layer. A source electrode and a drain electrode are disposed on the aluminum gallium nitride layer. A gate electrode is disposed on the aluminum gallium nitride layer and between the drain electrode and the source electrode.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: February 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Ming Hsu, Yu-Chi Wang, Yen-Hsing Chen, Tsung-Mu Yang, Yu-Ren Wang
  • Patent number: 12215274
    Abstract: A resin slurry for a fractured-vuggy formation and the preparation and use thereof, which belong to the field of drilling fluid lost circulation control. The resin slurry plugging system is composed of the following raw materials in mass percentage: 20%-40% of composite resin plugging agent, 0.5%-5.0% of consolidating agent, 0.5%-5.0% of flow pattern regulator, 0.3%-1.2% of cross-linking agent, 0.3%-1.2% of retarder, 3%-12% of filling agent, and the balance of water. The plugging system has a certain fluidity under low-temperature conditions, is easy to be injected into the formation, and can fill a lose channel of a fractured-vuggy reservoir. The consolidating time of the plugging system is controllable, and the construction conditions are safe. The plugging system forms a three-dimensional cross-linked network structure consolidation after cross-linking and consolidating under high-temperature conditions of the formation.
    Type: Grant
    Filed: July 23, 2024
    Date of Patent: February 4, 2025
    Assignees: CHINA UNIVESITY OF PETROLEUM (EAST CHINA), SOUTHWEST PETROLEUM UNIVESITY
    Inventors: Yingrui Bai, Jingbin Yang, Jinsheng Sun, Yang Bai, Ren Wang, Kaihe Lv, Guancheng Jiang, Fan Liu, Chengyuan Xu
  • Patent number: 12213412
    Abstract: A method for micro-ridge mixed-sowing cultivation of rice includes: S1: draining away water at the maturity stage of the preceding crop until reaching a state allowing a harvester to operate; S2: harvesting the preceding crop, leaving the stubble, smashing the stalks of the preceding crop, and then spreading the smashed stalks on the stubble to form a rhizosphere layer for rice growth; S3: trenching the field to form ecological trenches; S4: flattening the standing stubble and the smashed stalks on the seedbed surface to form an underlying surface, molding seed-fertilizer-soil compounds into a ridge shape and fall the seed-fertilizer-soil compounds on the underlying surface to form ecological ridges, wherein a plurality of ecological ridges are formed between adjacent ecological trenches, and the seed-fertilizer-soil compounds are obtained by thoroughly mixing rice seeds, chemical fertilizers and soil at a mass ratio of 6 to 14:50 to 70:6,000 to 10,000.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: February 4, 2025
    Assignee: Hunan Agriculture University
    Inventors: Huang Huang, Yin Zhang, Ren Wang, Xiangsheng Gong, Zhiqiang Fu, Can Chen, Zhengjun Yu, Jingyi Li, Yugang Liang, Jiaolong Ding, Xiangjie Meng, Dan Wu, Yao Huang, Xiaolan Liao
  • Patent number: 12210434
    Abstract: An apparatus and method for closed loop dynamic resource allocation.
    Type: Grant
    Filed: June 27, 2020
    Date of Patent: January 28, 2025
    Assignee: Intel Corporation
    Inventors: Bin Li, Ren Wang, Kshitij Arun Doshi, Francesc Guim Bernat, Yipeng Wang, Ravishankar Iyer, Andrew Herdrich, Tsung-Yuan Tai, Zhu Zhou, Rasika Subramanian
  • Patent number: 12211937
    Abstract: A semiconductor device and method of manufacture are provided which help to support contacts while material is removed to form air gaps. In embodiments a contact is formed with an enlarged base to help support overlying portions of the contact. In other embodiments a scaffold material may also be placed prior to the formation of the air gaps in order to provide additional support.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ching-Feng Fu, Guan-Ren Wang, Yun-Min Chang, Yu-Lien Huang
  • Patent number: 12205905
    Abstract: A semiconductor structure includes a substrate including a device region, a peripheral region surrounding the device region, and a transition region disposed between the device region and the peripheral region. An epitaxial layer is disposed on the device region, the peripheral region, and the transition region. A first portion of the epitaxial layer on the peripheral region has a poly-crystal structure.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: January 21, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yen-Hsing Chen, Yu-Ming Hsu, Tsung-Mu Yang, Yu-Ren Wang
  • Patent number: 12197601
    Abstract: Examples described herein relate to offload circuitry comprising one or more compute engines that are configurable to perform a workload offloaded from a process executed by a processor based on a descriptor particular to the workload. In some examples, the offload circuitry is configurable to perform the workload, among multiple different workloads. In some examples, the multiple different workloads include one or more of: data transformation (DT) for data format conversion, Locality Sensitive Hashing (LSH) for neural network (NN), similarity search, sparse general matrix-matrix multiplication (SpGEMM) acceleration of hash based sparse matrix multiplication, data encode, data decode, or embedding lookup.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: January 14, 2025
    Assignee: Intel Corporation
    Inventors: Ren Wang, Sameh Gobriel, Somnath Paul, Yipeng Wang, Priya Autee, Abhirupa Layek, Shaman Narayana, Edwin Verplanke, Mrittika Ganguli, Jr-Shian Tsai, Anton Sorokin, Suvadeep Banerjee, Abhijit Davare, Desmond Kirkpatrick, Rajesh M. Sankaran, Jaykant B. Timbadiya, Sriram Kabisthalam Muthukumar, Narayan Ranganathan, Nalini Murari, Brinda Ganesh, Nilesh Jain
  • Publication number: 20250014948
    Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.
    Type: Application
    Filed: September 15, 2024
    Publication date: January 9, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
  • Patent number: 12185655
    Abstract: A method for micro-ridge mixed-sowing cultivation of dryland crops includes the following steps: S1: cleaning ditches and draining away water in dryland; S2: harvesting the preceding crop, leaving the stubble, smashing the stalks of the preceding crop, and then spreading the smashed stalks on the stubble; S3: trenching the dryland to form ecological trenches; S4: flattening the standing stubble and the smashed stalks on the seedbed surface to form an underlying surface, molding seed-fertilizer-soil compounds into a ridge shape and allowing the seed-fertilizer-soil compounds to fall on the underlying surface to form ecological ridges, wherein a plurality of ecological ridges are formed between adjacent ecological trenches, an ecological depression is formed between adjacent ecological ridges, and after sowing, an irrigation is carried out, including: draining water shortly after the irrigation, without leaving a water layer in the field.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: January 7, 2025
    Assignee: Hunan Agriculture University
    Inventors: Huang Huang, Yin Zhang, Jingyi Li, Ren Wang, Xiangsheng Gong, Zhiqiang Fu, Can Chen, Zhengjun Yu, Yugang Liang, Jiaolong Ding, Xiangjie Meng, Dan Wu, Yao Huang, Xiaolan Liao