Patents by Inventor Rene Antonio Vega

Rene Antonio Vega has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8972991
    Abstract: The present invention is directed to making a guest operating system aware of the topology of the subset of host resources currently assigned to it. At virtual machine boot time a Static Resource Affinity Table (SRAT) will be used by the virtualizer to group guest physical memory and guest virtual processors into virtual nodes. Thereafter, in one embodiment, the host physical memory behind a virtual node can be changed by the virtualizer as necessary, and the virtualizer will provide physical processors appropriate for the virtual processors in that node.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: March 3, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Eric P. Traut, Rene Antonio Vega
  • Patent number: 8909946
    Abstract: Efficient power management of a system with virtual machines is disclosed. In particular, such efficient power management may enable coordination of system-wide power changes with virtual machines. Additionally, such efficient power management may enable coherent power changes in a system with a virtual machine monitor. Furthermore, such efficient power management may enable dynamic control and communication of power state changes.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: December 9, 2014
    Assignee: Microsoft Corporation
    Inventors: Adrian J. Oney, Bryan Mark Willman, Eric P. Traut, Forrest Curtis Foltz, Matthew D. Hendel, Rene Antonio Vega
  • Publication number: 20140196040
    Abstract: Techniques for creating crash data in a virtualized environment are disclosed. In an embodiment of the present disclosure the techniques can be used when a guest operating system within a virtual machine may not have a sufficient mechanism for generating crash data.
    Type: Application
    Filed: March 10, 2014
    Publication date: July 10, 2014
    Applicant: Microsoft Corporation
    Inventors: Andrew Nicholas, Rich Yampell, Jacob Oshins, Rene Antonio Vega
  • Publication number: 20140122830
    Abstract: Various mechanisms are disclosed for improving the operational efficiency of a virtual translation look-aside buffer (TLB) in a virtual machine environment. For example, one mechanism fills in entries in a shadow page table (SPT) and additionally, speculatively fills in other entries in the SPT based on various heuristics. Another mechanism allows virtual TLBs (translation look-aside buffers) to cache partial walks in a guest page table tree. Still another mechanism allows for dynamic resizing of the virtual TLB to optimize for run-time characteristics of active workloads. Still another mechanism allows virtual machine monitors (VMMs) to support legacy and enlightened modes of virtual TLB operation. Finally, another mechanism allows the VMM to remove only the stale entries in SPTs when linking or switching address spaces. All these mechanisms, together or in part, increase the operational efficiency of the virtual TLB.
    Type: Application
    Filed: December 23, 2013
    Publication date: May 1, 2014
    Applicant: Microsoft Corporation
    Inventors: Ernest S. Cohen, John Te-Jui Sheu, Landy Wang, Matthew D. Hendel, Rene Antonio Vega, Sharvil A. Nanavati
  • Publication number: 20140115588
    Abstract: The present invention is directed to making a guest operating system aware of the topology of the subset of host resources currently assigned to it. At virtual machine boot time a Static Resource Affinity Table (SRAT) will be used by the virtualizer to group guest physical memory and guest virtual processors into virtual nodes. Thereafter, in one embodiment, the host physical memory behind a virtual node can be changed by the virtualizer as necessary, and the virtualizer will provide physical processors appropriate for the virtual processors in that node.
    Type: Application
    Filed: December 30, 2013
    Publication date: April 24, 2014
    Applicant: Microsoft Corporation
    Inventors: Eric P. Traut, Rene Antonio Vega
  • Patent number: 8694712
    Abstract: Various operations are disclosed for improving the operational efficiency of a virtual translation look-aside buffer (TLB) in a virtual machine environment. For example, operations are disclosed that allow for determination of whether present entries in shadow page tables (SPTs) are stale by comparing shadowed guest page table (GPT) entries against snapshots taken when the entries were cached. Other operations are disclosed that allow a virtual machine monitor (VMM) to access shadow page table trees (SPTTs) by walking trees in software or in hardware. Still other operations are disclosed allowing the VMM to use a hash table to relate GVA ranges to SPTs that map them, thus significantly reducing the cost of having to walk each SPTT in order to invalidate desired GVA(s). And, finally, operations are disclosed allowing the VMM to determine global GVA ranges by checking a bitmap, when invalidating global GVAs.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: April 8, 2014
    Assignee: Microsoft Corporation
    Inventors: John Te-Jui Sheu, Matthew D. Hendel, Landy Wang, Ernest S. Cohen, Rene Antonio Vega, Sharvil A. Nanavati
  • Patent number: 8671405
    Abstract: Techniques for creating crash data in a virtualized environment are disclosed. In an embodiment of the present disclosure the techniques can be used when a guest operating system within a virtual machine may not have a sufficient mechanism for generating crash data.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: March 11, 2014
    Assignee: Microsoft Corporation
    Inventors: Andrew Nicholas, Rich Yampell, Jacob Oshins, Rene Antonio Vega
  • Publication number: 20140033197
    Abstract: Model-based virtual system provisioning includes accessing a model of a workload to be installed on a virtual machine of a system as well as a model of the system. A workload refers to some computing that is to be performed, and includes an application to be executed to perform the computing, and optionally includes the operating system on which the application is to be installed. The workload model identifies a source of the application and operating system of the workload, as well as constraints of the workload, such as resources and/or other capabilities that the virtual machine(s) on which the workload is to be installed must have. An installation specification for the application is also generated, the installation specification being derived at least in part from the model of the workload and the model of the virtual system.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 30, 2014
    Applicant: Microsoft Corporation
    Inventors: Anders B. Vinberg, Robert M. Fries, Kevin Grealish, Galen C. Hunt, Aamer Hydrie, Edwin R. Lassettre, Rob Mensching, Geoffrey Outhred, John M. Parchem, Bassam Tabbara, Rene Antonio Vega, Robert V. Welland, Eric J. Winner, Jeffrey A. Woolsey
  • Publication number: 20140007101
    Abstract: A catch-up mode that runs a virtual programmable interrupt timer faster than a nominal rate to prevent time loss in a virtual machine can be implemented. If time loss is determined, a catch-up mode can be initiated to cause increased firings, beyond a nominal rate, of the programmable interrupt timer to adjust the clock of the virtual machine to the clock of the host system. The virtual programmable interrupt timer can also be readjusted to a predetermined nominal rate when the time loss in the guest operating system is determined approximately within a predetermined tolerance range. The catch-up mode can be monitored to avoid “interrupt storms” on the virtual machine. The virtual programmable interrupt timer can be altered by the guest operating system to accommodate different operating systems.
    Type: Application
    Filed: September 6, 2013
    Publication date: January 2, 2014
    Applicant: Microsoft Corporation
    Inventors: Andrew Ernest Nicholas, Rene Antonio Vega
  • Patent number: 8621458
    Abstract: The present invention is directed to making a guest operating system aware of the topology of the subset of host resources currently assigned to it. At virtual machine boot time a Static Resource Affinity Table (SRAT) will be used by the virtualizer to group guest physical memory and guest virtual processors into virtual nodes. Thereafter, in one embodiment, the host physical memory behind a virtual node can be changed by the virtualizer as necessary, and the virtualizer will provide physical processors appropriate for the virtual processors in that node.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: December 31, 2013
    Assignee: Microsoft Corporation
    Inventors: Eric P. Traut, Rene Antonio Vega
  • Patent number: 8615643
    Abstract: Various mechanisms are disclosed for improving the operational efficiency of a virtual translation look-aside buffer (TLB) in a virtual machine environment. For example, one mechanism fills in entries in a shadow page table (SPT) and additionally, speculatively fills in other entries in the SPT based on various heuristics. Another mechanism allows virtual TLBs (translation look-aside buffers) to cache partial walks in a guest page table tree. Still another mechanism allows for dynamic resizing of the virtual TLB to optimize for run-time characteristics of active workloads. Still another mechanism allows virtual machine monitors (VMMs) to support legacy and enlightened modes of virtual TLB operation. Finally, another mechanism allows the VMM to remove only the stale entries in SPTs when linking or switching address spaces. All these mechanisms, together or in part, increase the operational efficiency of the virtual TLB.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: December 24, 2013
    Assignee: Microsoft Corporation
    Inventors: Ernest S. Cohen, John Te-Jui Sheu, Landy Wang, Matthew D. Hendel, Rene Antonio Vega, Sharvil A. Nanavati
  • Patent number: 8612633
    Abstract: Techniques for reducing virtual machine input/output emulation overhead and decreasing the attack surface of a virtual machine architecture are disclosed.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: December 17, 2013
    Assignee: Microsoft Corporation
    Inventors: Lawrence R. Cleeton, Andrei Warkentin, Andrew Nicholas, Rene Antonio Vega, Jacob Oshins, John A. Starks
  • Patent number: 8549513
    Abstract: Model-based virtual system provisioning includes accessing a model of a workload to be installed on a virtual machine of a system as well as a model of the system. A workload refers to some computing that is to be performed, and includes an application to be executed to perform the computing, and optionally includes the operating system on which the application is to be installed. The workload model identifies a source of the application and operating system of the workload, as well as constraints of the workload, such as resources and/or other capabilities that the virtual machine(s) on which the workload is to be installed must have. An installation specification for the application is also generated, the installation specification being derived at least in part from the model of the workload and the model of the virtual system.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: October 1, 2013
    Assignee: Microsoft Corporation
    Inventors: Anders B. Vinberg, Robert M. Fries, Kevin Grealish, Galen C. Hunt, Aamer Hydrie, Rob Mensching, Geoffrey Outhred, John M. Parchem, Bassam Tabbara, Rene Antonio Vega, Robert V. Welland, Eric J. Winner, Jeffrey A. Woolsey
  • Patent number: 8533709
    Abstract: A catch-up mode that runs a virtual programmable interrupt timer faster than a nominal rate to prevent time loss in a virtual machine can be implemented. If time loss is determined, a catch-up mode can be initiated to cause increased firings, beyond a nominal rate, of the programmable interrupt timer to adjust the clock of the virtual machine to the clock of the host system. The virtual programmable interrupt timer can also be readjusted to a predetermined nominal rate when the time loss in the guest operating system is determined approximately within a predetermined tolerance range. The catch-up mode can be monitored to avoid “interrupt storms” on the virtual machine. The virtual programmable interrupt timer can be altered by the guest operating system to accommodate different operating systems.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: September 10, 2013
    Assignee: Microsoft Cororation
    Inventors: Andrew Ernest Nicholas, Rene Antonio Vega
  • Patent number: 8504703
    Abstract: The present invention is a system for and method of providing instruction sequence compounding by (1) the virtual machine monitor's (VMM) looking ahead when an initial trap (exception) event occurs and recognizing traps within successive nearby instructions, combining and virtually executing the effects of multiple instructions while remaining inside the VMM's trap handler, and thereby minimizing the number of individual traps that would otherwise occur at each instruction and/or (2) the VMM's looking ahead when an initial context switch event occurs and recognizing context switches within successive nearby instructions, virtually combining the effects of multiple instructions and handing off this combined instruction to the host operating system, and thereby minimizing the number of individual context switches that would otherwise occur at each instruction. As a result, the number of processor cycles is reduced for exception handling and context switching in a virtual machine environment.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: August 6, 2013
    Assignee: Microsoft Corporation
    Inventors: Rene Antonio Vega, Eric P. Traut, Mike Neil
  • Publication number: 20120278800
    Abstract: In an exemplary embodiment, one or more virtual processors can be added or removed from a virtual machine based on CPU pressure measured within the virtual machine. In addition to the foregoing, other techniques are described in the detailed description, claims, and figures that form a part of this document.
    Type: Application
    Filed: April 27, 2011
    Publication date: November 1, 2012
    Applicant: Microsoft Corporation
    Inventors: Andrew Nicholas, Rene Antonio Vega, Shuvabrata Ganguly, Ellsworth Davis Walker, Manish Chablani
  • Patent number: 8271976
    Abstract: The present invention is a system for and method of initializing multiple virtual processors in a virtual machine (VM) environment. The method of initializing multiple virtual processors includes the steps of the host creating a multiple processor VM and activating a “starter virtual processor,” the “starter virtual processor” issuing a startup command to a next virtual processor, the virtual machine monitor (VMM) giving the target virtual processor the highest priority for accessing the hardware resources, the VMM forcing the “starter virtual processor” to relinquish control of the hardware resources, the VMM handing control of the hardware resources to the target virtual processor, the target virtual processor executing and completing its startup routine, the VMM forcing the target virtual processor to relinquish control of the hardware resources, and the VMM handing control of the hardware resources back to the “starter virtual processor” for activating subsequent virtual processors.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 18, 2012
    Assignee: Microsoft Corporation
    Inventors: Rene Antonio Vega, Eric P. Traut, Mike Neil
  • Publication number: 20110252421
    Abstract: In an emulated computing environment, a method is provided for allocating resources of the host computer system among multiple virtual machines resident on the host computer system. On the basis of the proportional weight of each virtual machine, a proportional share of resources is allocated for each virtual machine. If, for a particular virtual machine, the calculated share is less than a reserved minimum share, the virtual machine is allocated its reserved minimum share as its share of computing device resources. An emulation program modulates the access of each virtual machine to the resources of the host computer system.
    Type: Application
    Filed: June 20, 2011
    Publication date: October 13, 2011
    Applicant: Microsoft Corporation
    Inventor: Rene Antonio Vega
  • Publication number: 20110246171
    Abstract: Techniques for reducing virtual machine input/output emulation overhead and decreasing the attack surface of a virtual machine architecture are disclosed.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Applicant: Microsoft Corporation
    Inventors: Lawrence R. Cleeton, Andrei Warkentin, Andrew Nicholas, Rene Antonio Vega, Jacob Oshins, John A. Starks
  • Publication number: 20110246986
    Abstract: Techniques for creating crash data in a virtualized environment are disclosed. In an embodiment of the present disclosure the techniques can be used when a guest operating system within a virtual machine may not have a sufficient mechanism for generating crash data.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Applicant: Microsoft Corporation
    Inventors: Andrew Nicholas, Rich Yampell, Jacob Oshins, Rene Antonio Vega