Patents by Inventor Rene Antonio Vega

Rene Antonio Vega has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7363463
    Abstract: A method of virtualizing memory through shadow page tables that cache translations from multiple guest address spaces in a virtual machine includes a software version of a hardware tagged translation look-aside buffer. Edits to guest page tables are detected by intercepting the creation of guest-writable mappings to guest page tables with translations cached in shadow page tables. The affected cached translations are marked as stale and purged upon an address space switch or an indiscriminate flush of translations by the guest. Thereby, non-stale translations remain cached but stale translations are discarded. The method includes tracking the guest-writable mappings to guest page tables, deferring discovery of such mappings to a guest page table for the first time until a purge of all cached translations when the number of untracked guest page tables exceeds a threshold, and sharing shadow page tables between shadow address spaces and between virtual processors.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: April 22, 2008
    Assignee: Microsoft Corporation
    Inventors: John Te-Jui Sheu, David S. Bailey, Eric P. Traut, Rene Antonio Vega
  • Publication number: 20070271560
    Abstract: To determine whether to deploy a candidate VM to a candidate host, taking into consideration resources available from the candidate host and resources required by the candidate VM, a sub-rating is calculated for each of several resources available from the candidate host, where the sub-rating for the resource corresponds to an amount of the resource that is free after the candidate VM is deployed to the candidate host. Thereafter, a rating is calculated from the calculated sub-ratings to characterize how well the candidate host can accommodate the candidate VM. The rating for the candidate host are presented to a selector that determines whether to deploy the candidate VM to the candidate host based on the rating thereof.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 22, 2007
    Applicant: Microsoft Corporation
    Inventors: Brian M. Wahlert, Rene Antonio Vega, Robert Gibson, Robert M. Fries, William L. Scheidel, Pavel A. Dournov, John Morgan Oslake
  • Patent number: 7299337
    Abstract: Enhanced shadow page table algorithms are presented for enhancing typical page table algorithms. In a virtual machine environment, where an operating system may be running within a partition, the operating system maintains it's own guest page tables. These page tables are not the real page tables that map to the real physical memory. Instead, the memory is mapped by shadow page tables maintained by a virtualing program, such as a hypervisor, that virtualizes the partition containing the operating system. Enhanced shadow page table algorithms provide efficient ways to harmonize the shadow page tables and the guest page tables. Specifically, by using tagged translation lookaside buffers, batched shadow page table population, lazy flags, and cross-processor shoot downs, the algorithms make sure that changes in the guest pages tables are reflected in the shadow page tables.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: November 20, 2007
    Inventors: Eric P. Traut, Matthew D. Hendel, Rene Antonio Vega
  • Patent number: 7260702
    Abstract: The present invention provides a virtualized computing systems and methods for transitioning in real time between LONG SUPER-MODE and LEGACY SUPER-MODE in the x86-64 architecture. In doing so, a virtual machine, which relies on the traditional 32-bit modes, i.e., REAL MODE and PROTECTED MODE (V86 SUB-MODE, RING-0 SUB-MODE, and RING-3 SUB-MODE), is able to run alongside other applications on x86-64 computer hardware (i.e., 64-bit). The method of performing a temporary processor mode context switch includes the steps of the virtual machine monitor's setting up a “virtual=real” page, placing the transition code for performing the processor mode context switch on this page, jumping to this page, disabling the memory management unit (MMU) of the x86-64 computer hardware, modifying the mode control register to set either the LONG SUPER-MODE bit or LEGACY SUPER-MODE bit, loading a new page table, and reactivating the MMU of the x86-64 computer hardware.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: August 21, 2007
    Assignee: Microsoft Corporation
    Inventors: Rene Antonio Vega, Eric P. Traut
  • Patent number: 7136800
    Abstract: In an emulated computing environment, a method is provided for allocating resources of the host computer system among multiple virtual machines resident on the host computer system. On the basis of the proportional weight of each virtual machine, a proportional share of resources is allocated for each virtual machine. If, for a particular virtual machine, the calculated share is less than a reserved minimum share, the virtual machine is allocated its reserved minimum share as its share of processor resources. An emulation program modulates the access of each virtual machine to the resources of the host computer system.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: November 14, 2006
    Assignee: Microsoft Corporation
    Inventor: Rene Antonio Vega