Abstract: The stresses commonly induced in the dielectrics of integrated circuits manufactured using metal patterning methods, such as reactive ion etching (RIE) and damascene techniques, can be reduced by rounding the lower corners associated with the features which are formed as part of the integrated circuit (e.g., the interconnects) before applying the outer (i.e., passivation) layer. In connection with the formation of metal lines patterned by a metal RIE process, such corner rounding can be achieved using a two-step metal etching process including a first step which produces a vertical sidewall and a second step which tapers lower portions of the vertical sidewall or which produces a tapered spacer along the lower portions of the vertical sidewall. This results in a rounded bottom corner which improves the step coverage of the overlying dielectric, in turn eliminating the potential for cracks.

Abstract: A multistep method for planarizing a silicon oxide insulating layer such as a deposited borophosphosilicate glass (BPSG) layer. The method includes several different planarization stages. During an initial, pre-planarization stage, a substrate having a BPSG layer deposited over it is loaded into a substrate processing chamber. Then, during a first planarization stage after the pre-planarization stage, oxygen and hydrogen are flowed into the substrate processing chamber to form a steam ambient in said chamber and the substrate is heated in the steam ambient from a first temperature to a second temperature. The first temperature is below a reflow temperature of the BPSG layer and the second temperature is sufficient to reflow the layer. After the substrate is heated to the second temperature during a second planarization stage, the temperature of the substrate and the conditions within the substrate processing chamber are maintained at conditions sufficient to reflow the BPSG layer in the steam ambient.

Abstract: A method of depositing a fluorinated borophosphosilicate glass (FBPSG) on a semiconductor device as either a final or interlayer dielectric film. Gaps having aspect ratios greater than 6:1 are filled with a substantially void-free FBPSG film at a temperature of about 480.degree. C. at sub-atmospheric pressures of about 200 Torr. Preferably, gaseous reactants used in the method comprise TEOS, FTES, TEPO and TEB with an ozone/oxygen mixture. Dopant concentrations of boron and phosphorus are sufficiently low such that surface crystallite defects and hygroscopicity are avoided. The as-deposited films at lower aspect ratio gaps are substantially void-free such that subsequent anneal of the film is not required. Films deposited into higher aspect ratio gaps are annealed at or below about 750.degree. C., well within the thermal budget for most DRAM, logic and merged logic-DRAM chips. The resultant FBPSG layer contains less than or equal to about 5.0 wt % boron, less than about 4.0 wt % phosphorus, and about 0.

Abstract: A hardness tester is disclosed which conducts its hardness test through a penetrator impinging upon the surface of a test specimen. Enhanced accuracy and repeatability is achieved through the use of a closed loop system and directly mounting a load cell to the indentor, connecting a linear displacement transducer directly to the load cell and eliminating an elevating screw in initially positioning and applying load to the specimen to be tested.

Abstract: Filling of narrow and/or high aspect ratio gaps and trenches with silicate glass is accomplished at reduced temperatures and without reflow by etching the glass concurrently with thermal chemical vapor deposition of the glass such that the deposition rate will exceed the etching rate by a relatively small net deposition rate near the surface with the excess deposition rate increasing over the depth of the trench or gap. The as-deposited glass film is made dense and stable by carrying out the concurrent etch and deposition process at an elevated temperature but which is within the maximum temperature and heat budget which can be tolerated by structures formed by previously performed processes. Fluorine can be incorporated in the silicate glass film as a dopant in sufficient concentration to reduce dielectric constant of the film. Phosphorus and/or boron can be incorporated into the film, as well, and may enhance void-free filling of trenches and gaps.

Abstract: A method is provided for filling high aspect ratio gaps without void formation by using a high density plasma (HDP) deposition process with a sequence of deposition and etch steps having varying etch rate-to-deposition rate (etch/dep) ratios. The first step uses an etch/dep ratio less than one to quickly fill the gap. The first step is interrupted before the opening to the gap is closed. The second step uses an etch/dep ratio greater than one to widen the gap. The second step is stopped before corners of the elements forming the gaps are exposed. These steps can be repeated until the aspect ratio of the gap is reduced so that void-free gap-fill is possible. The etch/dep ratio and duration of each step can be optimized for high throughput and high aspect ratio gap-fill capacity.

Abstract: The stresses commonly induced in the dielectrics of integrated circuits manufactured using metal patterning methods, such as reactive ion etching (RIE) and damascene techniques, can be reduced by rounding the lower corners associated with the features which are formed as part of the integrated circuit (e.g., the interconnects) before applying the outer (i.e., passivation) layer. In connection with the formation of metal lines patterned by a metal RIE process, such corner rounding can be achieved using a two-step metal etching process including a first step which produces a vertical sidewall and a second step which tapers lower portions of the vertical sidewall or which produces a tapered spacer along the lower portions of the vertical sidewall. This results in a rounded bottom corner which improves the step coverage of the overlying dielectric, in turn eliminating the potential for cracks.

Abstract: A hardness tester is disclosed which conducts its hardness test through a penetrator impinging upon the surface of a test specimen. Enhanced accuracy and repeatability is achieved through the use of a closed loop system and directly mounting a load cell to the indentor, connecting a linear displacement transducer directly to the load cell and eliminating an elevating screw in initially positioning and applying load to the specimen to be tested.

Abstract: An apparatus in a chemical vapor deposition (CVD) system monitors the actual wafer/substrate temperature during the deposition process. The apparatus makes possible the production of high quality aluminum oxide films with real-time wafer/substrate control. An infrared (IR) temperature monitoring device is used to control the actual wafer temperature to the process temperature setpoint. This eliminates all atmospheric temperature probing. The need for test runs and monitor waters as well as the resources required to perform the operations is eliminated and operating cost are reduced. High quality, uniform films of aluminum oxide can be deposited on a silicon substrates with no need for additional photolithographic steps to simulate conformality that are present in a sputtered (PVD) type application. The result is a reduction in required process steps with subsequent anticipated savings in equipment, cycle time, chemicals, reduce handling, and increased yield of devices on the substrate.

Abstract: Titanium and/or tantalum nitrides or nitride silicides are deposited onto a substrate by chemical vapor deposition of a titanium and/or tantalum silylamido complex.

Abstract: A process and apparatus for Al.sub.2 O.sub.3 CVD on silicon wafers using aluminum tri-isopropoxide in a high-volume production environment is presented. The conditions required to use ATI in a production environment and provide maximum utilization of ATI are first of all delivery of ATI via direct evaporation. The ATI source bottle is pumped out (bypassing substrates) until propene and isopropanol signals are reduced to 1% of process pressure before start of aluminum oxide deposition. Either IR spectroscopy or mass spectrometry can be used to provide a control signal to the microprocessor controller. Heating the supplied tetramer to 120.degree. C. for two hours assures complete conversion to trimer. The ATI is stored at 90.degree. C. to minimize decomposition during idle periods and allow recovery of trimer upon return to 120.degree. C. for two hours. During periods of demand, the ATI is held at 120.degree. C. to minimize decomposition.

Abstract: An apparatus for processing a layer on a workpiece includes a source of reactant fluid, a reaction chamber having a support for the workpiece and a fluid delivery apparatus for feeding an input fluid into the reaction chamber with the input fluid being utilized to process the material. An infrared sensor is adapted to cooperate with the fluid delivery apparatus for sensing the concentration of a component of the input fluid. The infrared sensor includes an infrared light source positioned to direct a beam of infrared light at an infrared light detector through the input fluid. The infrared light detector produces an electrical output signal indicative of the amount of light received by the detector and therefore not absorbed by the input fluid.

Abstract: An apparatus for processing a layer on a workpiece includes a source of reactant fluid, a reaction chamber having a support for the workpiece and a fluid delivery apparatus for feeding an input fluid into the reaction chamber with the input fluid being utilized to process the material. An infrared sensor is adapted to cooperate with the fluid delivery apparatus for sensing the concentration of a component of the input fluid. The infrared sensor includes an infrared light source positioned to direct a beam of infrared light at an infrared light detector through the input fluid. The infrared light detector produces an electrical output signal indicative of the amount of light received by the detector and therefore not absorbed by the input fluid.

Abstract: A method and apparatus for monitoring and controlling reactant vapors prior to chemical vapor deposition (CVD). The reactant vapors are monitored at full concentration without sampling as they are transported to a CVD reactor. Contaminants detected cause a process controller to switch the transport path to direct reactant vapors to a system pump.

Abstract: A removable gas injector design compatible for use in chemical vapor deposition reactors that allows proper mixing of the reactant gases, reduced cycle time associated with cleaning of gas injector components, and elimination of uncertainties associated with manual cleaning of the injector. A better reliability to the system due to the known condition of the nozzle after a clean is achieved.

Abstract: A capacitor having a high dielectric constant and method of making the same is disclosed. The capacitor comprises a bottom electrode comprising a conductive oxide deposited upon a substrate by chemical vapor deposition. A dielectric layer having a high dielectric constant is deposited upon the conductive oxide. Lastly, a counter electrode is formed upon the dielectric layer.

Abstract: A metal connection for an integrated circuit device is effectively "cast" in place at any level of an integrated circuit. The "mold" for the connection is formed by depositing and patterning a sacrificial material, such as aluminum oxide or other metal oxides, and covering the sacrificial material with a protective material such as silicon dioxide or other insulators. After forming bore holes to the deposit of sacrificial material through the protective layer, the sacrificial material is removed by isotropic etching to form a cavity beneath and at least partially overlaid by the protective layer. Alternatively, a defect may be produced below the protective layer and filled with metal either with or without enlargement by further removal of material. This cavity is then filled with metal by deposition of the metal by, for instance, evaporation, sputtering and chemical vapor deposition or combinations thereof.

Abstract: Anhydrous ammonium fluoride is used as a safe source of hydrogen fluoride for etching native or other silicon dioxide layers from silicon substrates. Heating the anhydrous ammonium fluoride above its sublimation temperature results in the generation of hydrogen fluoride gas which etches the silicon dioxide. Controlled amounts of water vapor are used during the etch reaction to ensure complete etching of the thin oxide layers down to within hundredths of a monolayer and to achieve precise etch rate control.

Abstract: An injector with a convex wall surface facing the susceptor directs vapor toward a wafer held by a susceptor producing a generally laminar flow across the surface of the wafer that in combination with the convex wall surface prevents formation of recirculation cells in the region between the wafer and the injector.

Abstract: A device for measuring both the phase change temperature of a sample of a molten metal bath and the actual bath temperature by means of a single thermocouple. The device having a chamber defined by a housing such that the housing will be consumed by the molten metal bath after determination of the phase change temperature of the sample within the chamber. After consumption of the housing, the sample remelts into the bath and the thermocouple determines the bath temperature.