Abstract: The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicates that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.

Abstract: Described herein are organoaminosilane precursors which can be used to deposit silicon containing films which contain silicon and methods for making these precursors. Also disclosed herein are deposition methods for making silicon-containing films or silicon containing films using the organoaminosilane precursors described herein. Also disclosed herein are the vessels that comprise the organoaminosilane precursors or a composition thereof that can be used, for example, to deliver the precursor to a reactor in order to deposit a silicon-containing film.

Abstract: The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicates that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.

Abstract: The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicates that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.

Abstract: The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicates that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.

Abstract: A programmed computer searches for functional defects in a description of a circuit undergoing functional verification in the following manner. The programmed computer simulates the functional behavior of the circuit in response to a test vector, automatically restores the state of the simulation without causing the simulation to pass through a reset state, and then simulates the functional behavior of the circuit in response to another test vector. A predetermined rule can be used to identify test vectors to be simulated, and the predetermined rule can depend upon a measure of functional verification, including the number of times during simulation when a first state transition is performed by a first-controller at the same time as a second state transition is performed by a second controller. During simulation of the test vectors, manually generated tests or automatically generated checkers can monitor portions of the circuit for defective behavior.

Abstract: A computer is programmed to automatically select a state or a set of states of a digital circuit that are visited during simulation, for use as one or more initial states by a formal verification tool. Such automatic selection of one or more simulation states reduces the set of all simulation states to a small subset, thereby to address the state space explosion problem. Depending on the embodiment, the programmed computer uses one or more criteria provided by a library and/or by the user, in making its selection of states. Such criteria may be based on a property (assertion/checker) of the digital circuit and/or a signal generated during simulation. Furthermore, after such criteria (also called “primary criteria”) are applied, the selected states may be pruned by application of additional criteria (also called “secondary criteria”) prior to formal analysis.

Abstract: The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicates that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.

Abstract: A programmed computer generates descriptions of circuits (called “checkers”) that flag functional defects in a description of a circuit undergoing functional verification. The programmed computer automatically converts the circuit's description into a graph, automatically examines the graph for instances of a predetermined arrangement of nodes and connections, and automatically generates instructions that flag a behavior of a device represented by the instance in conformance with a known defective behavior. The checkers can be used during simulation or emulation of the circuit, or during operation of the circuit in a semiconductor die. The circuit's description can be in Verilog or VHDL and the automatically generated checkers can also be described in Verilog or VHDL. Therefore, the checkers can co-simulate with the circuit, monitoring the simulated operation of the circuit and flagging defective behavior.

Abstract: A programmed computer searches for functional defects in a description of a circuit undergoing functional verification in the following manner. The programmed computer simulates the functional behavior of the circuit in response to a test vector, automatically restores the state of the simulation without causing the simulation to pass through a reset state, and then simulates the functional behavior of the circuit in response to another test vector. A predetermined rule can be used to identify test vectors to be simulated, and the predetermined rule can depend upon a measure of functional verification, including the number of times during simulation when a first state transition is performed by a first controller at the same time as a second state transition is performed by a second controller. During simulation of the test vectors, manually generated tests or automatically generated checkers can monitor portions of the circuit for defective behavior.

Abstract: A tablet core containing a water-soluble, preferably highly water-soluble, active ingredient is coated for sustained release with an aqueous-based coating of an ethyl acrylate-methyl methacrylate copolymer. The amount of copolymer applied, on a dry basis, being about 0.5% to about 2% by weight, based on the total weight of the coated tablet. The coated tablet is dried for not more than about 30 minutes, preferably for about 10 to about 15 minutes, at about 50° C. Notwithstanding the greatly shortened drying time and/or low percentage of copolymner applied, the coated tablet surprisingly exhibits a substantially stable dissolution profile. Tablets containing potassium chloride and coated in accordance with the invention surprisingly exhibit a dissolution profile comparable to that afforded by potassium chloride tablets coated for sustained release with an organic solvent-based coating.

Abstract: The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicated that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.

Abstract: A computer-implemented decision management system which provides qualitative client assessment via point in time simulation. More specifically, the decision management system (a) simulates the effect of a strategy by applying the strategy to client data, and (b) tracks what type of client traveled through a respective decision point in the strategy during the simulation. Simulation parameters can be selected without technical intervention via, for example, a GUI and a relational data model. Such parameters can include which customers and which client data sample will be used for the simulation, and which inbound events will trigger the strategy. Moreover, detailed and aggregate results can be consolidated to determine expected results from the simulated strategies, and traditional and OLAP reporting facilities can be applied to analyze/view the consolidated results.

Abstract: A computer-implemented decision management system which provides qualitative client assessment via point in time simulation. More specifically, the decision management system (a) simulates the effect of a strategy by applying the strategy to client data, and (b) tracks what type of client traveled through a respective decision point in the strategy during the simulation. Simulation parameters can be selected without technical intervention via, for example, a GUI and a relational data model. Such parameters can include which customers and which client data sample will be used for the simulation, and which inbound events will trigger the strategy. Moreover, detailed and aggregate results can be consolidated to determine expected results from the simulated strategies, and traditional and OLAP reporting facilities can be applied to analyze/view the consolidated results.

Abstract: A programmed computer generates descriptions of circuits (called “checkers”) that flag functional defects in a description of a circuit undergoing functional verification. The programmed computer automatically converts the circuit's description into a graph, automatically examines the graph for instances of a predetermined arrangement of nodes and connections, and automatically generates instructions that flag a behavior of a device represented by the instance in conformance with a known defective behavior. The checkers can be used during simulation or emulation of the circuit, or during operation of the circuit in a semiconductor die. The circuit's description can be in Verilog or VHDL and the automatically generated checkers can also be described in Verilog or VHDL. Therefore, the checkers can co-simulate with the circuit, monitoring the simulated operation of the circuit and flagging defective behavior.

Abstract: A programmed computer generates descriptions of circuits (called “checkers”) that flag functional defects in a description of a circuit undergoing functional verification. The programmed computer automatically converts the circuit's description into a graph, automatically examines the graph for instances of a predetermined arrangement of nodes and connections, and automatically generates instructions that flag a behavior of a device represented by the instance in conformance with a known defective behavior. The checkers can be used during simulation or emulation of the circuit, or during operation of the circuit in a semiconductor die The circuit's description can be in Verilog or VHDL and the automatically generated checkers can also be described in Verilog or VHDL. Therefore, the checkers can co-simulate with the circuit, monitoring the simulated operation of the circuit and flagging detective behavior.

Abstract: A computer-implemented decision management system which provides qualitative client assessment via point in time simulation. More specifically, the decision management system (a) simulates the effect of a strategy by applying the strategy to client data, and (b) tracks what type of client traveled through a respective decision point in the strategy during the simulation. Simulation parameters can be selected without technical intervention via, for example, a GUI and a relational data model. Such parameters can include which customers and which client data sample will be used for the simulation, and which inbound events will trigger the strategy. Moreover, detailed and aggregate results can be consolidated to determine expected results from the simulated strategies, and traditional and OLAP reporting facilities can be applied to analyze/view the consolidated results.

Abstract: A computer-implemented decision management system which provides qualitative client assessment via point in time simulation. More specifically, the decision management system (a) simulates the effect of a strategy by applying the strategy to client data, and (b) tracks what type of client traveled through a respective decision point in the strategy during the simulation. Simulation parameters can be selected without technical intervention via, for example, a GUI and a relational data model. Such parameters can include which customers and which client data sample will be used for the simulation, and which inbound events will trigger the strategy. Moreover, detailed and aggregate results can be consolidated to determine expected results from the simulated strategies, and traditional and OLAP reporting facilities can be applied to analyze/view the consolidated results.