Abstract: A method of forming a semiconductor device includes forming a moat stack outwardly from a substrate, the moat stack comprising a dielectric pad disposed outwardly from the substrate, a silicon buffer structure disposed outwardly from the dielectric pad, and a protective dielectric cap disposed outwardly from the silicon buffer structure. The method further comprises forming a protective sidewall structure outwardly from at least a sidewall of the silicon buffer structure, forming an isolation dielectric region adjacent to the moat stack, after formation of the isolation dielectric region, removing the protective dielectric cap, and forming a conductive gate comprising the silicon buffer structure.

Abstract: A system (10) for processing wafers and cleaning wafer cassettes (160, 260, 460) includes a work cell (12) having a plurality of processing stations (14) for processing wafers, and at least one processing/cleaning station (30, 130, 230, 430) for receiving and delivering wafers to and from a wafer cassette (160, 260, 460), a transfer mechanism (16) for moving the wafers between the plurality of processing stations (14) and the cleaning station (30). The cleaning station (30, 130, 230, 430) may have an exterior door (32, 132, 232, 432), an exhaust (34, 134, 234, 434), an interior door (40, 140, 240, 440), a plurality of gas nozzles (166, 266, 466) for delivering a sweeping gas over the wafer cassette (160, 260, 460). The cleaning process can also be done with a loaded cassette (160, 260, 460) that is unloaded before cleaning.

Abstract: A method for processing substrates such as semiconductor wafers (21) includes providing a chamber (12) having a production nozzle (26) and two cleaning nozzles (36, 41). During production intervals, a level of particles carried by gases exiting the chamber are measured by an in-situ particle monitor (53). If an abnormally high particle level is detected, a cleaning procedure is carried out during a nonproduction interval which exists between production intervals in a production mode. During this cleaning, the chamber is maintained at a low pressure by a vacuum pump (56), and a cleaning gas (GAS1) is supplied through valves (83, 103, 108) and mass flow controllers (81, 101, 106) to respective nozzles. The valves are controlled so as to pulse or modulate the flow of the cleaning gas to the nozzles.

Abstract: A method of testing semiconductor wafers wherein a cassette (3) containing a plurality of semiconductor wafers for fabrication is provided. The location and orientation of each of the wafers within the cassette is determined and at least one processing step is performed on the wafers. At least one of an alteration of the location in the cassette (5) and orientation of the wafers (7) is provided and at least one additional processing step is performed on the wafers. At least one of an alteration of the location and orientation of the wafers is provided including alteration of the location or orientation of the wafers if not yet altered. At least one like parameter of each of the wafers is measured (9). The variation across the wafer of the at least one parameter is correlated with the orientation and the location on a wafer by wafer basis and processing errors are determined from the step of correlating which can be used to alter and reduce variation in the fabrication process.

Abstract: Hydrofluoric acid (HF) mixed with water and often buffered with ammonium fluoride is a standard silicon dioxide wet etchant which is followed by a rinse. An improved silicon dioxide etch is vapor HF which may be followed by a water vapor rinse. The invention discloses a further improved silicon dioxide etch. Following an initial exposure to vapor HF for oxide removal, a first insitu water rinse occurs. A second exposure to vapor HF then occurs and is followed by a second insitu water rinse. Water, rather than water vapor, aids in freeing particles from the wafer surface. During both the water rinses, the wafer may be rotated at increasing speeds to aid in sweeping particles from wafer surface. The process may be practiced in a commercially available reactor and is suitable for ULSI devices having complex topographies, such as, for example, 64 megabit DRAMs employing crown type memory cells.

Abstract: A system (10) for processing wafers and cleaning wafer cassettes (160, 260, 460) includes a work cell (12) having a plurality of processing stations (14) for processing wafers, and at least one processing/cleaning station (30, 130, 230, 430) for receiving and delivering wafers to and from a wafer cassette (160, 260, 460), a transfer mechanism (16) for moving the wafers between the plurality of processing stations (14) and the cleaning station (30). The cleaning station (30, 130, 230, 430) may have an exterior door (32, 132, 232, 432), an exhaust (34, 134, 234, 434), an interior door (40, 140, 240, 440), a plurality of gas nozzles (166, 266, 466) for delivering a sweeping gas over the wafer cassette (160, 260, 460).

Abstract: The invention provides a process for evaluating a substrate, such as a wafer of semiconductive material having a semiconductor die at least partially formed thereon, as to the condition of an overlying film, such as an overlying film of photoresist that is applied to the semiconductor die prior to metal etching and ion implantation. The condition of the film is evaluated by exposing at least a portion of the substrate to electromagnetic radiation and evaluating the wave profile of the reflected beam.In instances where it is desirable to evaluate the substrate for the presence or absence or photoresist, ultraviolet, or near ultraviolet light having a wavelength of about 240-650 nm can be used, as such wavelengths are strongly absorbed by photoresist. In contrast, areas of the substrate that are not covered by photoresist will not significantly absorb ultraviolet or near ultraviolet radiation.

Abstract: A system (12) for delivering spin-on-glass (SOG) to a substrate (14) has a spin chuck (16) for spinning a substrate (14), a delivery nozzle (18, 118, 218, 318, 418) having an interior conduit (419), a delivery nozzle-positioning subsystem (62) coupled to the delivery nozzle (18, 118, 218, 318, 418) for selectively positioning the delivery nozzle (18, 118, 218, 318, 418) over the spin chuck (16) for delivery of SOG, a SOG supply line (60, 160, 360) for supplying SOG, a cleaning fluid supply line (22, 122, 322) for supplying a cleaning fluid used to remove dried SOG, and a valve subsystem (20, 120, 320) fluidly coupled to the SOG supply line (60, 160, 360), cleaning-fluid supply line (22, 122, 322), and delivery nozzle (18, 118, 218, 318, 418) for selectively delivering SOG or a cleaning fluid through the interior conduit (419) of the delivery nozzle (18, 118, 218, 318, 418). A cleaning station 466 may be used to clean an exterior (421) of the nozzle (18, 118 218, 318, 418).

Abstract: Methods and apparatus are providing for cleansing contaminants from substrates, such as semiconductor wafer handling implements, and thereby reduce the incidence of contamination of semiconductor devices being assembled upon the semiconductor wafers.In one aspect of the invention, a substrate such as a semiconductor cassette or other semiconductor wafer handling implement, is inserted into a chamber that is substantially isolated from a surrounding environment. A pressurized, and optionally purified, cleansing medium is directed against at least one surface of the substrate to dislodge contaminants from the substrate surface. Dislodged contaminants are evacuated with negative pressure from the chamber. In a preferred aspect of the invention, the cleansing medium is an inert gas, such as nitrogen, and is applied to the substrate at a pressure from about 10 p.s.i. to about 100 or more p.s.i.

Abstract: The invention provides a process for evaluating a substrate, such as a wafer of semiconductive material having a semiconductor die at least partially formed thereon, as to the condition of an overlying film, such as an overlying film of photoresist that is applied to the semiconductor die prior to metal etching and ion implantation. The condition of the film is evaluated by exposing at least a portion of the substrate to electromagnetic radiation and evaluating the wave profile of the reflected beam. In instances where it is desirable to evaluate the substrate for the presence or absence of photoresist, ultraviolet or near ultraviolet light having a wavelength of about 240-650 nm can be used, as such wavelengths are strongly absorbed by photoresist. In contrast, areas of the substrate that are not covered by photoresist will not significantly absorb ultraviolet or near ultraviolet radiation.

Abstract: A method for cleaning a wafer carrier. A tank having sides and a bottom is provided. A weir is provided within the tank and having sides lower than the sides of the tank. Nozzles for outputting pressurized solution are provided within the weir. Laminar flow jets are also provided within the weir and are coupled to a pump for providing the laminar flow. To clean a wafer carrier, the carrier is placed within the weir. Solution is directed into the grooves of the wafer carrier using the nozzles. After the wafer carrier is cleaned using the nozzles, the nozzles are turned off. The laminar flow jets are activated using the laminar flow pump to provide a vertical laminar flow. This flow carries particles released from the wafer carrier by the pressurized solution upwards and over the weir. After a predetermined time period the cleaned wafer carrier is removed from the weir. Megasonic energy may be applied during the cleaning process to further enhance the removal of particles from the wafer carrier.

Abstract: A method for a wafer cleaner using a rotation mechanism. Wafers are placed into a carrier 3 having grooves to maintain a spacing between the wafers. The carrier 3 and wafers are placed into a tank 1 with a cleaning solution. Nozzles 11 are used to direct pressurized solution against the wafers causing them to rotate within the carrier. In another embodiment, the tank 1 includes a megasonic transducer 16. In the second embodiment, the wafers are rotated while the megasonic transducer 16 is producing megasonic energy. The rotation of the wafers causes the cleaning solution and the megasonic energy to act on the wafers uniformly, and further exposes the edges of the wafers directly to the cleaning solution and the megasonic energy, thereby enhancing particle removal from the wafers. Other embodiments are provided.

Abstract: A semiconductor device includes implanted regions (54) formed in a semiconductor layer (12). The implanted regions (54) are self-aligned with field oxide regions (20) and a gate structure (25) and have side edges (56, 57) that are formed at an angle with respect to the (001) plane and bottom edges (58) that are aligned with the (110) plane. Since side edges (56, 57) and not aligned with the (001) plane, when an anneal is performed, recrystallization proceeds primarily from the (110) plane alone rather than from the (110) and (001) planes simultaneously. Accordingly, the edge recrystalline damage caused by the intersecting of recrystallized silicon growing along the (110) and (001) planes simultaneously is avoided.

Abstract: Methods are providing for cleansing contaminants from substrates, such as semiconductor wafer handling implements, and thereby reduce the incidence of contamination of semiconductor devices being assembled upon the semiconductor wafers. In one aspect of the invention, a substrate such as a semiconductor cassette or other semiconductor wafer handling implement, is inserted into a chamber that is substantially isolated from a surrounding environment. A pressurized, and optionally purified, cleansing medium is directed against at least one surface of the substrate to dislodge contaminants from the substrate surface. Dislodged contaminants are evacuated with negative pressure from the chamber. In a preferred aspect of the invention, the cleansing medium is an inert gas, such as nitrogen, and is applied to the substrate at a pressure from about 10 p.s.i. to about 100 or more p.s.i.

Abstract: The invention discloses modifying the surface of a device to reduce transition region growth so that higher anneal temperatures can be used with the device to optimize dielectric quality, reduce defect density, and achieve the lowest possible dielectric leakage. One method of surface modification occurs when an impurity such as germanium is added to a silicon surface before deposition of TA 205 to serve as a diffusion barrier or retardant, which would inhibit the growth of the silicon TA205 transition region at higher temperatures and prevent capacitance degradation. Germanium is a good choice for this application because of its similarities to silicon. However, other materials can also serve as barriers.

Abstract: A tool for cleaning the interior of a tube, such as a neck portion of a processing tube of an lpcvd apparatus, or the like, has a pipe that may have at least one hole, and preferably a plurality of holes, spaced from an insulating handle along the length of the pipe in a direction toward a distal end of the pipe to allow cooling atmosphere to be drawn into the pipe. A scraper plate having a shape substantially conforming to an interior shape of the tube and a beveled peripheral edge is attached at the distal end of the pipe. A baffle plate of size smaller than the scraper plate is affixed to the scraper plate by a plurality of standoffs between the scraper plate on an exterior side opposite the interior side and the baffle plate, wherein the baffle plate forms a debris collection region between a peripheral side of the baffle plate and the tube at the exterior side of the scraper plate when the tool is inserted into the tube.

Abstract: A process is disclosed for inhibiting undesired diffusion of implanted dopants during and after dopant activation, as can occur during source/drain anneal. Undesired dopant diffusion is minimized by a dopant blocking layer, which is applied to the semiconductor body prior to dopant activation, and preferably prior to dopant implantation. The composition of the blocking layer is selected in accordance with the diffusion mechanism of the dopant to be implanted so that the concentration of lattice vacancies or interstitials (depending upon the dopant diffusion mechanism) is reduced, thereby inhibiting undesired migration of the implanted species.

Abstract: A method and apparatus for a wafer cleaner using a rotation mechanism. Wafers are placed into a carrier 3 having grooves to maintain a spacing between the wafers. The carrier 3 and wafers are placed into a tank 1 with a cleaning solution. Nozzles 11 are used to direct pressurized solution against the wafers causing them to rotate within the carrier. In another embodiment, the tank 1 includes a megasonic transducer 16. In the second embodiment, the wafers are rotated while the megasonic transducer 16 is producing megasonic energy. The rotation of the wafers causes the cleaning solution and the megasonic energy to act on the wafers uniformly, and further exposes the edges of the wafers directly to the cleaning solution and the megasonic energy, thereby enhancing particle removal from the wafers. Other embodiments are provided.

Abstract: A process is disclosed for inhibiting lateral diffusion of dopants in a semiconductive material. At least one conductivity dependent region is formed in the semiconductor, and a blocking layer is provided in overlying relation with the conductivity dependent region. Interstitial sites or vacancies are introduced into the conductivity dependent region in accordance with the diffusion mechanism of a selected dopant, and dopant is diffused into the semiconductor in a direction that is substantially transverse to the semiconductor upper surface while inhibiting with the introduced interstitial sites or vacanies lateral diffusion of the dopant into the conductivity dependent region.

Abstract: A method of annealing a partially fabricated semiconductor device which comprises the steps of annealing a partially fabricated semiconductor device in an atmosphere of an inert gas and an oxidizing gas. The inert gas is preferably one of nitrogen and argon and the oxidizing gas is preferably one or more of oxygen, hydrogen chloride and nitrogen trifluoride. The oxidizing gas is from about 1 to about 10% by volume of the atmosphere. The annealing step comprises maintaining the partially fabricated semiconductor device at a first temperature, preferably about 700.degree. C., for a first time period, preferably about 20 minutes, ramping up the temperature at a rate to a second temperature, preferably about 800.degree. C., maintaining the second temperature for a second time period, preferably about 20 minutes, ramping up the temperature at a rate, preferably about 10.degree. C./minute, to a third temperature, preferably about 900.degree. C.