Patents by Inventor Richard Leo Galbraith

Richard Leo Galbraith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210319837
    Abstract: Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.
    Type: Application
    Filed: June 25, 2021
    Publication date: October 14, 2021
    Inventors: Richard David BARNDT, Aldo Giovanni COMETTI, Richard Leo GALBRAITH, Jonas Andrew GOODE, Niranjay RAVINDRAN, Anthony Dwayne WEATHERS
  • Patent number: 11101006
    Abstract: Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: August 24, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Richard David Barndt, Aldo Giovanni Cometti, Richard Leo Galbraith, Jonas Andrew Goode, Niranjay Ravindran, Anthony Dwayne Weathers
  • Publication number: 20210175903
    Abstract: A data storage system and method are provided for storing data in non-volatile memory devices. Binary data is received for storage in a non-volatile memory device. The binary data is converted into non-binary data comprising base-X values, where X is an integer greater than two. The non-binary data is encoded to generate a codeword and the codeword is written to a wordline of the non-volatile memory device.
    Type: Application
    Filed: February 22, 2021
    Publication date: June 10, 2021
    Inventors: Richard Leo GALBRAITH, Jonas Andrew GOODE, Niranjay RAVINDRAN
  • Patent number: 10990295
    Abstract: The disclosure relates in some aspects to optimizing writes levels used for programming a non-volatile memory device. In some aspects, the disclosure relates to an algorithmic approach for adjusting write levels for a NAND flash device. For example, write level gradients may be iteratively generated based on memory cell bin distribution statistics relating to the number and direction of errors across bin boundaries.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: April 27, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Richard Leo Galbraith, Niranjay Ravindran, Jonas Andrew Goode
  • Patent number: 10965321
    Abstract: A data storage system and method are provided for storing data in non-volatile memory devices. Binary data is received for storage in a non-volatile memory device. The binary data is converted into non-binary data comprising base-X values, where X is an integer greater than two. The non-binary data is encoded to generate a codeword and the codeword is written to a wordline of the non-volatile memory device.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: March 30, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Richard Leo Galbraith, Jonas Andrew Goode, Niranjay Ravindran
  • Patent number: 10897271
    Abstract: The disclosure relates in some aspects to multi-dimensional quasi-cyclic (QC) low-density parity-check (LDPC) code generation. In one example, a controller of a data storage apparatus determines a plurality of dimensions for a code, the plurality of dimensions comprising a plurality of coprime numbers, generates distinct circulant rotation values based on at least a root of unity number and a prime number, assigns a different one of the distinct circulant rotation values to each of a plurality of circulant locations defined within the plurality of dimensions to generate the code, and encodes data using the code.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: January 19, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Richard Leo Galbraith, Iouri Oboukhov, Niranjay Ravindran
  • Publication number: 20200335173
    Abstract: Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.
    Type: Application
    Filed: July 6, 2020
    Publication date: October 22, 2020
    Inventors: Richard David BARNDT, Aldo Giovanni COMETTI, Richard Leo GALBRAITH, Jonas Andrew GOODE, Niranjay RAVINDRAN, Anthony Dwayne WEATHERS
  • Patent number: 10748628
    Abstract: Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: August 18, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Richard David Barndt, Aldo Giovanni Cometti, Richard Leo Galbraith, Jonas Andrew Goode, Niranjay Ravindran, Anthony Dwayne Weathers
  • Publication number: 20200115555
    Abstract: A data storage system and method are provided for storing data in non-volatile memory devices. Binary data is received for storage in a non-volatile memory device. The binary data is converted into non-binary data comprising base-X values, where X is an integer greater than two. The non-binary data is encoded to generate a codeword and the codeword is written to a wordline of the non-volatile memory device.
    Type: Application
    Filed: December 13, 2019
    Publication date: April 16, 2020
    Inventors: Richard Leo GALBRAITH, Jonas Andrew GOODE, Niranjay RAVINDRAN
  • Publication number: 20200112322
    Abstract: The disclosure relates in some aspects to multi-dimensional quasi-cyclic (QC) low-density parity-check (LDPC) code generation. In one example, a controller of a data storage apparatus determines a plurality of dimensions for a code, the plurality of dimensions comprising a plurality of coprime numbers, generates distinct circulant rotation values based on at least a root of unity number and a prime number, assigns a different one of the distinct circulant rotation values to each of a plurality of circulant locations defined within the plurality of dimensions to generate the code, and encodes data using the code.
    Type: Application
    Filed: October 4, 2018
    Publication date: April 9, 2020
    Inventors: Richard Leo Galbraith, Iouri Oboukhov, Niranjay Ravindran
  • Patent number: 10530391
    Abstract: A data storage system and method are provided for storing data in non-volatile memory devices. Binary data is received for storage in a non-volatile memory device. The binary data is converted into non-binary data comprising base-X values, where X is an integer greater than two. The non-binary data is encoded to generate a codeword and the codeword is written to a wordline of the non-volatile memory device.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: January 7, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Richard Leo Galbraith, Jonas Andrew Goode, Niranjay Ravindran
  • Publication number: 20190384504
    Abstract: The disclosure relates in some aspects to optimizing writes levels used for programming a non-volatile memory device. In some aspects, the disclosure relates to an algorithmic approach for adjusting write levels for a NAND flash device. For example, write level gradients may be iteratively generated based on memory cell bin distribution statistics relating to the number and direction of errors across bin boundaries.
    Type: Application
    Filed: October 11, 2018
    Publication date: December 19, 2019
    Inventors: Richard Leo Galbraith, Niranjay Ravindran, Jonas Andrew Goode
  • Patent number: 10404290
    Abstract: A method and data storage system receives a confidence vector for a non-binary symbol value read from a memory cell of a non-volatile memory device, where the confidence vector includes a first plurality of confidence values and transforms the first plurality of confidence values into a first plurality of likelihood values using a forward tensor-product transform. A respective binary message passing decoding operation is performed with each of the first plurality of likelihood values to generate a second plurality of likelihood values, and the second plurality of likelihood values are transformed into a second plurality of confidence values of the confidence vector using a reverse tensor-product transform.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: September 3, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Richard Leo Galbraith, Niranjay Ravindran, Roger William Wood
  • Publication number: 20190214101
    Abstract: Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.
    Type: Application
    Filed: March 14, 2019
    Publication date: July 11, 2019
    Inventors: Richard David Barndt, Aldo Giovanni Cometti, Richard Leo Galbraith, Jonas Andrew Goode, Niranjay Ravindran, Anthony Dwayne Weathers
  • Patent number: 10236070
    Abstract: Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: March 19, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Richard David Barndt, Aldo Giovanni Cometti, Richard Leo Galbraith, Jonas Andrew Goode, Niranjay Ravindran, Anthony Dwayne Weathers
  • Publication number: 20180374550
    Abstract: Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.
    Type: Application
    Filed: July 31, 2017
    Publication date: December 27, 2018
    Inventors: Richard David BARNDT, Aldo Giovanni COMETTI, Richard Leo GALBRAITH, Jonas Andrew GOODE, Niranjay RAVINDRAN, Anthony Dwayne WEATHERS
  • Patent number: 10008229
    Abstract: A method, apparatus, and system are provided for implementing track following using signal asymmetry metrics monitored during read back in hard disk drives (HDDs). Signal asymmetry metrics monitored during read back are used together with a position error signal (PES) to correct and guide the position of a read sensor with respect to a written track in the HDD.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: June 26, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC
    Inventors: Richard Leo Galbraith, Weldon Mark Hanson, Mark A. Nichols, Alexander Taratorin, Roger William Wood
  • Patent number: 9886979
    Abstract: A method, apparatus, and system are provided for implementing an enhanced modulation code for hard disk drives (HDDs). A modulation code directly uses Bit Error Rate (BER) information for different user patterns to construct a coded word minimizing possible error rate. The modulation code has a flexible code rate that simplifies code optimization relative to Coded Bit Density (CBD), signal to noise ratio (SNR) and noise color.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: February 6, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Richard Leo Galbraith, Weldon Mark Hanson, Iouri Oboukhov, Gary William Walker
  • Publication number: 20180034479
    Abstract: A data storage system and method are provided for storing data in non-volatile memory devices. Binary data is received for storage in a non-volatile memory device. The binary data is converted into non-binary data comprising base-X values, where X is an integer greater than two. The non-binary data is encoded to generate a codeword and the codeword is written to a wordline of the non-volatile memory device.
    Type: Application
    Filed: July 27, 2017
    Publication date: February 1, 2018
    Inventors: Richard Leo GALBRAITH, Jonas Andrew Goode, Niranjay Ravindran
  • Publication number: 20180034484
    Abstract: A method and data storage system receives a confidence vector for a non-binary symbol value read from a memory cell of a non-volatile memory device, where the confidence vector includes a first plurality of confidence values and transforms the first plurality of confidence values into a first plurality of likelihood values using a forward tensor-product transform. A respective binary message passing decoding operation is performed with each of the first plurality of likelihood values to generate a second plurality of likelihood values, and the second plurality of likelihood values are transformed into a second plurality of confidence values of the confidence vector using a reverse tensor-product transform.
    Type: Application
    Filed: July 31, 2017
    Publication date: February 1, 2018
    Inventors: Richard Leo GALBRAITH, Niranjay RAVINDRAN, Roger William WOOD