Abstract: The present disclosure relates to a catheter coupler and methods of exchanging catheters within a patient with a replacement catheter. The catheter coupler is configured to couple to a first catheter that has been disposed within a patient and coupled to a second or replacement catheter. Once the coupler is coupled to the first and second catheter, the first catheter may be withdrawn from the patient, which simultaneously advances the second or replacement catheter into the previous position of the first catheter. The coupler may include a body with a first end and a second end. The coupler may have a plurality of barbs disposed on both ends of the body of the coupler, wherein the barbs are configured to couple the coupler to the lumen of the catheters.

Abstract: A calf brace for the treatment of MTSS (shin splints) and other conditions of the lower leg, including the foot, includes a strap arrangement that is used to locate pressure nodes that target specific areas of a wearer's calf muscle to facilitate release of the calf muscle. In one embodiment, the straps are anchored to a sleeve that can be pulled onto the wearer's calf muscle over the foot. Targeted zones may include the point on the calf where the soleus muscle attaches to the posterior head of the fibula, the point where the soleus muscle attaches to the middle third of the tibia; and the back of the calf at approximately the junction of the Achilles tendon and the triceps surae muscle. A compressive rod may also be aligned with approximately the distal one third of the medial border of the tibia where periosteal elevation and inflammation is thought to occur.

Abstract: The present disclosure relates to a catheter coupler and methods of exchanging catheters within a patient with a replacement catheter. The catheter coupler is configured to couple to a first catheter that has been disposed within a patient and coupled to a second or replacement catheter. Once the coupler is coupled to the first and second catheter, the first catheter may be withdrawn from the patient, which simultaneously advances the second or replacement catheter into the previous position of the first catheter. The coupler may include a body with a first end and a second end. The coupler may have a plurality of barbs disposed on both ends of the body of the coupler, wherein the barbs are configured to couple the coupler to the lumen of the catheters.

Abstract: A calf brace for the treatment of MTSS (shin splints) and other conditions of the lower leg, including the foot, includes a strap arrangement that is used to locate pressure nodes that target specific areas of a wearer's calf muscle to facilitate release of the calf muscle. In one embodiment, the straps are anchored to a sleeve that can be pulled onto the wearer's calf muscle over the foot. Targeted zones may include the point on the calf where the soleus muscle attaches to the posterior head of the fibula, the point where the soleus muscle attaches to the middle third of the tibia; and the back of the calf at approximately the junction of the Achilles tendon and the triceps surae muscle. A compressive rod may also be aligned with approximately the distal one third of the medial border of the tibia where periosteal elevation and inflammation is thought to occur.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.

Abstract: The present disclosure relates to a drainage catheter and methods of use for providing improved catheterization procedures, such as during a percutaneous nephrostomy. The drainage catheter includes a body comprising a first tube segment and a second tube segment connected to one another at a curved end portion to form a continuous body structure. An inner surface of the curved end portion includes one or more drainage openings extending therethrough, with an outer surface of the curved end portion free of drainage openings to minimize potential clogging. The openings are in communication with a lumen that extends through the drainage catheter to provide a pathway for removing fluid from the kidney. The drainage catheter is inserted into the kidney via a first insertion site and exits via a second insertion site to minimize the potential for accidental removal of the catheter.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.

Abstract: Methods of sending an image include receiving, from a requesting device, a request for an image associated with a geographic area, generating the image by determining a plurality of photograph thumbnails, each photograph thumbnail being associated with a respective location or sub-region within the geographic area, and forming the image from the photograph thumbnails, and sending the image to the requesting device. A method of receiving an image includes sending, to a server, a request for an image associated with a geographic area, and receiving the image from the server, wherein the image comprises an image formed from a plurality of photograph thumbnails, each photograph thumbnail being associated with a respective location or sub-region within the geographic area.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.

Abstract: A preferred embodiment includes a method of manufacturing a fuse element that includes forming a polysilicon layer over a semiconductor structure, doping the polysilicon layer with carbon or nitrogen, depositing a metal over the polysilicon layer; and annealing the metal and polysilicon layer to form a silicide in an upper portion of the polysilicon layer.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.

Abstract: An embodiment of the invention provides a semiconductor fabrication method. The method comprises forming an isolation region between a first and a second region in a substrate, forming a recess in the substrate surface, and lining the recess with a uniform oxide. Embodiments further include doping a channel region under the bottom recess surface in the first and second regions and depositing a gate electrode material in the recess. Preferred embodiments include forming source/drain regions adjacent the channel region in the first and second regions, preferably after the step of depositing the gate electrode material. Another embodiment of the invention provides a semiconductor device comprising a recess in a surface of the first and second active regions and in the isolation region, and a dielectric layer having a uniform thickness lining the recess.

Abstract: A preferred embodiment includes a method of manufacturing a fuse element that includes forming a polysilicon layer over a semiconductor structure, doping the polysilicon layer with carbon or nitrogen, depositing a metal over the polysilicon layer; and annealing the metal and polysilicon layer to form a silicide in an upper portion of the polysilicon layer.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.

Abstract: A preferred embodiment includes a method of manufacturing a fuse element that includes forming a polysilicon layer over a semiconductor structure, doping the polysilicon layer with carbon or nitrogen, depositing a metal over the polysilicon layer; and annealing the metal and polysilicon layer to form a silicide in an upper portion of the polysilicon layer.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.

Abstract: An embodiment of the invention provides a semiconductor fabrication method. The method comprises forming an isolation region between a first and a second region in a substrate, forming a recess in the substrate surface, and lining the recess with a uniform oxide. Embodiments further include doping a channel region under the bottom recess surface in the first and second regions and depositing a gate electrode material in the recess. Preferred embodiments include forming source/drain regions adjacent the channel region in the first and second regions, preferably after the step of depositing the gate electrode material. Another embodiment of the invention provides a semiconductor device comprising a recess in a surface of the first and second active regions and in the isolation region, and a dielectric layer having a uniform thickness lining the recess.

Abstract: Semiconductor devices, capacitors, and methods of manufacture thereof are disclosed. In one embodiment, a method of fabricating a capacitor includes forming a first material over a workpiece, and patterning the first material, forming a first capacitor plate in a first region of the workpiece and forming a first element in a second region of the workpiece. A second material is formed over the workpiece and over the patterned first material. The second material is patterned, forming a capacitor dielectric and a second capacitor plate in the first region of the workpiece over the first capacitor plate and forming a second element in a third region of the workpiece.

Abstract: Semiconductor devices, capacitors, and methods of manufacture thereof are disclosed. In one embodiment, a method of fabricating a capacitor includes forming a first material over a workpiece, and patterning the first material, forming a first capacitor plate in a first region of the workpiece and forming a first element in a second region of the workpiece. A second material is formed over the workpiece and over the patterned first material. The second material is patterned, forming a capacitor dielectric and a second capacitor plate in the first region of the workpiece over the first capacitor plate and forming a second element in a third region of the workpiece.