Patents by Inventor Richard Price

Richard Price has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12283561
    Abstract: There is provided a flexible electronic structure for bonding with an external circuit, comprising a flexible substrate, having a first surface, configured for bonding with the external circuit, and an opposing second surface, configured for engagement with a bonding tool, comprising at least one electronic component; at least one contact member, operatively coupled with said at least one electronic component and provided at said first surface of said flexible substrate, and adapted to operably interface with the external circuit after bonding, and at least one shield member, provided at said first surface so as to shieldingly overlap at least a portion of said at least one electronic component, adapted to withstand a predetermined pressure applied to said first surface and/or said opposing second surface during bonding with the external circuit.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: April 22, 2025
    Assignee: PRAGMATIC SEMICONDUCTOR LIMITED
    Inventors: Brian Cobb, Richard Price
  • Patent number: 12268014
    Abstract: A thin-film integrated circuit comprising a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor is provided. A semiconducting region of the first semiconductor device, a resistor body of the first resistor, a semiconducting region of the second semiconductor device, and a resistor body of the second resistor are formed from at least one of a first source material and a second source material, and a material of the resistor body of the first resistor and a material of the resistor body of the second resistor have different electrical properties.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: April 1, 2025
    Assignee: PRAGMATIC SEMICONDUCTOR LIMITED
    Inventor: Richard Price
  • Publication number: 20250105131
    Abstract: The present invention provides for an interposer subassembly that is suitable for an electronic system having at least one integrated circuit (1C) component. The interposer subassembly comprises a flexible base layer, having a first surface and an opposing second surface, at least one active electronic circuit component, operatively integrated within said flexible base layer, and at least one first patterned contact layer, provided on any one of said first surface and said second surface of said flexible base layer and which is configured to operably interface with said at least one active electronic circuit component and the at least one 1C component.
    Type: Application
    Filed: December 6, 2024
    Publication date: March 27, 2025
    Inventors: Brian COBB, Scott WHITE, Ken WILLIAMSON, Anthony SOU, Catherine RAMSDALE, Rob MANN, Neil DAVIES, Joao de OLIVEIRA, Gillian EWERS, Pascaline BOULANGER, Richard PRICE
  • Patent number: 12237289
    Abstract: There is provided a flexible electronic structure for bonding with an external circuit. The flexible electronic structure comprising: a flexible body having a first surface, the flexible body comprising at least one electronic component; at least one contact element configured to bond with the external circuit, the at least one contact element operatively coupled with the at least one electronic component and provided at the first surface of the flexible body, and arranged to operably interface with the external circuit after bonding, and at least one support element provided at the first surface of the flexible body, each support element arranged to contact a corresponding surface element disposed on a first surface of an external structure comprising the external circuit.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: February 25, 2025
    Assignee: PRAGMATIC SEMICONDUCTOR LIMITED
    Inventors: Brian Cobb, Richard Price
  • Publication number: 20250056817
    Abstract: A thin-film resistor and a method for fabricating a thin-film resistor are provided.
    Type: Application
    Filed: October 30, 2024
    Publication date: February 13, 2025
    Inventors: Richard PRICE, Robert MANN
  • Patent number: 12199026
    Abstract: An interposer subassembly that is suitable for an electronic system having at least one integrated circuit (1C) component. The interposer subassembly includes a flexible base layer, having a first surface and an opposing second surface, at least one active electronic circuit component, operatively integrated within the flexible base layer, and at least one first patterned contact layer, provided on any one of the first surface and the second surface of the flexible base layer and which is configured to operably interface with the at least one active electronic circuit component and the at least one 1C component.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: January 14, 2025
    Assignee: PRAGMATIC SEMICONDUCTOR LIMITED
    Inventors: Brian Cobb, Scott White, Ken Williamson, Anthony Sou, Catherine Ramsdale, Rob Mann, Neil Davies, Joao de Oliveira, Gillian Ewers, Pascaline Boulanger, Richard Price
  • Patent number: 12159898
    Abstract: A thin-film resistor and a method for fabricating a thin-film resistor are provided.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: December 3, 2024
    Assignee: PRAGMATIC SEMICONDUCTOR LIMITED
    Inventors: Richard Price, Robert Mann
  • Patent number: 12136632
    Abstract: A structure is disclosed, comprising: a first field effect transistor, FET, comprising a first source terminal, a first drain terminal, a first layer or body of semiconductive material arranged to provide a first semiconductive channel connecting the first source terminal to the first drain terminal, and a gate terminal arranged with respect to the first semiconductive channel such that a conductivity of the first semiconductive channel may be controlled by application of a voltage to the gate terminal; and a second FET comprising a second source terminal, a second drain terminal, a second layer or body of semiconductive material arranged to provide a second semiconductive channel connecting the second source terminal to the second drain terminal, and the gate terminal, the second conductive channel being arranged with respect to the gate terminal such that a conductivity of the second channel may be controlled by application of a voltage to the gate terminal.
    Type: Grant
    Filed: August 8, 2023
    Date of Patent: November 5, 2024
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Richard Price, Catherine Ramsdale, Brian Hardy Cobb, Feras Alkhalil
  • Patent number: 11990484
    Abstract: The present invention provides processes for manufacturing a plurality of discrete integrated circuits (ICs) on a carrier, the process comprising the steps of: providing a carrier for a flexible substrate; depositing a flexible substrate of uniform thickness on said carrier; removing at least a portion of the thickness of the flexible substrate from at least a portion of the IC connecting areas to form channels in the flexible substrate and a plurality of IC substrate units spaced apart from one another on the carrier by said channels; forming an integrated circuit on at least one of the IC substrate units.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: May 21, 2024
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Richard Price, Brian Cobb, Neil Davies
  • Patent number: 11978744
    Abstract: A structure is disclosed, comprising: a first field effect transistor, FET, comprising a first source terminal, a first drain terminal, a first layer or body of semiconductive material arranged to provide a first semiconductive channel connecting the first source terminal to the first drain terminal, and a gate terminal arranged with respect to the first semiconductive channel such that a conductivity of the first semiconductive channel may be controlled by application of a voltage to the gate terminal; and a second FET comprising a second source terminal, a second drain terminal, a second layer or body of semiconductive material arranged to provide a second semiconductive channel connecting the second source terminal to the second drain terminal, and the gate terminal, the second conductive channel being arranged with respect to the gate terminal such that a conductivity of the second channel may be controlled by application of a voltage to the gate terminal.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: May 7, 2024
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Richard Price, Catherine Ramsdale, Brian Hardy Cobb, Feras Alkhalil
  • Publication number: 20240088251
    Abstract: A transistor is disclosed, comprising: a layer of semiconductor material comprising a first portion, a second portion, and a third portion connecting the first portion to the second portion and providing a semiconductive channel between the first portion and the second portion; a conductive first terminal covering and in electrical contact with said first portion of the layer of semiconductor material; a conductive second terminal covering and in electrical contact with said second portion of the layer of semiconductor material; a conductive gate terminal comprising a first overlapping portion covering at least part of the first terminal, and a channel portion covering the third portion of the layer of semiconductor material; and a layer of a first dielectric material, having a first dielectric constant, arranged between the first overlapping portion and the first terminal, and between the channel portion of the gate terminal and the third portion of the layer of semiconductor material.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Richard PRICE, Nathaniel GREEN, Neil DAVIES, Adrian THORNDYKE, Feras ALKHALIL
  • Patent number: 11910533
    Abstract: The invention relates to a thermode for connecting at least two components, comprising a tip having a body portion with at least two contact surface portions connected to and spaced apart from one another by a recess configured to receive a portion of one of the at least two components; and a support portion having at least one supporting surface portion configured to support a further component (being the other of the at least two components, wherein the contact surface portions and the supporting surface portion are configured to receive the at least two components between them and wherein one or both of the contact surface portions and the supporting surface portion are moveable relative to and towards one another to exert heat and/or pressure on the at least two components located between the contact surface portions and the supporting portion.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: February 20, 2024
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Neil Davies, Stephen Devenport, Richard Price
  • Publication number: 20240014148
    Abstract: A flexible electronic structure for bonding with an external circuit.
    Type: Application
    Filed: November 24, 2021
    Publication date: January 11, 2024
    Inventors: Brian COBB, Laurence SCULLION, Richard PRICE
  • Publication number: 20230422404
    Abstract: An electronic circuit assembly comprises: a first electronic circuit module; a second electronic circuit module; and a quantity of anisotropic conductive adhesive, ACA, comprising a plurality of electrically conductive particles and an electrically non-conductive adhesive, arranged to bond the first electronic circuit module to the second electronic circuit module.
    Type: Application
    Filed: November 24, 2021
    Publication date: December 28, 2023
    Inventors: Richard PRICE, Brian COBB, Laurence SCULLION, Melanie WINTER, Neil DAVIES
  • Publication number: 20230387145
    Abstract: A structure is disclosed, comprising: a first field effect transistor, FET, comprising a first source terminal, a first drain terminal, a first layer or body of semiconductive material arranged to provide a first semiconductive channel connecting the first source terminal to the first drain terminal, and a gate terminal arranged with respect to the first semiconductive channel such that a conductivity of the first semiconductive channel may be controlled by application of a voltage to the gate terminal; and a second FET comprising a second source terminal, a second drain terminal, a second layer or body of semiconductive material arranged to provide a second semiconductive channel connecting the second source terminal to the second drain terminal, and the gate terminal, the second conductive channel being arranged with respect to the gate terminal such that a conductivity of the second channel may be controlled by application of a voltage to the gate terminal.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Inventors: Richard PRICE, Catherine RAMSDALE, Brian Hardy COBB, Feras ALKHALIL
  • Publication number: 20230258695
    Abstract: A signal measuring apparatus comprising: signal circuitry configured to receive an input signal to be measured; and memory circuitry coupled to the signal circuitry and configured to store information representing a magnitude of a voltage or a current of the input signal; wherein the memory circuitry comprises a first memory cell having a material which is arranged to switch from a first material state to a second material state in response to a first switching signal being applied thereto, wherein the first memory cell is tuned to a first value for the first switching signal so that a current or voltage with a magnitude at or above the first value will cause the material of the first memory cell to switch from the first material state to second material state; wherein the apparatus is configured to apply a measurement signal indicative of the input signal to the first memory cell for switching the material of the first memory cell from the first material state to the second material state in dependence on a
    Type: Application
    Filed: July 6, 2021
    Publication date: August 17, 2023
    Applicant: Pragmatic Semiconductor Limited
    Inventors: Scott WHITE, Richard PRICE, Feras ALKHALIL, Catherine RAMSDALE, Antony SOU
  • Publication number: 20230253509
    Abstract: A Schottky diode comprises: a first electrode; a second electrode; and a body of semiconductive material connected to the first electrode at a first interface and connected to the second electrode at a second interface, wherein the first interface comprises a first planar region lying in a first plane and the first electrode has a first projection onto the first plane in a first direction normal to the first plane, the second interface comprises a second planar region lying in a second plane and the second electrode has a second projection onto the first plane in said first direction, at least a portion of the second projection lies outside the first projection, said second planar region is offset from the first planar region in said first direction, and one of the first interface and the second interface provides a Schottky contact.
    Type: Application
    Filed: April 5, 2023
    Publication date: August 10, 2023
    Inventors: Feras ALKHALIL, Richard PRICE, Brian COBB
  • Publication number: 20230238377
    Abstract: An electronic circuit comprises a first resistor (1) and a second resistor (2). The first resistor comprises: a first sheet (10) of resistive material; and a first pair (11, 12) of conductive contacts, each arranged in electrical contact with the first sheet, and arranged such that a shortest resistive path in the first sheet between the first pair of contacts passes through the first sheet and has a length equal to a thickness (LI) of the first sheet. The second resistor comprises: a second sheet (20) of resistive material; and a second pair (21, 22) of conductive contacts, each arranged in electrical contact with the second sheet, and arranged such that a shortest resistive path (L2) in the second sheet between the second pair of contacts passes along at least a portion of a length of the second sheet.
    Type: Application
    Filed: October 22, 2020
    Publication date: July 27, 2023
    Inventors: Richard PRICE, Brian COBB
  • Patent number: 11659669
    Abstract: One exemplary aspect relates to a process and apparatus for selectively changing adhesion strength between a flexible substrate and a carrier at specific locations to facilitate shipping and subsequent removal of the flexible substrate from the carrier. The process includes providing a flexible substrate comprising a plurality of integrated circuits thereon providing a carrier for the flexible substrate and adhering the flexible substrate to the carrier by creating an interface between the flexible substrate and the carrier. The process further includes changing the adhesion force between the flexible substrate and the carrier at selected locations by non-uniform treatment of the interface between the flexible substrate and the carrier with an electromagnetic radiation source (e.g. a laser, flashlamp, high powered LED, an infrared radiation source or the like) so as to decrease or increase the adhesion force between a portion of the flexible substrate and the carrier at the selected location.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: May 23, 2023
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Richard Price, Stephen Devenport, Brian Cobb
  • Patent number: D1070912
    Type: Grant
    Filed: November 2, 2023
    Date of Patent: April 15, 2025
    Assignee: SHIMADZU CORPORATION
    Inventors: Kosuke Uchiyama, Richard Price