Patents by Inventor Richard Price

Richard Price has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220293591
    Abstract: A method of manufacturing an electronic circuit comprising a first device and at least a second device is disclosed. The first device comprises a first terminal, a second terminal, and a first body of semiconductive material providing a semiconductive path between the first and second terminals, and the second device comprises a third terminal, a fourth terminal, and a second body of material providing a resistive or semiconductive current path between the third terminal and the fourth terminal. The method comprises: forming the first body; and forming the second body, wherein the first body comprises a first quantity of a metal oxide and the second body comprises a second quantity of said metal oxide. Corresponding electronic circuits are disclosed.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 15, 2022
    Inventors: Richard PRICE, Catherine RAMSDALE, Peter Fergus DOWNS, Feras ALKHALIL, Abhishek CHANDRAMOHAN
  • Publication number: 20220293797
    Abstract: A thin-film electronic component includes a first terminal, a second terminal, and a first current path between the first terminal and the second terminal, wherein the first current path is formed from a first segment of a first material and a first segment of a second material arranged in series between the first terminal and the second terminal.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 15, 2022
    Inventor: Richard PRICE
  • Publication number: 20220293717
    Abstract: A thin-film integrated circuit comprising a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor is provided. A semiconducting region of the first semiconductor device, a resistor body of the first resistor, a semiconducting region of the second semiconductor device, and a resistor body of the second resistor are formed from at least one of a first source material and a second source material, and a material of the resistor body of the first resistor and a material of the resistor body of the second resistor have different electrical properties.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 15, 2022
    Inventor: Richard PRICE
  • Patent number: 11414181
    Abstract: An aircraft landing gear assembly includes a bi-stable, split line tube biased to assume a tubular condition to serve in place of a lock link or side stay and a flexible vessel actuator configured to radially enlarge the tube at a region for folding.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: August 16, 2022
    Inventor: Neil Richard Price
  • Publication number: 20220246500
    Abstract: There is provided a flexible electronic structure for bonding with an external circuit, comprising a flexible substrate, having a first surface, configured for bonding with the external circuit, and an opposing second surface, configured for engagement with a bonding tool, comprising at least one electronic component; at least one contact member, operatively coupled with said at least one electronic component and provided at said first surface of said flexible substrate, and adapted to operably interface with the external circuit after bonding, and at least one shield member, provided at said first surface so as to shieldingly overlap at least a portion of said at least one electronic component, adapted to withstand a predetermined pressure applied to said first surface and/or said opposing second surface during bonding with the external circuit.
    Type: Application
    Filed: May 19, 2020
    Publication date: August 4, 2022
    Inventors: Brian COBB, Richard PRICE
  • Patent number: 11406023
    Abstract: The present invention relates to a method and apparatus for manufacturing a plurality of electronic circuits, each electronic circuit comprising a respective flexible first portion, comprising a respective group of contact pads (contacts), and a respective flexible integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad, the method comprising: providing (e.g. manufacturing) a flexible first structure comprising the plurality of first portions; providing (e.g.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: August 2, 2022
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Richard Price, Stephen Devenport, Brian Cobb
  • Publication number: 20220238472
    Abstract: There is provided a flexible electronic structure for bonding with an external circuit. The flexible electronic structure comprising: a flexible body having a first surface, the flexible body comprising at least one electronic component; at least one contact element configured to bond with the external circuit, the at least one contact element operatively coupled with the at least one electronic component and provided at the first surface of the flexible body, and arranged to operably interface with the external circuit after bonding, and at least one support element provided at the first surface of the flexible body, each support element arranged to contact a corresponding surface element disposed on a first surface of an external structure comprising the external circuit.
    Type: Application
    Filed: May 19, 2020
    Publication date: July 28, 2022
    Inventors: Brian COBB, Richard PRICE
  • Publication number: 20220230979
    Abstract: A method for fabricating a thin-film integrated circuit, IC, including a plurality of electronic components, the method comprising: forming, using a first fabrication technique, the plurality of electronic components, and forming, using a second fabrication technique, a conductive layer on the plurality of electronic components to form a redistribution layer, RDL, wherein the first fabrication technique includes photolithographic patterning, and the first fabrication technique is different to the second fabrication technique.
    Type: Application
    Filed: May 19, 2020
    Publication date: July 21, 2022
    Inventors: Ken WILLIAMSON, Richard PRICE
  • Publication number: 20220173219
    Abstract: A transistor is disclosed, comprising: a layer of semiconductor material comprising a first portion, a second portion, and a third portion connecting the first portion to the second portion and providing a semiconductive channel between the first portion and the second portion; a conductive first terminal covering and in electrical contact with said first portion of the layer of semiconductor material; a conductive second terminal covering and in electrical contact with said second portion of the layer of semiconductor material; a conductive gate terminal comprising a first overlapping portion covering at least part of the first terminal, and a channel portion covering the third portion of the layer of semiconductor material; and a layer of a first dielectric material, having a first dielectric constant, arranged between the first overlapping portion and the first terminal, and between the channel portion of the gate terminal and the third portion of the layer of semiconductor material.
    Type: Application
    Filed: February 17, 2022
    Publication date: June 2, 2022
    Inventors: Richard PRICE, Nathaniel GREEN, Neil DAVIES, Adrian THORNDYKE, Feras ALKHALIL
  • Publication number: 20220130738
    Abstract: The present invention provides for an interposer subassembly that is suitable for an electronic system having at least one integrated circuit (1C) component. The interposer subassembly comprises a flexible base layer, having a first surface and an opposing second surface, at least one active electronic circuit component, operatively integrated within said flexible base layer, and at least one first patterned contact layer, provided on any one of said first surface and said second surface of said flexible base layer and which is configured to operably interface with said at least one active electronic circuit component and the at least one 1C component.
    Type: Application
    Filed: January 31, 2020
    Publication date: April 28, 2022
    Inventors: Brian COBB, Scott WHITE, Ken WILLIAMSON, Anthony SOU, Catherine RAMSDALE, Rob MANN, Neil DAVIES, Joao de OLIVEIRA, Gillian EWERS, Pascaline BOULANGER, Richard PRICE
  • Patent number: 11177145
    Abstract: A method of manufacturing a plurality of electronic circuits is disclosed. Each electronic circuit comprises a respective first portion, comprising a respective group of contact pads, and a respective integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad. The method comprises: providing a first structure comprising the plurality of first portions; providing a second structure comprising the plurality of ICs and a common support arranged to support the plurality of ICs; transferring said ICs from the common support onto a first roller having a removable surface portion; and transferring said ICs from the first roller onto the first structure such that each group of terminals is mounted on a respective group of contact pads.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: November 16, 2021
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Neil Davies, Richard Price, Stephen Devenport, Stuart Speakman
  • Publication number: 20210307225
    Abstract: The invention relates to a thermode for connecting at least two components, comprising a tip having a body portion with at least two contact surface portions connected to and spaced apart from one another by a recess configured to receive a portion of one of the at least two components; and a support portion having at least one supporting surface portion configured to support a further component (being the other of the at least two components, wherein the contact surface portions and the supporting surface portion are configured to receive the at least two components between them and wherein one or both of the contact surface portions and the supporting surface portion are moveable relative to and towards one another to exert heat and/or pressure on the at least two components located between the contact surface portions and the supporting portion.
    Type: Application
    Filed: July 30, 2019
    Publication date: September 30, 2021
    Inventors: Neil DAVIES, Stephen DEVENPORT, Richard PRICE
  • Publication number: 20210265395
    Abstract: A structure is disclosed, comprising: a first field effect transistor, FET, comprising a first source terminal, a first drain terminal, a first layer or body of semiconductive material arranged to provide a first semiconductive channel connecting the first source terminal to the first drain terminal, and a gate terminal arranged with respect to the first semiconductive channel such that a conductivity of the first semiconductive channel may be controlled by application of a voltage to the gate terminal; and a second FET comprising a second source terminal, a second drain terminal, a second layer or body of semiconductive material arranged to provide a second semiconductive channel connecting the second source terminal to the second drain terminal, and the gate terminal, the second conductive channel being arranged with respect to the gate terminal such that a conductivity of the second channel may be controlled by application of a voltage to the gate terminal.
    Type: Application
    Filed: May 10, 2021
    Publication date: August 26, 2021
    Inventors: Richard PRICE, Catherine RAMSDALE, Brian Hardy COBB, Feras ALKHALIL
  • Patent number: 11004875
    Abstract: A structure is disclosed, comprising: a first field effect transistor, FET, comprising a first source terminal, a first drain terminal, a first layer or body of semiconductive material arranged to provide a first semiconductive channel connecting the first source terminal to the first drain terminal, and a gate terminal arranged with respect to the first semiconductive channel such that a conductivity of the first semiconductive channel may be controlled by application of a voltage to the gate terminal; and a second FET comprising a second source terminal, a second drain terminal, a second layer or body of semiconductive material arranged to provide a second semiconductive channel connecting the second source terminal to the second drain terminal, and the gate terminal, the second conductive channel being arranged with respect to the gate terminal such that a conductivity of the second channel may be controlled by application of a voltage to the gate terminal.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: May 11, 2021
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Richard Price, Catherine Ramsdale, Brian Hardy Cobb, Feras Alkhalil
  • Publication number: 20210036034
    Abstract: The present invention provides processes for manufacturing a plurality of discrete integrated circuits (ICs) on a carrier, the process comprising the steps of: providing a carrier for a flexible substrate; depositing a flexible substrate of uniform thickness on said carrier; removing at least a portion of the thickness of the flexible substrate from at least a portion of the IC connecting areas to form channels in the flexible substrate and a plurality of IC substrate units spaced apart from one another on the carrier by said channels; forming an integrated circuit on at least one of the IC substrate units.
    Type: Application
    Filed: January 30, 2019
    Publication date: February 4, 2021
    Inventors: Richard PRICE, Brian COBB, Neil DAVIES
  • Publication number: 20200359508
    Abstract: The invention relates to a process and apparatus for selectively changing adhesion strength between a flexible substrate and a carrier at specific locations in order to facilitate shipping and subsequent removal of the flexible substrate from the carrier, the process comprising the steps of: providing a flexible substrate comprising a plurality of integrated circuits thereon; providing a carrier for the flexible substrate and adhering the flexible substrate to the carrier by creating an interface between the flexible substrate and the carrier; changing the adhesion force between the flexible substrate and the carrier at selected locations by non-uniform treatment of the interface between the flexible substrate and the carrier with an electromagnetic radiation source (e.g. a laser, flashlamp, high powered LED, an infrared radiation source or the like) so as to decrease or increase the adhesion force between a portion of the flexible substrate and the carrier at the selected location.
    Type: Application
    Filed: August 16, 2018
    Publication date: November 12, 2020
    Inventors: Richard PRICE, Stephen DEVENPORT, Brian COBB
  • Publication number: 20200350441
    Abstract: A Schottky diode comprises: a first electrode; a second electrode; and a body of semiconductive material connected to the first electrode at a first interface and connected to the second electrode at a second interface, wherein the first interface comprises a first planar region lying in a first plane and the first electrode has a first projection onto the first plane in a first direction normal to the first plane, the second interface comprises a second planar region lying in a second plane and the second electrode has a second projection onto the first plane in said first direction, at least a portion of the second projection lies outside the first projection, said second planar region is offset from the first planar region in said first direction, and one of the first interface and the second interface provides a Schottky contact.
    Type: Application
    Filed: December 11, 2018
    Publication date: November 5, 2020
    Inventors: Feras ALKHALIL, Richard PRICE, Brian COBB
  • Publication number: 20200214143
    Abstract: The present invention relates to a method and apparatus for manufacturing a plurality of electronic circuits, each electronic circuit comprising a respective flexible first portion, comprising a respective group of contact pads (contacts), and a respective flexible integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad, the method comprising: providing (e.g. manufacturing) a flexible first structure comprising the plurality of first portions; providing (e.g.
    Type: Application
    Filed: August 16, 2018
    Publication date: July 2, 2020
    Inventors: Richard PRICE, Stephen DEVENPORT, Brian COBB
  • Publication number: 20200176287
    Abstract: A method of manufacturing a plurality of electronic circuits is disclosed. Each electronic circuit comprises a respective first portion, comprising a respective group of contact pads, and a respective integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad. The method comprises: providing a first structure comprising the plurality of first portions; providing a second structure comprising the plurality of ICs and a common support arranged to support the plurality of ICs; transferring said ICs from the common support onto a first roller having a removable surface portion; and transferring said ICs from the first roller onto the first structure such that each group of terminals is mounted on a respective group of contact pads.
    Type: Application
    Filed: June 18, 2018
    Publication date: June 4, 2020
    Inventors: Neil DAVIES, Richard PRICE, Stephen DEVENPORT, Stuart SPEAKMAN
  • Patent number: 10672765
    Abstract: A method of manufacturing a transistor comprising providing a substrate, a region of semiconductive material on the substrate, and a region of electrically conductive material on the region of semiconductive material; forming a covering of resist material over said regions; forming a depression in a surface of the covering of resist material that extends over a first portion of said region of conductive material, said first portion separating second and third portions of the conductive region; removing resist material located under said depression to form a window through said covering, exposing said first portion; removing said first portion to expose a connecting portion of the region of semiconductive material that connects the second and third portions; forming a layer of dielectric material over the exposed connecting portion; and forming a layer of electrically conductive material over said layer of dielectric material.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: June 2, 2020
    Assignee: National Centre For Printable Electronics
    Inventors: Richard Price, Scott White