Patents by Inventor Robert A. Neidorff

Robert A. Neidorff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10778034
    Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: September 15, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
  • Publication number: 20190103765
    Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.
    Type: Application
    Filed: December 3, 2018
    Publication date: April 4, 2019
    Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
  • Patent number: 10181754
    Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: January 15, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
  • Patent number: 10156593
    Abstract: Transistor arrays are disclosed herein. An example transistor array includes a first node for coupling the transistor array to a circuit. A first transistor and a second transistor are coupled to the first node. A gate controller is coupled to the gate of the first transistor and the gate of the second transistor and is for selectively turning on the first transistor and the second transistor. A current source is coupled to the first node and is active when the second transistor is off. Calibration circuitry measures the voltage of the first node when the current source is active.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: December 18, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Robert A. Neidorff
  • Patent number: 10141845
    Abstract: Disclosed examples provide DC-DC converters and control circuits to provide high and low-side driver signals and to selectively adjust a delay time between a low-side switching device turning off and a high-side switching device turning on according to a comparator signal, including a clocked comparator circuit referenced to a switching node to sample the voltage across the high-side switching device in response to a first edge of the high-side driver signal, and to generate the comparator signal indicating a polarity of the sampled high-side switch voltage to facilitate zero voltage switching of the high-side switching device.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: November 27, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Saurav Bandyopadhyay, Robert A. Neidorff
  • Patent number: 9853504
    Abstract: A circuit for setting a threshold level for extracting data from a signal stream includes a terminal couplable to the signal stream. A peak detector is coupled to the terminal. A valley detector is coupled to the terminal. A comparator is coupled to outputs of the peak detector and the valley detector for generating a threshold voltage for extracting data or commands from the signal stream. A method of extracting data from a signal stream including: peak detecting the signal stream to generate a first signal; valley detecting the signal stream to generate a second signal; combining the first and second signals to generate a threshold signal; and extracting data from the signal stream utilizing the threshold level signal.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 26, 2017
    Assignee: Texas Instruments Incorporated
    Inventor: Robert A. Neidorff
  • Publication number: 20170363662
    Abstract: Transistor arrays are disclosed herein. An example transistor array includes a first node for coupling the transistor array to a circuit. A first transistor and a second transistor are coupled to the first node. A gate controller is coupled to the gate of the first transistor and the gate of the second transistor and is for selectively turning on the first transistor and the second transistor. A current source is coupled to the first node and is active when the second transistor is off. Calibration circuitry measures the voltage of the first node when the current source is active.
    Type: Application
    Filed: June 21, 2016
    Publication date: December 21, 2017
    Inventor: Robert A. Neidorff
  • Patent number: 9838084
    Abstract: A transmitter circuit in a wireless power transmission system has a tank circuit, having an inductor and a capacitor, the inductor being couplable to the inductor of a receiver circuit. An oscillator generates an oscillation frequency signal for driving the tank circuit. A first digital-to-analog converter (DAC) provides a first control signal to control the oscillating frequency of the oscillator. A frequency shift keying (FSK) circuit changes a digital signal input to the digital-to-analog converter for shifting the oscillation frequency utilized to drive the tank circuit, the FSK signal transmitting data or commands to the receiver circuit. A method of transmitting FSK signals in a wireless power transmission system is also disclosed.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 5, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Ashish Khandelwal, Robert A. Neidorff
  • Publication number: 20170302178
    Abstract: Disclosed examples provide DC-DC converters and control circuits to provide high and low-side driver signals and to selectively adjust a delay time between a low-side switching device turning off and a high-side switching device turning on according to a comparator signal, including a clocked comparator circuit referenced to a switching node to sample the voltage across the high-side switching device in response to a first edge of the high-side driver signal, and to generate the comparator signal indicating a polarity of the sampled high-side switch voltage to facilitate zero voltage switching of the high-side switching device.
    Type: Application
    Filed: December 1, 2016
    Publication date: October 19, 2017
    Applicant: Texas Instruments Incorporated
    Inventors: Saurav Bandyopadhyay, Robert A. Neidorff
  • Publication number: 20160352146
    Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.
    Type: Application
    Filed: June 6, 2016
    Publication date: December 1, 2016
    Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
  • Patent number: 9362755
    Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: June 7, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
  • Publication number: 20160094278
    Abstract: A transmitter circuit in a wireless power transmission system has a tank circuit, having an inductor and a capacitor, the inductor being couplable to the inductor of a receiver circuit. An oscillator generates an oscillation frequency signal for driving the tank circuit. A first digital-to-analog converter (DAC) provides a first control signal to control the oscillating frequency of the oscillator. A frequency shift keying (FSK) circuit changes a digital signal input to the digital-to-analog converter for shifting the oscillation frequency utilized to drive the tank circuit, the FSK signal transmitting data or commands to the receiver circuit. A method of transmitting FSK signals in a wireless power transmission system is also disclosed.
    Type: Application
    Filed: September 30, 2014
    Publication date: March 31, 2016
    Inventors: Ashish Khandelwal, Robert A. Neidorff
  • Publication number: 20150171634
    Abstract: A circuit for setting a threshold level for extracting data from a signal stream includes a terminal couplable to the signal stream. A peak detector is coupled to the terminal. A valley detector is coupled to the terminal. A comparator is coupled to outputs of the peak detector and the valley detector for generating a threshold voltage for extracting data or commands from the signal stream. A method of extracting data from a signal stream including: peak detecting the signal stream to generate a first signal; valley detecting the signal stream to generate a second signal; combining the first and second signals to generate a threshold signal; and extracting data from the signal stream utilizing the threshold level signal.
    Type: Application
    Filed: September 30, 2014
    Publication date: June 18, 2015
    Inventor: Robert A. Neidorff
  • Publication number: 20150171935
    Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.
    Type: Application
    Filed: September 30, 2014
    Publication date: June 18, 2015
    Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
  • Patent number: 8922189
    Abstract: An apparatus for generating an output voltage from an input voltage is provided. The apparatus comprises a switch that receives the input voltage, an inductor that is coupled to the switch, a capacitor coupled to the inductor with the output voltage being output from a node between the inductor and the capacitor, a measuring circuit that receives and measures the input voltage, and a controller that is coupled to the switch and to the measuring circuit. Additionally, the controller receives the measured input voltage and calculates an on-time for the switch based on the measured input voltage and actuates the switch for the on-time.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: December 30, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Robert A. Neidorff, Bing Lu
  • Patent number: 8878330
    Abstract: An integrated circuit containing a voltage divider having an upper resistor of unsilicided gate material over field oxide around a central opening and a drift layer under the upper resistor, an input terminal coupled to an input node of the upper resistor adjacent to the central opening in the field oxide and coupled to the drift layer through the central opening, a sense terminal coupled to a sense node on the upper resistor opposite from the input node, a lower resistor with a sense node coupled to the sense terminal and a reference node, and a reference terminal coupled to the reference node. A process of forming the integrated circuit containing the voltage divider.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: November 4, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Hideaki Kawahara, Marie Denison, Sameer Pendharkar, Philip L. Hower, John Lin, Robert A. Neidorff
  • Patent number: 8872273
    Abstract: An integrated circuit containing a gate controlled voltage divider having an upper resistor on field oxide in series with a transistor switch in series with a lower resistor. A resistor drift layer is disposed under the upper resistor, and the transistor switch includes a switch drift layer adjacent to the resistor drift layer, separated by a region which prevents breakdown between the drift layers. The switch drift layer provides an extended drain or collector for the transistor switch. A sense terminal of the voltage divider is coupled to a source or emitter node of the transistor and to the lower resistor. An input terminal is coupled to the upper resistor and the resistor drift layer. A process of forming the integrated circuit containing the gate controlled voltage divider.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: October 28, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Hideaki Kawahara, Marie Denison, Sameer Pendharkar, Philip L. Hower, John Lin, Robert A. Neidorff
  • Patent number: 8558583
    Abstract: A system includes control circuitry configured to provide one or more control pulses in response to a command signal, the one or more control pulses being communicated from the control circuitry to associated circuitry via a connection. A detector is configured to detect a disturbing signal that mitigates reception of the one or more control pulses via the connection. The command signal is controlled to cause the control circuitry to provide one or more additional control pulses when the disturbing signal is detected by the detector to improve a likelihood of the reception of the one or more control pulses via the connection.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: October 15, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Victor Samuel Sinow, Bharath Balaji Kannan, Robert A. Neidorff
  • Patent number: 8471592
    Abstract: A logic device includes a transmission gate block configured to receive a binary input and a control input, the transmission gate block configured to provide a multi-bit output that is correlated from the binary input and in response to the control input having a first value. A state driver block is activated to drive one of a low state bit pattern or a high state bit pattern to the multi-bit output in response to the control input having a second value, which is different from the first value.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: June 25, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Paul G. Hlebowitsh, Robert A. Neidorff
  • Publication number: 20130147513
    Abstract: A logic device includes a transmission gate block configured to receive a binary input and a control input, the transmission gate block configured to provide a multi-bit output that is correlated from the binary input and in response to the control input having a first value. A state driver block is activated to drive one of a low state bit pattern or a high state bit pattern to the multi-bit output in response to the control input having a second value, which is different from the first value.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 13, 2013
    Inventors: Paul G. Hlebowitsh, Robert A. Neidorff