Patents by Inventor Robert A. Neidorff
Robert A. Neidorff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240068880Abstract: Described embodiments include a circuit for temperature sensing having a first current source coupled to a diode input terminal. The first current source provides a first current at a first current output. A second current source provides a second current at a second current output. The second current is larger than the first current. A first switch is coupled between the second current source output and the diode input terminal. A capacitor is coupled between the diode input terminal and a temperature output terminal. A second switch is coupled between the temperature output terminal and a ground terminal. The temperature output terminal provides a temperature signal having a voltage that is proportional to a temperature of a component.Type: ApplicationFiled: August 29, 2022Publication date: February 29, 2024Inventors: Santhosh Kumar Srinivasan, Robert A. Neidorff, Ramakrishna Ankamreddi, Sravya Kanneganti, Padmanabh S. Prabhu
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Publication number: 20230421049Abstract: Techniques for controlling a switching converter. In an example, the converter includes a switching element and a logic circuit. The switching element includes a plurality of parallel-coupled transistors. The logic circuit is configured to initially provide one or more gate drive signals to one or more of the parallel-coupled transistors, respectively, but not to all of the transistors. After a delay period, the logic circuit is further configured to provide a respective gate drive signal to all or an otherwise larger number of the transistors. The initially-provided one or more gate signals is/are based on one or more conditions associated with the converter, such as RdsOn associated with the switching element and/or temperature. In this manner, a switching transistor that is adaptively-sized based on the condition(s) is initially switched to damp ringing, and a larger switching transistor (e.g., all transistors in parallel) is subsequently switched for low conduction loss.Type: ApplicationFiled: June 27, 2022Publication date: December 28, 2023Inventor: Robert A. Neidorff
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Patent number: 10778034Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.Type: GrantFiled: December 3, 2018Date of Patent: September 15, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
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Publication number: 20190103765Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.Type: ApplicationFiled: December 3, 2018Publication date: April 4, 2019Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
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Patent number: 10181754Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.Type: GrantFiled: June 6, 2016Date of Patent: January 15, 2019Assignee: Texas Instruments IncorporatedInventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
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Patent number: 10156593Abstract: Transistor arrays are disclosed herein. An example transistor array includes a first node for coupling the transistor array to a circuit. A first transistor and a second transistor are coupled to the first node. A gate controller is coupled to the gate of the first transistor and the gate of the second transistor and is for selectively turning on the first transistor and the second transistor. A current source is coupled to the first node and is active when the second transistor is off. Calibration circuitry measures the voltage of the first node when the current source is active.Type: GrantFiled: June 21, 2016Date of Patent: December 18, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Robert A. Neidorff
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Patent number: 10141845Abstract: Disclosed examples provide DC-DC converters and control circuits to provide high and low-side driver signals and to selectively adjust a delay time between a low-side switching device turning off and a high-side switching device turning on according to a comparator signal, including a clocked comparator circuit referenced to a switching node to sample the voltage across the high-side switching device in response to a first edge of the high-side driver signal, and to generate the comparator signal indicating a polarity of the sampled high-side switch voltage to facilitate zero voltage switching of the high-side switching device.Type: GrantFiled: December 1, 2016Date of Patent: November 27, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Saurav Bandyopadhyay, Robert A. Neidorff
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Patent number: 9853504Abstract: A circuit for setting a threshold level for extracting data from a signal stream includes a terminal couplable to the signal stream. A peak detector is coupled to the terminal. A valley detector is coupled to the terminal. A comparator is coupled to outputs of the peak detector and the valley detector for generating a threshold voltage for extracting data or commands from the signal stream. A method of extracting data from a signal stream including: peak detecting the signal stream to generate a first signal; valley detecting the signal stream to generate a second signal; combining the first and second signals to generate a threshold signal; and extracting data from the signal stream utilizing the threshold level signal.Type: GrantFiled: September 30, 2014Date of Patent: December 26, 2017Assignee: Texas Instruments IncorporatedInventor: Robert A. Neidorff
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Publication number: 20170363662Abstract: Transistor arrays are disclosed herein. An example transistor array includes a first node for coupling the transistor array to a circuit. A first transistor and a second transistor are coupled to the first node. A gate controller is coupled to the gate of the first transistor and the gate of the second transistor and is for selectively turning on the first transistor and the second transistor. A current source is coupled to the first node and is active when the second transistor is off. Calibration circuitry measures the voltage of the first node when the current source is active.Type: ApplicationFiled: June 21, 2016Publication date: December 21, 2017Inventor: Robert A. Neidorff
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Patent number: 9838084Abstract: A transmitter circuit in a wireless power transmission system has a tank circuit, having an inductor and a capacitor, the inductor being couplable to the inductor of a receiver circuit. An oscillator generates an oscillation frequency signal for driving the tank circuit. A first digital-to-analog converter (DAC) provides a first control signal to control the oscillating frequency of the oscillator. A frequency shift keying (FSK) circuit changes a digital signal input to the digital-to-analog converter for shifting the oscillation frequency utilized to drive the tank circuit, the FSK signal transmitting data or commands to the receiver circuit. A method of transmitting FSK signals in a wireless power transmission system is also disclosed.Type: GrantFiled: September 30, 2014Date of Patent: December 5, 2017Assignee: Texas Instruments IncorporatedInventors: Ashish Khandelwal, Robert A. Neidorff
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Publication number: 20170302178Abstract: Disclosed examples provide DC-DC converters and control circuits to provide high and low-side driver signals and to selectively adjust a delay time between a low-side switching device turning off and a high-side switching device turning on according to a comparator signal, including a clocked comparator circuit referenced to a switching node to sample the voltage across the high-side switching device in response to a first edge of the high-side driver signal, and to generate the comparator signal indicating a polarity of the sampled high-side switch voltage to facilitate zero voltage switching of the high-side switching device.Type: ApplicationFiled: December 1, 2016Publication date: October 19, 2017Applicant: Texas Instruments IncorporatedInventors: Saurav Bandyopadhyay, Robert A. Neidorff
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Publication number: 20160352146Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.Type: ApplicationFiled: June 6, 2016Publication date: December 1, 2016Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
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Patent number: 9362755Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.Type: GrantFiled: September 30, 2014Date of Patent: June 7, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
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Publication number: 20160094278Abstract: A transmitter circuit in a wireless power transmission system has a tank circuit, having an inductor and a capacitor, the inductor being couplable to the inductor of a receiver circuit. An oscillator generates an oscillation frequency signal for driving the tank circuit. A first digital-to-analog converter (DAC) provides a first control signal to control the oscillating frequency of the oscillator. A frequency shift keying (FSK) circuit changes a digital signal input to the digital-to-analog converter for shifting the oscillation frequency utilized to drive the tank circuit, the FSK signal transmitting data or commands to the receiver circuit. A method of transmitting FSK signals in a wireless power transmission system is also disclosed.Type: ApplicationFiled: September 30, 2014Publication date: March 31, 2016Inventors: Ashish Khandelwal, Robert A. Neidorff
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Publication number: 20150171935Abstract: A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver for receiving communications from the secondary side wireless power receiver through the inductive coupling comprises a primary side tank circuit receiving a signal on from the secondary side wireless power receiver. A phase delay or time delay circuit generates a fixed delay clock signal. A sample and hold circuit samples a tank circuit voltage utilizing the fixed phase or time delayed clock signal. A comparator is coupled to an output of the sample and hold circuit for extracting data or commands from the signal stream. A method of operating a primary side wireless transmitter inductively coupled to a secondary side wireless power receiver for supplying power to the wireless power receiver to power a load coupled to the receiver is also disclosed.Type: ApplicationFiled: September 30, 2014Publication date: June 18, 2015Inventors: Ashish Khandelwal, Joseph M. Khayat, Yipeng Su, Robert A. Neidorff, Bharath B. Kannan
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Publication number: 20150171634Abstract: A circuit for setting a threshold level for extracting data from a signal stream includes a terminal couplable to the signal stream. A peak detector is coupled to the terminal. A valley detector is coupled to the terminal. A comparator is coupled to outputs of the peak detector and the valley detector for generating a threshold voltage for extracting data or commands from the signal stream. A method of extracting data from a signal stream including: peak detecting the signal stream to generate a first signal; valley detecting the signal stream to generate a second signal; combining the first and second signals to generate a threshold signal; and extracting data from the signal stream utilizing the threshold level signal.Type: ApplicationFiled: September 30, 2014Publication date: June 18, 2015Inventor: Robert A. Neidorff
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Patent number: 8922189Abstract: An apparatus for generating an output voltage from an input voltage is provided. The apparatus comprises a switch that receives the input voltage, an inductor that is coupled to the switch, a capacitor coupled to the inductor with the output voltage being output from a node between the inductor and the capacitor, a measuring circuit that receives and measures the input voltage, and a controller that is coupled to the switch and to the measuring circuit. Additionally, the controller receives the measured input voltage and calculates an on-time for the switch based on the measured input voltage and actuates the switch for the on-time.Type: GrantFiled: November 18, 2008Date of Patent: December 30, 2014Assignee: Texas Instruments IncorporatedInventors: Robert A. Neidorff, Bing Lu
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Patent number: 8878330Abstract: An integrated circuit containing a voltage divider having an upper resistor of unsilicided gate material over field oxide around a central opening and a drift layer under the upper resistor, an input terminal coupled to an input node of the upper resistor adjacent to the central opening in the field oxide and coupled to the drift layer through the central opening, a sense terminal coupled to a sense node on the upper resistor opposite from the input node, a lower resistor with a sense node coupled to the sense terminal and a reference node, and a reference terminal coupled to the reference node. A process of forming the integrated circuit containing the voltage divider.Type: GrantFiled: August 6, 2012Date of Patent: November 4, 2014Assignee: Texas Instruments IncorporatedInventors: Hideaki Kawahara, Marie Denison, Sameer Pendharkar, Philip L. Hower, John Lin, Robert A. Neidorff
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Patent number: 8872273Abstract: An integrated circuit containing a gate controlled voltage divider having an upper resistor on field oxide in series with a transistor switch in series with a lower resistor. A resistor drift layer is disposed under the upper resistor, and the transistor switch includes a switch drift layer adjacent to the resistor drift layer, separated by a region which prevents breakdown between the drift layers. The switch drift layer provides an extended drain or collector for the transistor switch. A sense terminal of the voltage divider is coupled to a source or emitter node of the transistor and to the lower resistor. An input terminal is coupled to the upper resistor and the resistor drift layer. A process of forming the integrated circuit containing the gate controlled voltage divider.Type: GrantFiled: August 6, 2012Date of Patent: October 28, 2014Assignee: Texas Instruments IncorporatedInventors: Hideaki Kawahara, Marie Denison, Sameer Pendharkar, Philip L. Hower, John Lin, Robert A. Neidorff
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Patent number: 8558583Abstract: A system includes control circuitry configured to provide one or more control pulses in response to a command signal, the one or more control pulses being communicated from the control circuitry to associated circuitry via a connection. A detector is configured to detect a disturbing signal that mitigates reception of the one or more control pulses via the connection. The command signal is controlled to cause the control circuitry to provide one or more additional control pulses when the disturbing signal is detected by the detector to improve a likelihood of the reception of the one or more control pulses via the connection.Type: GrantFiled: April 12, 2010Date of Patent: October 15, 2013Assignee: Texas Instruments IncorporatedInventors: Victor Samuel Sinow, Bharath Balaji Kannan, Robert A. Neidorff