Abstract: Various systems and methods for obtaining vendor information using mobile internet devices are described herein. An inquiry for a product or service is received from a user. A location for the receipt of the product or service is received. Vendor information of a vendor of the product or service proximate to the location is determined, with the vendor information including a price for the product or service, and a wait time to receive the product or service. The vendor information is then transmitted to the user.

Abstract: This disclosure describes, in part, techniques for utilizing crowdsourcing to implement actions. For instance, a remote system may receive, from an electronic device, data representing a presentation. The remote system may then provide the presentation to a first group of users using a first crowdsourcing resource. While providing the presentation, the remote system may receive feedback for the presentation. Later, the remote system may provide the presentation to a second group of users using a second crowdsourcing resource. While providing the presentation, the remote system may receive additional feedback for the presentation. After receiving the feedback, the remote system may receive data representing a plan for implementing an idea included in the presentation. The plan may be based at least in part on the feedback. The remote system may then provide information associated with the plan to a third group of users so that the idea may be implemented.

Abstract: Various systems and methods for obtaining vendor information using mobile internet devices are described herein. An inquiry for a product or service is received from a user. A location for the receipt of the product or service is received. Vendor information of a vendor of the product or service proximate to the location is determined, with the vendor information including a price for the product or service, and a wait time to receive the product or service. The vendor information is then transmitted to the user.

Abstract: Systems, apparatuses and methods may provide for technology that detects an initiation of a reset flow in a network edge computing system and determines one or more attributes of one or more long flow instructions during the reset flow, wherein the one or more attributes include a latency of the one or more long flow instructions. Additionally, the one or more attributes may be documented via an interface that is accessible by one or more of an operating system or a hypervisor associated with the network edge computing system.

Abstract: An apparatus is described that includes memory controller logic circuitry to interface with a memory side cache of a multi-level system memory. The memory controller logic circuitry includes error tracking circuitry to track errors of cache line slots in the memory side cache. The memory controller logic circuitry also comprises faulty list circuitry to store identifiers of faulty cache line slots that are deemed to be excessively error prone. The memory controller logic circuitry is to declare a miss in the memory side cache for requests that map to cache line slots identified in the faulty list.

Abstract: Various configurations and methods for disabling system management mode (SMM) and verifying a disabled status of SMM in a computing system are disclosed. In various examples, SMM may be disabled through a hardware strap, soft-straps, or firmware functions, and the indication of the SMM disabled status may be included in a model specific register (MSR) value accessible to the central processing unit (CPU). Additionally, techniques for verifying whether SMM is disabled in hardware or firmware, preventing access of SMM functionality, and handling secure software operations are disclosed.

Abstract: An apparatus and system for throttling I/O devices in a computer system is provided. In an example, a method for throttling device power demand during critical power events. The method includes detecting a critical power event and issuing a signal to system devices to defer optional transactions during the critical power event.

Abstract: An apparatus is described that includes memory controller logic circuitry to interface with a memory side cache of a multi-level system memory. The memory controller logic circuitry includes error tracking circuitry to track errors of cache line slots in the memory side cache. The memory controller logic circuitry also comprises faulty list circuitry to store identifiers of faulty cache line slots that are deemed to be excessively error prone. The memory controller logic circuitry is to declare a miss in the memory side cache for requests that map to cache line slots identified in the faulty list.

Abstract: Systems and methods providing a location-aware resource locator model for facilitating communication with networked electronic devices are generally disclosed herein. One embodiment includes a resource locator using a standard Uniform Resource Locator (URL) format, but enabling identification of one or more devices based on logical location information provided in the resource locator. The resource locator may also enable identification of the one or more devices based on logical proximity information (such as a logical term indicating a location property) relative to a dynamic location. Further disclosed embodiments include uses of a hierarchical structure to define logical terms and classes for use with a resource locator, and various location determination and lookup techniques used in connection with accessing an electronic device.

Abstract: Various configurations and methods for disabling system management mode (SMM) and verifying a disabled status of SMM in a computing system are disclosed. In various examples, SMM may be disabled through a hardware strap, soft-straps, or firmware functions, and the indication of the SMM disabled status may be included in a model specific register (MSR) value accessible to the central processing unit (CPU). Additionally, techniques for verifying whether SMM is disabled in hardware or firmware, preventing access of SMM functionality, and handling secure software operations are disclosed.

Abstract: A method and device for managing hardware errors in a multi-core environment includes allocating processor cores to a main set and a spare set of processor cores. The main set of processor cores are used by an operating system, and the spare set of processor cores are dedicated to software applications. Should a processor core error occur, a processor core swap may be performed to swap a spare processor core for a failing main processor core without interrupting the execution of the operating system.

Abstract: A management device and a method are described herein for managing an initial distribution of mobile stations to individual core network nodes (MSC/VLRs) within a core network node pool (MSC-pool) and/or for managing a redistribution of one or more of the mobile stations across the core network nodes (MSC/VLRs) within the core network node pool (MSC-pool) when an unbalanced condition is detected within the core network node pool (MSC-pool).

Abstract: A management device and a method are described herein for managing an initial distribution of mobile stations to individual core network nodes (MSC/VLRs) within a core network node pool (MSC-pool) and/or for managing a redistribution of one or more of the mobile stations across the core network nodes (MSC/VLRs) within the core network node pool (MSC-pool) when an unbalanced condition is detected within the core network node pool (MSC-pool).

Abstract: In one embodiment, a method includes initializing a portion of a computing system in a pre-boot environment using a basic input/output system (BIOS) stored in a non-volatile storage of the computing system, launching a boot manager to enable a launch of an operating system (OS) payload, and if the OS payload is not successfully launched, executing an OS payload portion and an antivirus stack stored in the non-volatile storage to restore an integrity of the mass storage. Other embodiments are described and claimed.

Abstract: Methods and apparatus are disclosed to improve system boot speed. A disclosed example method includes associating a first serial peripheral interface (SPI) with a baseboard management controller (BMC), copying an image from the first SPI to a volatile memory in response to receiving power at the BMC, and in response to receiving an access request associated with the first SPI, providing access to the image stored in the volatile memory.

Abstract: An apparatus and system for throttling I/O devices in a computer system is provided. In an example, a method for throttling device power demand during critical power events. The method includes detecting a critical power event and issuing a signal to system devices to defer optional transactions during the critical power event.

Abstract: Systems and methods providing a location-aware resource locator model for facilitating communication with networked electronic devices are generally disclosed herein. One embodiment includes a resource locator using a standard Uniform Resource Locator (URL) format, but enabling identification of one or many devices based on logical location information provided in the resource locator. The resource locator may also enable identification of the one or many devices based on logical proximity information (such as a logical term indicating a location property) relative to a dynamic location. Further disclosed embodiments include uses of a hierarchical structure to define logical terms and classes for use with a resource locator, and various location determination and lookup techniques used in connection with accessing an electronic device.

Abstract: Various systems and methods for obtaining vendor information using mobile internet devices are described herein. An inquiry for a product or service is received from a user. A location for the receipt of the product or service is received. Vendor information of a vendor of the product or service proximate to the location is determined, with the vendor information including a price for the product or service, and a wait time to receive the product or service. The vendor information is then transmitted to the user.

Abstract: A system, method, and call processing component for controlling an order of call processing among a plurality of call processing components. Each call processing component, upon receiving a call request when system resources are not available to process the requested call, creates a real queue entry in its call processing queue and sends a call-queued notification to all other call processing components in the system. The other call processing components in the telecommunication system then create a shadow queue entry in their respective call processing queues as a placeholder for the requested call. When system resources become available and the requested call is next in the queue, the call processing component that received the request de-queues and processes the requested call, and sends a call de-queued notification to the other call processing components.

Abstract: A method and device for managing hardware errors in a multi-core environment includes allocating processor cores to a main set and a spare set of processor cores. The main set of processor cores are used by an operating system, and the spare set of processor cores are dedicated to software applications. Should a processor core error occur, a processor core swap may be performed to swap a spare processor core for a failing main processor core without interrupting the execution of the operating system.