Patents by Inventor Robert Beach

Robert Beach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10472836
    Abstract: The present disclosure relates to reinforcement devices, systems and methods for use in constructing new structures, including post frame structures. Specifically, the present disclosure relates to reinforcement devices, systems and methods for replacing traditional wood and/or precast concrete columns utilized in building a new construction foundation, with a height adjustable foundation column assembly constructed from a corrosion resistant material. The present disclosure also relates to reinforcement devices, systems and methods useful for reinforcing existing post frame structures, particularly those with framing elements requiring repair.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: November 12, 2019
    Assignee: SWS Innovations, LLC
    Inventors: Philip J. Grussenmeyer, Steven Robert Beach
  • Publication number: 20190252238
    Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.
    Type: Application
    Filed: April 18, 2019
    Publication date: August 15, 2019
    Inventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
  • Publication number: 20190173003
    Abstract: A synthetic antiferromagnetic structure for a spintronic device is disclosed and has an FL2/Co or Co alloy/antiferromagnetic coupling/Co or Co alloy/CoFeB configuration where FL2 is a ferromagnetic free layer with intrinsic PMA. Antiferromagnetic coupling is improved by inserting a Co or Co alloy dusting layer on top and bottom surfaces of the antiferromagnetic coupling layer. The FL2 layer may be a L10 ordered alloy, a rare earth-transition metal alloy, or an (A1/A2)n laminate where A1 is one of Co, CoFe, or an alloy thereof, and A2 is one of Pt, Pd, Rh, Ru, Ir, Mg, Mo, Os, Si, V, Ni, NiCo, and NiFe, or A1 is Fe and A2 is V. A method is also provided for forming the synthetic antiferromagnetic structure.
    Type: Application
    Filed: January 28, 2019
    Publication date: June 6, 2019
    Inventors: Robert Beach, Guenole Jan, Yu-Jen Wang, Ru-Ying Tong
  • Publication number: 20190170375
    Abstract: An indoor environmental control and air distribution system for a building includes: an air handling unit; a manifold connected to the air handling unit having a chamber formed by a plurality of walls and a plurality of orifices formed through at least one of the walls; air distribution conduits each independently having a first end connected to the orifices of the manifold and a second end extending out from the manifold into different zones throughout the building; and an airflow modulating device having one or more airflow regulating dampers independently configured to move into at least two positions in which each position provides a different percentage of total air volume to each air distribution conduit. A method of using the indoor environmental control and air distribution system is also included.
    Type: Application
    Filed: April 4, 2017
    Publication date: June 6, 2019
    Inventors: Andrew Poerschke, Robert Beach, Anthony Grisolia
  • Patent number: 10312260
    Abstract: A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: June 4, 2019
    Assignee: Efficient Power Conversion Corporation
    Inventors: Jianjun Cao, Robert Beach, Alexander Lidow, Alana Nakata, Guangyuan Zhao, Yanping Ma, Robert Strittmatter, Michael A. de Rooij, Chunhua Zhou, Seshadri Kolluri, Fang-Chang Liu, Ming-Kun Chiang, Jiali Cao, Agus Jauhar
  • Patent number: 10312131
    Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: June 4, 2019
    Assignee: Efficient Power Converson Corporation
    Inventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
  • Patent number: 10297300
    Abstract: A method for measuring a temperature of magnetic junction switchable using spin transfer. The magnetic junction includes at least one magnetic layer. The method includes measuring a temperature variation of at least one magnetic characteristic for the magnetic layer(s) versus temperature. The method also includes measuring a bias variation in the magnetic characteristic versus an electrical bias for the magnetic junction. This measurement is performed such that spin transfer torque-induced variation(s) in the magnetic characteristic(s) are accounted for. The temperature versus the electrical bias for the magnetic junction is determined based on the temperature variation and the bias variation.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: May 21, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sebastian Schafer, Dmytro Apalkov, Alexey Vasilyevitch Khvalkovskiy, Vladimir Nikitin, Robert Beach, Zheng Duan
  • Publication number: 20190127977
    Abstract: The present disclosure relates to reinforcement devices, systems and methods for use in constructing new structures, including post frame structures. Specifically, the present disclosure relates to reinforcement devices, systems and methods for replacing traditional wood and/or precast concrete columns utilized in building a new construction foundation, with a height adjustable foundation column assembly constructed from a corrosion resistant material. The present disclosure also relates to reinforcement devices, systems and methods useful for reinforcing existing post frame structures, particularly those with framing elements requiring repair.
    Type: Application
    Filed: November 12, 2018
    Publication date: May 2, 2019
    Inventors: Philip J. Grussenmeyer, Steven Robert Beach
  • Patent number: 10274571
    Abstract: A method and apparatus determine an exchange stiffness of a free layer residing in a magnetic junction. The method includes performing spin torque ferromagnetic resonance (ST-FMR) measurements for the magnetic junction. The ST-FMR measurements indicate characteristic frequencies corresponding to spin wave modes in the free layer. The method also includes calculating the exchange stiffness of the free layer based upon the plurality of characteristic frequencies. In some embodiments, the magnetic junction resides on a wafer including other magnetic junctions for a device. The magnetic junctions may be arranged as a magnetic memory. The magnetic junction undergoing ST-FMR has a different aspect ratio than the magnetic junctions.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: April 30, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Robert Beach, Dmytro Apalkov, Volodymyr Voznyuk, Ilya Krivorotov, Chengcen Sha
  • Patent number: 10276226
    Abstract: A method for measuring a temperature of magnetic junction switchable using spin transfer. The magnetic junction includes at least one magnetic layer. The method includes measuring a temperature variation of at least one magnetic characteristic for the magnetic layer(s) versus temperature. The method also includes measuring a bias variation in the magnetic characteristic versus an electrical bias for the magnetic junction. This measurement is performed such that spin transfer torque-induced variation(s) in the magnetic characteristic(s) are accounted for. The temperature versus the electrical bias for the magnetic junction is determined based on the temperature variation and the bias variation.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: April 30, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sebastian Schafer, Dmytro Apalkov, Alexey Vasilyevitch Khvalkovskiy, Vladimir Nikitin, Robert Beach, Zheng Duan
  • Publication number: 20190119876
    Abstract: The present disclosure relates to reinforcement devices, systems and methods for use in constructing new structures, including post frame structures. Specifically, the present disclosure relates to reinforcement devices, systems and methods for replacing traditional wood and/or precast concrete columns utilized in building a new construction foundation, with a height adjustable foundation column assembly constructed from a corrosion resistant material. The present disclosure also relates to reinforcement devices, systems and methods useful for reinforcing existing post frame structures, particularly those with framing elements requiring repair.
    Type: Application
    Filed: November 27, 2018
    Publication date: April 25, 2019
    Inventors: Philip J. Grussenmeyer, Steven Robert Beach
  • Patent number: 10193056
    Abstract: A synthetic antiferromagnetic (SAF) structure for a spintronic device is disclosed and has an FL2/AF coupling/CoFeB configuration where FL2 is a ferromagnetic free layer with intrinsic PMA. In one embodiment, AF coupling is improved by inserting a Co dusting layer on top and bottom surfaces of a Ru AF coupling layer. The FL2 layer may be a L10 ordered alloy, a rare earth-transition metal alloy, or an (A1/A2)n laminate where A1 is one of Co, CoFe, or an alloy thereof, and A2 is one of Pt, Pd, Rh, Ru, Ir, Mg, Mo, Os, Si, V, Ni, NiCo, and NiFe, or A1 is Fe and A2 is V. A method is also provided for forming the SAF structure.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: January 29, 2019
    Assignee: Headway Technologies, Inc.
    Inventors: Robert Beach, Guenole Jan, Yu-Jen Wang, Ru-Ying Tong
  • Publication number: 20180366559
    Abstract: An enhancement-mode transistor gate structure which includes a spacer layer of GaN disposed above a barrier layer, a first layer of pGaN above the spacer layer, an etch stop layer of p-type Al-containing column III-V material, for example, pAlGaN or pAlInGaN, disposed above the first p-GaN layer, and a second p-GaN layer, having a greater thickness than the first p-GaN layer, disposed over the etch stop layer. The etch stop layer minimizes damage to the underlying barrier layer during gate etching steps, and improves GaN spacer thickness uniformity.
    Type: Application
    Filed: June 13, 2018
    Publication date: December 20, 2018
    Inventors: Jianjun Cao, Robert Beach, Guangyuan Zhao, Yoganand Saripalli, Zhikai Tang
  • Publication number: 20180294024
    Abstract: A method for measuring a temperature of magnetic junction switchable using spin transfer. The magnetic junction includes at least one magnetic layer. The method includes measuring a temperature variation of at least one magnetic characteristic for the magnetic layer(s) versus temperature. The method also includes measuring a bias variation in the magnetic characteristic versus an electrical bias for the magnetic junction. This measurement is performed such that spin transfer torque-induced variation(s) in the magnetic characteristic(s) are accounted for. The temperature versus the electrical bias for the magnetic junction is determined based on the temperature variation and the bias variation.
    Type: Application
    Filed: June 11, 2018
    Publication date: October 11, 2018
    Inventors: Sebastian Schafer, Dmytro Apalkov, Alexey Vasilyevitch Khvalkovskiy, Vladimir Nikitin, Robert Beach, Zheng Duan
  • Patent number: 10096702
    Abstract: A gallium nitride (GaN) transistor which includes two or more insulator semiconductor interface regions (insulators). A first insulator disposed between the gate and drain (near the gate) minimizes the gate leakage and fields near the gate that cause high gate-drain charge (Qgd). A second insulator (or multiple insulators), disposed between the first insulator and the drain, minimizes electric fields at the drain contact and provides a high density of charge in the channel for low on-resistance.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: October 9, 2018
    Assignee: Efficient Power Conversion Corporation
    Inventors: Robert Beach, Robert Strittmatter, Chunhua Zhou, Guangyuan Zhao, Jianjun Cao
  • Patent number: 10090274
    Abstract: A method and system for electrically connect a semiconductor device with a flip-chip form factor to a printed circuit board. An exemplary embodiment of the method comprises: aligning solder contacts on the device with a first copper contact and a second copper contact of the external circuitry, and, applying a supply current only directly to a buried layer of the first copper and not directly to the layer which is nearest the device, such that no current is sourced to the device through the layer nearest the device.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: October 2, 2018
    Assignee: Efficient Power Conversion Corporation
    Inventors: Robert Strittmatter, Seshadri Kolluri, Robert Beach, Jianjun Cao, Alana Nakata
  • Publication number: 20180205001
    Abstract: A method and apparatus determine an exchange stiffness of a free layer residing in a magnetic junction. The method includes performing spin torque ferromagnetic resonance (ST-FMR) measurements for the magnetic junction. The ST-FMR measurements indicate characteristic frequencies corresponding to spin wave modes in the free layer. The method also includes calculating the exchange stiffness of the free layer based upon the plurality of characteristic frequencies. In some embodiments, the magnetic junction resides on a wafer including other magnetic junctions for a device. The magnetic junctions may be arranged as a magnetic memory. The magnetic junction undergoing ST-FMR has a different aspect ratio than the magnetic junctions.
    Type: Application
    Filed: April 3, 2017
    Publication date: July 19, 2018
    Inventors: Robert Beach, Dmytro Apalkov, Volodymyr Voznyuk, Ilya Krivorotov, Chengcen Sha
  • Publication number: 20180087273
    Abstract: The present disclosure relates to reinforcement devices, systems and methods for use in constructing new structures, including post frame structures. Specifically, the present disclosure relates to reinforcement devices, systems and methods for replacing traditional wood and/or precast concrete columns utilized in building a new construction foundation, with a height adjustable foundation column assembly constructed from a corrosion resistant material. The present disclosure also relates to reinforcement devices, systems and methods useful for reinforcing existing post frame structures, particularly those with framing elements requiring repair.
    Type: Application
    Filed: September 29, 2017
    Publication date: March 29, 2018
    Inventors: Philip J. Grussenmeyer, Steven Robert Beach
  • Patent number: 9911600
    Abstract: A method for fabricating a III-nitride semiconductor body that includes high temperature and low temperature growth steps.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: March 6, 2018
    Assignee: INFINEON TECHNOLOGIES AMERICAS CORP.
    Inventors: Paul Bridger, Robert Beach
  • Publication number: 20170352754
    Abstract: A gallium nitride (GaN) transistor which includes two or more insulator semiconductor interface regions (insulators). A first insulator disposed between the gate and drain (near the gate) minimizes the gate leakage and fields near the gate that cause high gate-drain charge (Qgd). A second insulator (or multiple insulators), disposed between the first insulator and the drain, minimizes electric fields at the drain contact and provides a high density of charge in the channel for low on-resistance.
    Type: Application
    Filed: May 31, 2017
    Publication date: December 7, 2017
    Inventors: Robert Beach, Robert Strittmatter, Chunhua Zhou, Guangyuan Zhao, Jianjun Cao