Abstract: A III-nitride heterojunction semiconductor device having a III-nitride heterojunction that includes a discontinuous two-dimensional electron gas under a gate thereof.

Abstract: An enhancement-mode GaN transistor. The enhancement-mode GaN transistor includes a substrate, transition layers, a buffer layer comprised of a III Nitride material, a barrier layer comprised of a III Nitride material, drain and source contacts, a gate III-V compound containing acceptor type dopant elements, and a gate metal, where the gate III-V compound and the gate metal are formed with a single photo mask process to be self-aligned and the bottom of the gate metal and the top of the gate compound have the same dimension. The enhancement mode GaN transistor may also have a field plate made of Ohmic metal, where a drain Ohmic metal, a source Ohmic metal, and the field plate are formed by a single photo mask process.

Abstract: A III-nitride switch includes a recessed gate contact to produce a nominally off, or an enhancement mode, device. By providing a recessed gate contact, a conduction channel formed at the interface of two III-nitride materials is interrupted when the gate electrode is inactive to prevent current flow in the device. The gate electrode can be a schottky contact or an insulated metal contact. Two gate electrodes can be provided to form a bi-directional switch with nominally off characteristics. The recesses formed with the gate electrode can have sloped sides. The gate electrodes can be formed in a number of geometries in conjunction with current carrying electrodes of the device.

Abstract: A method of fabricating a III-nitride power semiconductor device that includes growing a transition layer over a substrate using at least two distinct and different growth methods.

Abstract: A synthetic antiferromagnetic (SAF) structure for a spintronic device is disclosed and has an AP2/antiferromagnetic (AF) coupling/CoFeB configuration. The SAF structure is thinned to reduce the fringing (Ho) field while maintaining high coercivity. The AP2 reference layer has intrinsic perpendicular magnetic anisotropy (PMA) and induces PMA in a thin CoFeB layer through AF coupling. In one embodiment, AF coupling is improved by inserting a Co dusting layer on top and bottom surfaces of a Ru AF coupling layer. When AP2 is (Co/Ni)4, and CoFeB thickness is 7.5 Angstroms, Ho is reduced to 125 Oe, Hc is 1000 Oe, and a balanced saturation magnetization-thickness product (Mst)=0.99 is achieved. The SAF structure may also be represented as FL2/AF coupling/CoFeB where FL2 is a ferromagnetic layer with intrinsic PMA.

Abstract: A self-aligned transistor gate structure that includes an ion-implanted portion of gate material surrounded by non-implanted gate material on each side. The gate structure may be formed, for example, by applying a layer of GaN material over an AlGaN barrier layer and implanting a portion of the GaN layer to create the gate structure that is laterally surrounded by the GaN layer.

Abstract: A III-nitride power semiconductor device that includes a plurality of III-nitride heterojunctions.

Abstract: Enhancement-mode GaN devices having a gate spacer, a gate metal material and a gate compound that are self-aligned, and a methods of forming the same. The materials are patterned and etched using a single photo mask, which reduces manufacturing costs. An interface of the gate spacer and the gate compound has lower leakage than the interface of a dielectric film and the gate compound, thereby reducing gate leakage. In addition, an ohmic contact metal layer is used as a field plate to relieve the electric field at a doped III-V gate compound corner towards the drain contact, which leads to lower gate leakage current and improved gate reliability.

Abstract: A method for fabrication of a III-nitride film over a silicon wafer that includes forming control joints to allow for overall stress relief in the III-nitride film during the growth thereof.

Abstract: A semiconductor device comprising a silicon substrate, a compound semiconductor material, an insulating material between the silicon substrate and the compound semiconductor material, and a top surface comprising means of electrical connection, and passivation material, where the passivation material is silicon nitride, silicon dioxide, or a combination of both. The present invention eliminates the need for a thick electrical insulator between a heat sink and the back surface of a surface mounted device by the inclusion of an AlN seed layer to electrically isolate the silicon substrate of the device. The sidewalls of the device are also electrically isolated from the active area of the device.

Abstract: A III-nitride power semiconductor device that includes a plurality of III-nitride heterojunctions.

Abstract: A method of fabricating a III-nitride power semiconductor device that includes growing a transition layer over a substrate using at least two distinct and different growth methods.

Abstract: A wireless local area network is provided with at least one cell controller and simplified RF ports which are configured to provide lower level media access control functions. Higher level media access control functions are provided in a cell controller, which may service one or more RF ports that are capable operating with at least two wireless local area subnetworks. Mobile units can also be configured with the higher level media access control functions being performed in a host processor.

Abstract: A III-nitride trench device has a vertical conduction region with an interrupted conduction channel when the device is not on, providing an enhancement mode device. The trench structure may be used in a vertical conduction or horizontal conduction device. A gate dielectric provides improved performance for the device by being capable of withstanding higher electric field or manipulating the charge in the conduction channel. A passivation of the III-nitride material decouples the dielectric from the device to permit lower dielectric constant materials to be used in high power applications.

Abstract: A wireless local area network is provided with simplified RF ports which are configured to provide lower level media access control functions. Higher level media access control functions and management functions are provided with a system having a cell controller, which may service one or more RF ports. Mobile units can also be configured with the higher level media access control functions being performed in a host processor.

Abstract: A STT-RAM MTJ is disclosed with a MgO tunnel barrier formed by natural oxidation and containing an oxygen surfactant layer to form a more uniform MgO layer and lower breakdown distribution percent. A CoFeB/NCC/CoFeB composite free layer with a middle nanocurrent channel layer minimizes Jc0 while enabling thermal stability, write voltage, read voltage, and Hc values that satisfy 64 Mb design requirements. The NCC layer has RM grains in an insulator matrix where R is Co, Fe, or Ni, and M is a metal such as Si or Al. NCC thickness is maintained around the minimum RM grain size to avoid RM granules not having sufficient diameter to bridge the distance between upper and lower CoFeB layers. A second NCC layer and third CoFeB layer may be included in the free layer or a second NCC layer may be inserted below the Ru capping layer.

Abstract: A wireless data communications system includes simplified access points which are connected to ports of an intelligent switching hub. The switching hub relays data packets to the access points in accordance with destination address data in the data communications. In a preferred arrangement the access points are provided with power over the data cable from the switching hub location.

Abstract: A III-nitride based field effect transistor obtains improved performance characteristics through manipulation of the relationship between the in-plane lattice constant of the interface of material layers. A high mobility two dimensional electron gas generated at the interface of the III-nitride materials permits high current conduction with low ON resistance, and is controllable through the manipulation of spontaneous polarization fields obtained according to the characteristics of the III-nitride material. The field effect transistor produced can be made to be a nominally on device where the in-plane lattice constants of the material forming the interface match. A nominally off device may be produced where one of the material layers has an in-plane lattice constant that is larger than that of the other layer material. The layer materials are preferably InAlGaN/GaN layers that are particularly tailored to the characteristics of the present invention.

Abstract: A synthetic antiferromagnetic (SAF) structure for a spintronic device is disclosed and has an AP2/antiferromagnetic (AF) coupling/CoFeB configuration. The SAF structure is thinned to reduce the fringing (Ho) field while maintaining high coercivity. The AP2 reference layer has intrinsic perpendicular magnetic anisotropy (PMA) and induces PMA in a thin CoFeB layer through AF coupling. In one embodiment, AF coupling is improved by inserting a Co dusting layer on top and bottom surfaces of a Ru AF coupling layer. When AP2 is (Co/Ni)4, and CoFeB thickness is 7.5 Angstroms, Ho is reduced to 125 Oe, Hc is 1000 Oe, and a balanced saturation magnetization-thickness product (Mst)=0.99 is achieved. The SAF structure may also be represented as FL2/AF coupling/CoFeB where FL2 is a ferromagnetic layer with intrinsic PMA.

Abstract: A method for fabrication of a III-nitride film over a silicon wafer that includes forming control joints to allow for overall stress relief in the III-nitride film during the growth thereof.