Abstract: A metalization layer formed as part of a bump connection/flip chip process for a semiconductor circuit is also used to form a sense resistor or other passive components. The metalization layers normal composition can also be altered so as to change or control the value of the so formed resistor or to improve the temperature stability of the resistor. Other passive components such as capacitors or inductor can also be formed in this layer.

Abstract: An integrated circuit with a secure memory location is comprised of a memory and a circuit which receives a twenty-four bit command word. At least one location in the memory stores at least one secure subkey. The circuit responds to the command word with an access to a secure memory location if and only if the command word specifies a starting address of a secure subkey and the command word is transmitted in both true and bit complimented form. Each subkey is made up of a 64-bit ID field, a 64-bit password field and a 384 bit secured data field.

Abstract: A battery charger with charging parameter values derived from communication with a battery pack to be charged. Communication is over a one-wire bus with battery pack transmissions in response to charger inquiries. The battery charger may be in the form an integrated circuit driving a power transistor or other controllable DC supply. A battery pack may contain a program with multiple charging currents and charging interval termination methods such as time, temperature rise, and incremental voltage polarity. A lack of communication may be invoke a default charging program or denial of access to the charger. The charger also communicates over a high-speed three-wire bus with an external computer for analysis of identification information acquired from the battery and for control of the charger.

Abstract: A secured metal token using a single wire communication system is employed to dispense units of value and to provide a secure storage device for controlling the dispensing of articles or service items. The metal token can be formed of two pieces with a simplified electronic circuit inside which can contain units of value for the dispensing of items using the memory within the metal token as a secure vault. The token uses a simple two wire (ground and combined clock/data) arrangment. As goods are purchased or services rendered the value of those good or services is deducted from a prestored amount within the token.

Abstract: A system architecture which provides efficient data communication, over a one-wire bus, with a portable data module which does not necessarily include any accurate time delay circuit whatsoever. The time delay circuit in the module can be extremely crude. An open-collector architecture is used, with electrical relations defined to absolutely minimize the drain on the portable module's battery. A protocol has been specified so that the module never sources current to the data line, of the one-wire bus but only sinks current. The protocol includes signals for read; write-zero; write-one; and reset. Each one-bit transaction is initiated by a falling edge of a voltage signal from the host. The time delay circuit in the module defines a delay, after which (in write mode) the module tests the data state of the data line. In read mode, after a falling edge of a voltage signal from the host the module does or does not turn on a pull-down transistor, depending on the value of the bit read.

Abstract: A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.

Abstract: A battery charger with charging parameter values derived from communication with a battery pack to be charged. Communication is over a one-wire bus with battery pack transmissions in response to charger inquiries. The battery charger may be in the form an integrated circuit driving a power transistor or other controllable DC supply. A battery pack may contain a program with multiple charging currents and charging interval termination methods such as time, temperature rise, and incremental voltage polarity. A lack of communication may be invoke a default charging program or denial of access to the charger. The charger also communicates over a high-speed three-wire bus with an external computer for analysis of identification information acquired from the battery and for control of the charger.

Abstract: A communication circuit is provided in which reads from a device are controlled by sensing a transition by a host communicating with a device. The device then accepts a one which holds the line high for a predetermined time period or accepts a zero when the line is held high for a different time period. The sending of data is accomplished in a symmetrical relationship by having the device after the host pulls the line high by either by allowing the line to remain high or forcing the line to ground within the requisite time periods. This allows the "slave" device to consume almost no power in either the read or the write modes.

Abstract: The present invention relates to mounting and adhesion systems and methods for compact electronic modules. More particularly, the present invention relates to an apparatus and technique for mounting an electronic module that is capable of communicating with an interface unit on a one-way-bus.

Abstract: A command protocol for a single wire bus for transmitting and receiving commands and data. The command protocol includes a serial command word which facilitates communication between a host circuit and a slave circuit. The serial command word is divided into portions which can be used to reset the slave circuit, request the slave circuit to identify itself, and to specify the type of data transfer that is to occur between the host circuit and the slave circuit.

Abstract: A system used to interface a network utilizing one wire and a one wire communication protocol with a network which utilizes at least three wires and a corresponding protocol. The system may include conversion circuitry which is electrically coupled to the one wire network as well as to the network utilizing at least three wires to convert signals received on one network using one protocol to the other network using another protocol. The networks utilizing at least three wires include serial digital networks and protocols as well as parallel networks and protocols.

Abstract: A single wire data bus is utilized by a bus master to communicate with and identify electronic devices also connected to the single wire data bus. Each of the electronic devices include a unique ID (identification), wherein the bus master, using a one-wire protocol, can identify all of the electronic devices connected to the single wire data bus.

Abstract: A battery charger with charging parameter values derived from communication with a battery pack to be charged. Communication is over a one-wire bus with battery pack transmissions in response to charger inquiries. The battery charger may be in the form an integrated circuit driving a power transistor or other controllable DC supply. A battery pack may contain a program with multiple charging currents and charging interval termination methods such as time, temperature rise, and incremental voltage polarity. A lack of communication may be invoke a default charging program or denial of access to the charger. The charger also communicates over a high-speed three-wire bus with an external computer for analysis of identification information acquired from the battery and for control of the charger.

Abstract: A power regulator for providing a fixed output voltage that is consistent with a reference voltage and independent of a varying power supply, includes a first input connected to a reference voltage generator; a second input adapted to be connected to a varying power supply; two outputs for connection to circuitry such as oscillators; a charge pump; and three transistors. The drain and gate of the first transistor are connected to the charge pump and the source is connected to the reference voltage generator; the gate of the first transistor is coupled to the gates of the second and third transistors; and the sources of the second and third transistors are coupled one of the two outputs.

Abstract: A temperature detector comprises temperature sensing circuitry calibration circuitry, and power regular circuitry. The temperature sensing circuitry has an output that varies with a temperature to create a temperature variation. The calibration circuitry is coupled to receive the output that varies with temperature to create a temperature variation. The calibration circuitry interprets the temperature variation and outputs a value that represents the temperature. The power supply regulator circuitry coordinates power to the temperature sensing circuitry. Alternate embodiments of the temperature detector comprise temperature sensing circuitry, calibration circuitry, and resolution enhancement circuitry. The temperature sensing circuitry has an output that varies with a temperature to create a temperature variation. The calibration circuitry is coupled to receive the output that varies with temperature to create a temperature variation.

Abstract: A system architecture which provides efficient data communication, over a one-wire bus, with a portable data module which does not necessarily include any accurate time delay circuit whatsoever. The time delay circuit in the module can be extremely crude. An open-collector architecture is used, with electrical relations defined to absolutely minimize the drain on the portable module's battery. A protocol has been specified so that the module never sources current to the data line of the one-wire bus, but only sinks current. The protocol includes signals for read; write-zero; write-one; and reset. Each one-bit transaction is initiated by a falling edge of a voltage signal from the host. The time delay circuit in the module defines a delay, after which (in write mode) the module test the data state of the data line. In read mode, after a falling edge of a voltage signal from the host the module does or does not turn on a pull-down transistor, depending on the value of the bit read.

Abstract: A serial-port memory is positioned in a substantially token-shaped body. The substantially token-shaped body has a perimeter and a flange extending from a portion of the perimeter. The serial-port memory comprises a serial port, a scratchpad memory coupled to the serial port, a second memory coupled to the scratchpad memory; and control logic coupled to the serial port and the scratchpad and second memories. The control logic transfers information from the scratchpad memory to the second memory as a block pursuant to a block transfer command received at the serial port.

Abstract: A low-power secure memory in which block move operations are performed without extensive write operations. A translation register holds a set of pointers which affect the address decoding. By changing the values in this special register, the logical addresses of the physical SRAM cell locations in the memory array (or arrays) to be changed without performing any write operations in the array. This avoids the charge consumption which would otherwise be required for charging and discharging bitlines as the memory cells are read and written to.The chip of the preferred embodiment includes a scratchpad memory as well as multiple secure memories (multiple "subkeys"). The Move Block command can transfer a block of data from the Scratch Pad directly into the corresponding block location within a secure subkey, or can replace the entire contents of a secure subkey partition (including the ID and Password fields) with the entire contents of the Scratch Pad.

Abstract: A battery charger with charging parameter values derived from communication with a battery pack to be charged. Communication is over a one-wire bus with battery pack transmissions in response to charger inquiries. The battery charger may be in the form an integrated circuit driving a power transistor or other controllable DC supply. A battery pack may contain a program with multiple charging currents and charging interval termination methods such as time, temperature rise, and incremental voltage polarity. A lack of communication may be invoke a default charging program or denial of access to the charger. The charger also communicates over a high-speed three-wire bus with an external computer for analysis of identification information acquired from the battery and for control of the charger.

Abstract: An electronic token has at least two conductive surfaces which form either in total or in part a crush resistant casing in which a semiconductor memory is placed. Coupled to the two conductive surfaces is a set of input logic which is used to detect whether or not the first conductive surface is coupled to a device in which a first voltage or a second voltage is present and in which data can be stored in the semiconductor memory accordingly. Output logic is also provided so as to selectively poll the first conductive surface of said casing towards the second voltage with the output logic being electronically coupled to the semiconductor memory so that data may be retrieved from the stored memory. The stored information may be used for controlling access to items, for example as a lock. It may further be used as an inventory control device, postage control device, currency device for the sale of goods.