Patents by Inventor Robert Greiner

Robert Greiner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240411078
    Abstract: This disclosure describes the fabrication of a polarizer, a diffraction grating and a meta surface via ion implantation. The polarizer comprises a plurality of non-conducting areas between a wire grid of conducting wires. The conducting wires may comprise nanowires or nanopillars. The wire grid may be a rectangular grid or a hexagonal grid.
    Type: Application
    Filed: March 18, 2024
    Publication date: December 12, 2024
    Inventors: Giovanni Barbarossa, Robert Chebi, Ramesh Sundaram, Jeremy Turcaud, Christoph Greiner
  • Patent number: 10635155
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: April 28, 2020
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 10613610
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 10534419
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: January 14, 2020
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 10153670
    Abstract: The invention relates to a rotor (10) for a reluctance machine (E), wherein the rotor (10) has a laminate stack (14) with layers (16), each of the layers having a plurality of flux-conducting portions (24) which are formed in each case by a magnetically conductive rotor lamination (18) and extend between two adjacent d-axes and transversely to a respective q-axis (30), wherein the flux-conducting portions (24) are separated from each other by in each case a flux barrier (22) which is filled with a casting compound. The aim of the invention is to additionally provide a permanent magnetic excitation in the rotor (10) without degrading the reluctance of the rotor. To this end, the invention provides that the casting compound comprises permanently magnetic particles (36) in one or more or each of the flux barriers (22).
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: December 11, 2018
    Assignee: Siemens Aktiengesellschaft
    Inventors: Klaus Büttner, Marco Cerny, Robert Greiner, Manfred Ochsenkühn, Matthias Warmuth
  • Patent number: 10095300
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: October 9, 2018
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Publication number: 20180232041
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Application
    Filed: April 12, 2018
    Publication date: August 16, 2018
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Publication number: 20180232039
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Application
    Filed: April 12, 2018
    Publication date: August 16, 2018
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Publication number: 20180232040
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Application
    Filed: April 12, 2018
    Publication date: August 16, 2018
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Publication number: 20180205273
    Abstract: The invention relates to a rotor (10) for a reluctance machine (E), wherein the rotor (10) has a laminate stack (14) with layers (16), each of the layers having a plurality of flux-conducting portions (24) which are formed in each case by a magnetically conductive rotor lamination (18) and extend between two adjacent d-axes and transversely to a respective q-axis (30), wherein the flux-conducting portions (24) are separated from each other by in each case a flux barrier (22) which is filled with a casting compound. The aim of the invention is to additionally provide a permanent magnetic excitation in the rotor (10) without degrading the reluctance of the rotor. To this end, the invention provides that the casting compound comprises permanently magnetic particles (36) in one or more or each of the flux barriers (22).
    Type: Application
    Filed: June 7, 2016
    Publication date: July 19, 2018
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: KLAUS BÜTTNER, MARCO CERNY, ROBERT GREINER, MANFRED OCHSENKÜHN, MATTHIAS WARMUTH
  • Publication number: 20180046241
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Application
    Filed: November 1, 2017
    Publication date: February 15, 2018
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 9841803
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 9645208
    Abstract: A material for use in a magnetic resonance system includes a carrier material and a doping material. The carrier material and the doping material are admixed in a specific proportion. A volume of the material smaller than 1 mm2 contains a substantially homogeneous intermixing of the carrier material and the doping material.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: May 9, 2017
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Stephan Biber, Yvonne Candidus, Hubertus Fischer, Robert Greiner, Thomas Kundner
  • Publication number: 20150286265
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Application
    Filed: April 17, 2015
    Publication date: October 8, 2015
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 9037885
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: May 19, 2015
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 9021279
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: April 28, 2015
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 8996899
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: March 31, 2015
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 8949635
    Abstract: Methods and apparatus to improve integrated circuit (IC) performance across a range of operating conditions and/or physical constraints are described. In one embodiment, an operating parameter of one or more of processor cores may be adjusted in response to a change in the activity level of processor cores (e.g., the number of active processor cores) and/or a comparison of one or more operating conditions and one or more corresponding threshold values. Other embodiments are also described.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: February 3, 2015
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Stephan Jourdan, Robert Greiner, Edward A. Burton, Anant S. Deval, Michael Cornaby, Jeremy Shrall, Ray Ramadorai
  • Patent number: 8856568
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: October 7, 2014
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Patent number: 8719600
    Abstract: The operating voltage of an integrated circuit (e.g., a processor) is changed in response to one or more conditions (e.g., a laptop computer is connected to an AC power source). Both the operating frequency and the operating voltage of the integrated circuit are changed. The voltage regulator providing the operating voltage to the integrated circuit is caused to transition between voltage levels using one or more intermediate steps. The integrated circuit continues to operate in the normal manner both at the new voltage and throughout the voltage transition.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: May 6, 2014
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Robert Greiner, Matthew M. Ma, Kevin Dai