Patents by Inventor Robert Haase

Robert Haase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070218615
    Abstract: A MOSgated trench device has a reduced on resistance by forming a less than about a 13 nm thick strained SiGe layer on the silicon surface of the trenches and forming a thin (30 nm or less) layer of epitaxially deposited silicon on the SiGe layer which epi layer is converted to a gate oxide layer. The conduction channel formed by the SiGe layer is permanently strained to increase its mobility particularly hole mobility.
    Type: Application
    Filed: May 17, 2007
    Publication date: September 20, 2007
    Inventors: David Jones, Robert Haase
  • Publication number: 20070152269
    Abstract: An integrated circuit that includes at least one vertical conduction DMOS device and other semiconductor devices.
    Type: Application
    Filed: January 5, 2006
    Publication date: July 5, 2007
    Inventor: Robert Haase
  • Publication number: 20060022263
    Abstract: A vertical conduction semiconductor die has a top surface which receives a semiconductor junction pattern and a top electrode and a bottom surface with a bottom electrode. The bottom surface has one or more reduced thickness areas therein formed by selective etching or laser abrasion or the like to reduce the vertical conduction path length beneath at least portions of the semiconductor junction pattern and the bottom electrode to reduce the device RDSON. Thickened die portions remain to strengthen the die or wafer against breakage during handling. The full wafer thickness may be reduced before the local reduced thickness portions are formed.
    Type: Application
    Filed: August 1, 2005
    Publication date: February 2, 2006
    Inventors: Robert Haase, David Jones
  • Publication number: 20050116217
    Abstract: A MOSgated trench device has a reduced on resistance by forming a less than about a 13 nm thick strained SiGe layer on the silicon surface of the trenches and forming a thin (30 nm or less) layer of epitaxially deposited silicon on the SiGe layer which epi layer is converted to a gate oxide layer. The conduction channel formed by the SiGe layer is permanently strained to increase its mobility particularly hole mobility.
    Type: Application
    Filed: August 4, 2004
    Publication date: June 2, 2005
    Inventors: David Jones, Robert Haase
  • Patent number: 4611811
    Abstract: An improved bingo display for use in manual or video electronic games. In the manual version, a bingo card contains permanently written numbers in the N-column and the third row. The remaining sixteen squares define four discrete groups of four squares each and there is a disk secured to and on top of each discrete group. The disks with unique symbols thereon can be rotated by a player so that the numbers or symbols thereon can be positioned in their traditional position or rotated during play so that the number or symbols on one square can be moved to another square and a bingo may be obtained. In the electronic embodiment, numbers in the N-column and third row through the free space are a first color at the start of the game. The remaining sixteen squares of groups of four are of a second color but are continuously changing color in a random pattern. After a predetermined period of time, certain of the sixteen squares take on the first color while others remain the same.
    Type: Grant
    Filed: March 22, 1984
    Date of Patent: September 16, 1986
    Inventor: Robert Haase