Patents by Inventor Robert J. Drost

Robert J. Drost has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10193637
    Abstract: A method for determining a network configuration for the delivery of entangled photons individually to a plurality of users, the network comprising a plurality of inputs, switches, and outputs operatively connected by optical fibers; the plurality of switches being switchable between two states; the method comprising: determining the minimum number of switches necessary to deliver entangled photon pairs from a predetermined number of sources to a predetermined number of users, minimizing the loss experienced by an entangled photon passing through the switches by minimizing the number of switches that any one photon passes through by selecting only nondominated switch configurations; determining the minimum number of equivalent network switch configurations and eliminating all but one of the equivalent network switch configurations; and selecting an optimum network configuration by which the plurality of inputs and the plurality of outputs are operatively interconnected using a minimum number of switches in
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: January 29, 2019
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Robert J. Drost, Michael Brodsky
  • Publication number: 20170207858
    Abstract: A method for determining a network configuration for the delivery of entangled photons individually to a plurality of users, the network comprising a plurality of inputs, switches, and outputs operatively connected by optical fibers; the plurality of switches being switchable between two states; the method comprising: determining the minimum number of switches necessary to deliver entangled photon pairs from a predetermined number of sources to a predetermined number of users, minimizing the loss experienced by an entangled photon passing through the switches by minimizing the number of switches that any one photon passes through by selecting only nondominated switch configurations; determining the minimum number of equivalent network switch configurations and eliminating all but one of the equivalent network switch configurations; and selecting an optimum network configuration by which the plurality of inputs and the plurality of outputs are operatively interconnected using a minimum number of switches in
    Type: Application
    Filed: January 19, 2016
    Publication date: July 20, 2017
    Inventors: Robert J. Drost, Michael Brodsky
  • Patent number: 9472498
    Abstract: A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: October 18, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Alex Chow, R. David Hopkins, II, Robert J. Drost
  • Patent number: 9002158
    Abstract: An optical connector is described. This optical connector spatially segregates optical coupling between an optical fiber and an optical component, which relaxes the associated mechanical-alignment requirements. In particular, the optical connector includes an optical spreader component disposed on a substrate. This optical spreader component is optically coupled to the optical fiber at a first coupling region, and is configured to optically couple to the optical component at a second coupling region that is at a different location on the substrate than the first coupling region. Moreover, the first coupling region and the second coupling region are optically coupled by an optical waveguide.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: April 7, 2015
    Assignee: Oracle International Corporation
    Inventors: Robert J. Drost, John E. Cunningham, Ashok V. Krishnamoorthy
  • Publication number: 20150069636
    Abstract: A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.
    Type: Application
    Filed: November 18, 2014
    Publication date: March 12, 2015
    Inventors: Alex Chow, R. David Hopkins, II, Robert J. Drost
  • Patent number: 8975752
    Abstract: A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: March 10, 2015
    Assignee: Oracle America, Inc.
    Inventors: Alex Chow, R. David Hopkins, Robert J. Drost
  • Patent number: 8918752
    Abstract: A semiconductor die is described. This semiconductor die includes a driver, and a spatial alignment transducer that is electrically coupled to the driver and which is proximate to a surface of the semiconductor die. The driver establishes a spatially varying electric charge distribution in at least one direction in the spatial alignment transducer, thereby facilitating determination of a spatial alignment in more than one direction between the semiconductor die and another semiconductor die. In particular, a spatial alignment sensor proximate to the surface of the other semiconductor die may detect an electrical field (or an associated electrostatic potential) associated with the spatially varying electric charge distribution. This detected electric field may allow the vertical spacing between the surfaces of the semiconductor dies and/or an angular alignment of the semiconductor dies to be determined.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: December 23, 2014
    Assignee: Oracle International Corporation
    Inventors: Alex Chow, Robert J. Drost, Ronald Ho, Robert D. Hopkins, Ivan E. Sutherland
  • Patent number: 8818271
    Abstract: Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: August 26, 2014
    Assignee: Oracle International Corporation
    Inventors: Justin M. Schauer, Robert David Hopkins, II, Robert J. Drost
  • Patent number: 8798530
    Abstract: A circuit that receives input signals from a transmitter via proximity communication, such as capacitively coupled proximity communication, is described. Because proximity communication may block DC content, the circuit may restore the DC content of input signals. In particular, a refresh circuit in the circuit may short inputs of the circuit to each other at least once per clock cycle (which sets a null value). Furthermore, a feedback circuit ensures that, if there is a signal transition in the input signals during a current clock cycle, it is passed through to an output node of the circuit. On the other hand, if there is no signal transition in the input signals during the current clock cycle, the feedback circuit may select the appropriate output value on the output node based on the output value during the immediately preceding clock cycle.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: August 5, 2014
    Assignee: Oracle America, Inc.
    Inventors: Alex Chow, Robert J. Drost, Robert David Hopkins
  • Patent number: 8735184
    Abstract: A device includes a semiconductor die having a surface, a plurality of proximity connectors proximate to the surface, and a circuit coupled to at least one of the plurality of proximity connectors. The semiconductor die is configured to communicate voltage-mode signals through capacitive coupling using one or more of the plurality of proximity connectors. The circuit also includes a filter with a capacitive-summing junction to equalize the signals.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: May 27, 2014
    Assignee: Oracle International Corporation
    Inventors: Ronald Ho, Robert D. Hopkins, William S. Coates, Robert J. Drost
  • Patent number: 8698322
    Abstract: A multi-chip module (MCM) is described in which at least two substrates are mechanically coupled by an adhesive layer that maintains alignment and a zero (or near zero) spacing between proximity connectors on surfaces of the substrates, thereby facilitating high signal quality during proximity communication between the substrates. In order to provide sufficient shear strength, the adhesive layer has a thickness that is larger than the spacing. This may be accomplished using one or more positive and/or negative features on the substrates. For example, the adhesive may be bonded to: one of the surfaces and an inner surface of a channel that is recessed below the other surface; inner surfaces of channels that are recessed below both of the surfaces; or both of the surfaces. In this last case, the zero (or near zero) spacing may be achieved by disposing proximity connectors on a mesa that protrudes above at least one of the substrate surfaces.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: April 15, 2014
    Assignee: Oracle International Corporation
    Inventors: Robert J. Drost, Ashok V. Krishnamoorthy, John E. Cunningham
  • Publication number: 20140099892
    Abstract: Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.
    Type: Application
    Filed: December 9, 2013
    Publication date: April 10, 2014
    Applicant: Oracle International Corporation
    Inventors: Justin M. Schauer, Robert David Hopkins, II, Robert J. Drost
  • Patent number: 8644759
    Abstract: Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: February 4, 2014
    Assignee: Oracle America, Inc.
    Inventors: Justin M. Schauer, Robert David Hopkins, Robert J. Drost
  • Publication number: 20130308903
    Abstract: An optical connector is described. This optical connector spatially segregates optical coupling between an optical fiber and an optical component, which relaxes the associated mechanical-alignment requirements. In particular, the optical connector includes an optical spreader component disposed on a substrate. This optical spreader component is optically coupled to the optical fiber at a first coupling region, and is configured to optically couple to the optical component at a second coupling region that is at a different location on the substrate than the first coupling region. Moreover, the first coupling region and the second coupling region are optically coupled by an optical waveguide.
    Type: Application
    Filed: July 8, 2013
    Publication date: November 21, 2013
    Applicant: Oracle International Corporation
    Inventors: Robert J. Drost, John E. Cunningham, Ashok V. Krishnamoorthy
  • Patent number: 8554025
    Abstract: An optical connector is described. This optical connector spatially segregates optical coupling between an optical fiber and an optical component, which relaxes the associated mechanical-alignment requirements. In particular, the optical connector includes an optical spreader component disposed on a substrate. This optical spreader component is optically coupled to the optical fiber at a first coupling region, and is configured to optically couple to the optical component at a second coupling region that is at a different location on the substrate than the first coupling region. Moreover, the first coupling region and the second coupling region are optically coupled by an optical waveguide.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: October 8, 2013
    Assignee: Oracle America, Inc.
    Inventors: Robert J. Drost, John E. Cunningham, Ashok V. Krishnamoorthy
  • Patent number: 8552779
    Abstract: The disclosed embodiments provide a synchronizer latch circuit that facilitates resolving metastability issues. This synchronizer latch circuit includes a set of lightly loaded, cross-coupled transistors that form a metastable resolving and state-holding element that is coupled to two outputs. An incoming synchronization signal creates a voltage difference between the two outputs, but does not directly force a state change for the outputs. Instead, the data and clock inputs control transistors that allow neighboring power sources and/or ground network connections to weakly influence the outputs. The cross-coupled transistors then amplify the resulting voltage difference to generate valid output voltages, even when the data input and clock signal are received at roughly the same time. Thus, the synchronizer latch circuit facilitates rapidly resolving metastability and improving synchronizer performance.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: October 8, 2013
    Assignee: Oracle International Corporation
    Inventors: Ian W. Jones, Suwen Yang, Mark R. Greenstreet, Hetal N. Gaywala, Robert J. Drost
  • Patent number: 8531042
    Abstract: A processing technique facilitating the fabrication of the integrated circuit with microsprings at different vertical positions relative to a surface of a substrate is described. During the fabrication technique, microsprings are lithographically defined on surfaces of a first substrate and a second substrate. Then, a hole is created through a first substrate. Moreover, the integrated circuit may be created by rigidly mechanically coupling the two substrates to each other such that the microsprings on the surface of the second substrate are within a region defined at least in part by an edge around the hole. Subsequently, photoresist that constrains the microsprings on the surfaces of the two substrates may be removed. In this way, microsprings at the different vertical positions can be fabricated.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: September 10, 2013
    Assignee: Oracle America, Inc.
    Inventors: Robert J. Drost, John E. Cunningham, Ashok V. Krishnamoorthy
  • Patent number: 8482072
    Abstract: A semiconductor die is described. This semiconductor die includes an electro-static discharge (ESD) device with a metal component coupled to an input-output (I/O) pad, and coupled to a ground voltage via a signal line. Moreover, adjacent edges of the metal component and the I/O pad are separated by a spacing that defines an ESD gap. When a field-emission or ionization current flows across the ESD gap, the metal component provides a discharge path to the ground voltage for transient ESD signals. Furthermore, the ESD gap is at least partially enclosed so that there is gas in the ESD gap.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: July 9, 2013
    Inventors: Robert J. Drost, Robert D. Hopkins, Alex Chow
  • Patent number: 8476749
    Abstract: A chip package is described. This chip package includes a stack of semiconductor dies or chips that are offset from each other, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, electrically couples to the exposed pads. For example, the ramp component may be electrically coupled to the semiconductor dies using: microsprings, an anisotropic film, and/or solder. Consequently, the electrical contacts may have a conductive, a capacitive or, in general, a complex impedance. Furthermore, the chips and/or the ramp component may be positioned relative to each other using a ball-and-pit alignment technique. By removing the need for costly and area-consuming through-silicon vias (TSVs) in the semiconductor dies, the chip package facilitates chips to be stacked in a manner that provides high bandwidth and low cost.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: July 2, 2013
    Assignee: Oracle America, Inc.
    Inventors: Robert J. Drost, James G. Mitchell, David C. Douglas
  • Patent number: 8472206
    Abstract: One embodiment of the present invention provides a method that reduces power consumption by using capacitive coupling to perform a majority detection operation. The method involves driving a plurality of signals onto a plurality of driven wires. The signals are then fed from each driven wire through a corresponding coupling capacitor to a single majority detection wire. In addition, method involves feeding a signal on the majority detection wire and a bias voltage to a differential receiver. The output of the differential receiver switches if the signal on the majority-detection wire switches relative to the bias voltage. The method further involves using the output of the differential receiver to optimize the signals from the plurality of driven wires for transmission across a long signal route. Optimizing the transmission of signals reduces the power consumed by a computer system.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: June 25, 2013
    Assignee: Oracle America, Inc.
    Inventors: Ronald Ho, Robert J. Drost, Robert Hopkins