Abstract: A multiport passive photonic light circuit chip has multiple waveguides written in at least two layers on a glass substrate. Some waveguides connect transmitting and receiving ports of an optical channel, some waveguides redirect a fraction of optical signals to some other receiving ports, and waveguides have circular cross-sectional shapes wherein a refractive index contrast is in the range of 0.2% to 2%.

Abstract: A method of generating an image is disclosed. A mask and descriptive text associated with a subject are received. The descriptive text comprises a text prompt. The mask is resized to fit within a predefined bounding box and the resized mask is centered on a background image. The centered mask is filled with noise. Output of an image of the subject on a solid background is received from a generative AI model in response to a passing of a request to the generative AI model. The request includes the noise-filled mask and the descriptive text.

Abstract: The present invention provides modular trays having cutout features that are configured to engage with a mounting feature of one or more removable rails. The removable rails may be removably secured to a tray body in a plurality of positions to allow a user to install or uninstall rails to support different sized fiber optic modules. For example, a tray may support a twenty-four optical fiber module, two twelve optical fiber modules, or three eight optical fiber modules. Fiber optic enclosures housing the trays can be affixed to the outside of a fiber optic enclosure and allow for easy stacking and unstacking.

Abstract: An integrated circuit includes a semiconductor substrate. The integrated circuit also includes a trench in the semiconductor substrate, the trench including a layer of a nanoparticle material. The integrated circuit further includes an interconnect region above the trench.

Abstract: An integrated circuit has a substrate that includes a semiconductor material, and an interconnect region disposed on the substrate. The integrated circuit includes a thermal routing trench in the substrate. The thermal routing trench includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal routing trench has a thermal conductivity higher than the semiconductor material contacting the thermal routing trench. The cohered nanoparticle film is formed by an additive process.

Abstract: Apparatuses having a plurality of optical duplex and parallel connector adapters, such as MPO connectors and LC adapters, where some adapters connect to network equipment in a network and others to servers or processing units such as GPUs, incorporate internal photonic circuit with a mesh. The light path of each transmitter and receivers is matched in order to provide proper optical connections from transmitting to receiving fibers, wherein complex arbitrary network topologies can be implemented.

Abstract: The present application is directed towards compounds, pharmaceutically acceptable salts or prodrugs thereof, which are inhibitors of Histone Deacetylase (HDAC) binding or function. The compounds especially may have some selectivity for inhibiting Class IIa versus Class I HDACs. The present application also relates to methods of using the compounds and to uses of the compounds, especially in relation to the prevention of a disease, disorder or condition associated with Class IIa HDAC activity. In one form, the compounds are (ortho-phenyl) phenyl hydroxamates. In another form, the compounds are as provided in Formula (I), wherein R1 is a phenyl or cycloalkenyl which may be optionally substituted.

Abstract: A module for connecting 16 fiber MPOs to 12 fiber MPOs has a first, second, and third 16 fiber MPO, each 16 fiber MPO having first, second, and third fiber receiving areas. The module also has a first, second, third, and fourth 12 fiber MPO, each 12 fiber MPO having a first and second fiber receiving areas. The first and third fiber receiving area of the first, second, and third 16 fiber MPO is connected to the second and first fiber receiving area of the first, second, and fourth 12 fiber MPO. The second fiber receiving area of each 16 fiber MPO is being connected to the third 12 fiber MPO.

Abstract: A multiport passive photonic light circuit chip has multiple waveguides written in at least two layers on a glass substrate. Some waveguides connect transmitting and receiving ports of an optical channel, some waveguides redirect a fraction of optical signals to some other receiving ports, and waveguides have circular cross-sectional shapes wherein a refractive index contrast is in the range of 0.2% to 2%.

Abstract: A cassette module has three 16 fiber MPOs and four 12 fiber MPOs wherein each 16 fiber MPO has 4 fiber receiving areas with four fibers going to each fiber receiving area and each 12 fiber MPO has 3 fiber receiving areas with four fibers going to each fiber receiving area. Fibers are routed from certain areas of the 16 fiber MPOs to those of the 12 fiber MPOs in order to convert a base 12 communication system to a base 16 communication system.

Abstract: A system and method are provided for simulating circuits that transmit bidirectional signals between some ports using simulators designed originally for electrical circuits and systems, that eliminate the need for different port interfaces. The system and method can be applied to simulate photonic circuits either standalone or integrated with electrical circuits and systems. In one method implemented by the system potential and flow representations, available for example in Verilog-A simulators, are used to create bidirectional signals on a single bus line to transmit optical signals. In another method implemented by the system, the system auto-configures each optical port type as left or right at runtime or during a pre-simulation initialization to allow for bidirectional signals with a single port interface.

Abstract: The present invention provides modular trays having cutout features that are configured to engage with a mounting feature of one or more removable rails. The removable rails may be removably secured to a tray body in a plurality of positions to allow a user to install or uninstall rails to support different sized fiber optic modules. For example, a tray may support a twenty-four optical fiber module, two twelve optical fiber modules, or three eight optical fiber modules. Fiber optic enclosures housing the trays can be affixed to the outside of a fiber optic enclosure and allow for easy stacking and unstacking.

Abstract: An integrated circuit has a substrate and an interconnect region disposed on the substrate. The interconnect region includes a plurality of interconnect levels. Each interconnect level includes interconnects in dielectric material. The integrated circuit includes a thermal via in the interconnect region. The thermal via extends vertically in at least one of the interconnect levels in the interconnect region. The thermal via includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal via has a thermal conductivity higher than dielectric material touching the thermal via. The cohered nanoparticle film is formed by a method which includes an additive process.

Abstract: The present invention provides modular trays having cutout features that are configured to engage with a mounting feature of one or more removable rails. The removable rails may be removably secured to a tray body in a plurality of positions to allow a user to install or uninstall rails to support different sized fiber optic modules. For example, a tray may support a twenty-four optical fiber module, two twelve optical fiber modules, or three eight optical fiber modules. Fiber optic enclosures housing the trays can be affixed to the outside of a fiber optic enclosure and allow for easy stacking and unstacking.

Abstract: A cassette module has three 16 fiber MPOs and four 12 fiber MPOs wherein each 16 fiber MPO has 4 fiber receiving areas with four fibers going to each fiber receiving area and each 12 fiber MPO has 3 fiber receiving areas with four fibers going to each fiber receiving area. Fibers are routed from certain areas of the 16 fiber MPOs to those of the 12 fiber MPOs in order to convert a base 12 communication system to a base 16 communication system.

Abstract: An integrated circuit has a substrate and an interconnect region disposed on the substrate. The interconnect region includes a plurality of interconnect levels. Each interconnect level includes interconnects in dielectric material. The integrated circuit includes a thermal via in the interconnect region. The thermal via extends vertically in at least one of the interconnect levels in the interconnect region. The thermal via includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal via has a thermal conductivity higher than dielectric material touching the thermal via. The cohered nanoparticle film is formed by a method which includes an additive process.

Abstract: A system and method are provided for simulating circuits that transmit bidirectional signals between some ports using simulators designed originally for electrical circuits and systems, that eliminate the need for different port interfaces. The system and method can be applied to simulate photonic circuits either standalone or integrated with electrical circuits and systems. In one method implemented by the system potential and flow representations, available for example in Verilog-A simulators, are used to create bidirectional signals on a single bus line to transmit optical signals. In another method implemented by the system, the system auto-configures each optical port type as left or right at runtime or during a pre-simulation initialization to allow for bidirectional signals with a single port interface.

Abstract: A cover for a car includes a cloth or clothlike cover base, a tinted aluminum coating disposed on an outer surface of the cloth or clothlike cover base; and one or more security flaps connected to an inner surface of the cloth or clothlike cover base at a position that enables the one or more security flaps to be inserted into one or more of the car's doors.