Patents by Inventor Robin Cheung
Robin Cheung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6893548Abstract: An apparatus and method is provided for analyzing or conditioning an electrochemical bath. One aspect of the invention provides a method for analyzing an electrochemical bath in an electrochemical deposition process including providing a first electrochemical bath having a first bath composition, utilizing the first electrochemical bath in an electrochemical deposition process to form a second electrochemical bath having a second bath composition and analyzing the first and second compositions to identify one or more constituents generated in the electrochemical deposition process. Additive material having a composition that is substantially the same as all or at least some of the one or more constituents generated in the electrochemical deposition process may be added to another electrochemical bath to produce a desired chemical composition.Type: GrantFiled: June 13, 2001Date of Patent: May 17, 2005Assignee: Applied Materials Inc.Inventors: Robin Cheung, Daniel A. Carl, Liang-Yuh Chen, Yezdi Dordi, Paul F. Smith, Ratson Morad, Peter Hey, Ashok Sinha
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Patent number: 6842659Abstract: A method and apparatus for performing intra-tool monitoring and control within a multi-step processing system. The method monitors the processing of a workpiece as the workpiece is processed by independently operating processing tools and produces control parameters for the various independently operating processing tools to optimize the processing of the workpiece. More specifically, the apparatus provides a metrology station located between each of a plurality of semiconductor wafer processing tools such that measurements can be made on wafers as they are passed from one tool to another providing intra tool monitoring. The data collected by the metrology station is coupled to a metrology data analyzer, which determines whether any of the plurality of wafer processing tools should be adjusted to improve the processing of the overall wafer.Type: GrantFiled: August 24, 2001Date of Patent: January 11, 2005Assignee: Applied Materials Inc.Inventors: Suketu Parikh, Robin Cheung
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Patent number: 6824666Abstract: An apparatus and a method of depositing a catalytic layer comprising at least one metal selected from the group consisting of noble metals, semi-noble metals, alloys thereof, and combinations thereof in sub-micron features formed on a substrate. Examples of noble metals include palladium and platinum. Examples of semi-noble metals include cobalt, nickel, and tungsten. The catalytic layer may be deposited by electroless deposition, electroplating, or chemical vapor deposition. In one embodiment, the catalytic layer may be deposited in the feature to act as a barrier layer to a subsequently deposited conductive material. In another embodiment, the catalytic layer may be deposited over a barrier layer. In yet another embodiment, the catalytic layer may be deposited over a seed layer deposited over the barrier layer to act as a “patch” of any discontinuities in the seed layer. Once the catalytic layer has been deposited, a conductive material, such as copper, may be deposited over the catalytic layer.Type: GrantFiled: January 28, 2002Date of Patent: November 30, 2004Assignee: Applied Materials, Inc.Inventors: Srinivas Gandikota, Chris R. McGuirk, Deenesh Padhi, Muhammad Atif Malik, Sivakami Ramanathan, Girish A. Dixit, Robin Cheung
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Patent number: 6818066Abstract: A system and method for treating a substrate by integrating the annealing of a metal-containing layer on a substrate as part of a chemical mechanical polishing process. In one embodiment, a system for treating a substrate generally includes an annealing station incorporated into a chemical mechanical polishing processing system that includes a deposition station utilized to form a metal-containing layer on the substrate.Type: GrantFiled: May 7, 2001Date of Patent: November 16, 2004Assignee: Applied Materials, Inc.Inventor: Robin Cheung
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Patent number: 6797620Abstract: A method and apparatus is provided for filling apertures formed in a substrate surface by depositing materials that selectively inhibit or limit the formation or growth of subsequent layers used to fill an aperture. In one aspect, a method is provided for processing a substrate including providing a substrate having a field and apertures formed therein, wherein the apertures each have a bottom and sidewalls, depositing a seed layer on the bottom and sidewalls of the apertures, depositing a growth-inhibiting layer on at least one of the field of the substrate or an upper portion of the sidewalls of the apertures, and depositing a conductive layer on the growth-inhibiting layer and the seed layer. Deposition of the growth-inhibiting layer improves fill of the aperture from the bottom of the aperture up to the field of the substrate.Type: GrantFiled: April 16, 2002Date of Patent: September 28, 2004Assignee: Applied Materials, Inc.Inventors: John S. Lewis, Srinivas Gandikota, Sivakami Ramanathan, Girish Dixit, Robin Cheung, Fusen Chen
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Publication number: 20040173464Abstract: A method and apparatus for performing intra-tool monitoring and control within a multi-step processing system. The method monitors the processing of a workpiece as the workpiece is processed by independently operating processing tools and produces control parameters for the various independently operating processing tools to optimize the processing of the workpiece. More specifically, the apparatus provides a metrology station located between each of a plurality of semiconductor wafer processing tools such that measurements can be made on wafers as they are passed from one tool to another providing intra tool monitoring. The data collected by the metrology station is coupled to a metrology data analyzer, which determines whether any of the plurality of wafer processing tools should be adjusted to improve the processing of the overall wafer.Type: ApplicationFiled: March 19, 2004Publication date: September 9, 2004Applicant: Applied Materials, Inc.Inventors: Suketu Parikh, Robin Cheung
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Publication number: 20040154185Abstract: A method and apparatus for heating and cooling a substrate are provided. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.Type: ApplicationFiled: November 4, 2003Publication date: August 12, 2004Applicant: APPLIED MATERIALS, INC.Inventors: Ratson Morad, Ho Seon Shin, Robin Cheung, Igor Kogan
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Patent number: 6753248Abstract: A method for processing a substrate. The method generally includes forming a copper interconnect in a sacrificial layer deposited on the substrate by patterning the sacrifical layer to form an interconnect and filling the interconnect with copper. The method additionally includes removing at least a portion of the sacrificial layer upon copper interconnect formation, depositing a barrier layer on the copper interconnect, and depositing a dielectric layer on the barrier layer.Type: GrantFiled: January 27, 2003Date of Patent: June 22, 2004Assignee: Applied Materials, Inc.Inventors: Michael Wood, Barry L. Chin, Paul F. Smith, Robin Cheung
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Patent number: 6740221Abstract: A method of forming a copper layer with increased electromigration resistance. A doped copper layer is formed by controlling the incorporation of a non-metallic dopant during copper electroplating.Type: GrantFiled: March 15, 2001Date of Patent: May 25, 2004Assignee: Applied Materials Inc.Inventors: Robin Cheung, Liang-Yuh Chen
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Publication number: 20040084301Abstract: The present invention provides an electro-chemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electro-chemical deposition system generally comprises a mainframe having a mainframe wafer transfer robot, a loading station disposed in connection with the mainframe, one or more processing cells disposed in connection with the mainframe, and an electrolyte supply fluidly connected to the one or more electrical processing cells. Preferably, the electro-chemical deposition system includes a spin-rinse-dry (SRD) station disposed between the loading station and the mainframe, a rapid thermal anneal chamber attached to the loading station, and a system controller for controlling the electro-chemical deposition process and the components of the electro-chemical deposition system.Type: ApplicationFiled: October 20, 2003Publication date: May 6, 2004Applicant: APPLIED MATERIALS, INC.Inventors: Yezdi Dordi, Donald J. Olgado, Ratson Morad, Peter Hey, Mark Denome, Michael Sugarman, Mark Lloyd, Anna Marie Lloyd, Joseph Stevens, Dan Marohl, Ho Seon Shin, Eugene Ravinovich, Robin Cheung, Ashok K. Sinha, Avi Tepman, Dan Carl, George Birkmaier
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Publication number: 20040079633Abstract: The present invention generally provides an electro-chemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs rules and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electro-chemical deposition system generally comprises a mainframe having a mainframe wafer transfer robot, a loading station disposed in connection with the mainframe, a rapid thermal anneal chamber disposed adjacent the loading station, one or more processing cells disposed in connection with the mainframe, and an electrolyte supply fluidly connected to the one or more electrical processing cells. One aspect of the invention provides a post electrochemical deposition treatment, such as a rapid thermal anneal treatment, for enhancing deposition results.Type: ApplicationFiled: October 15, 2003Publication date: April 29, 2004Applicant: APPLIED MATERIALS, INC.Inventors: Robin Cheung, Ashok Sinha, Avi Tepman, Dan Carl
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Publication number: 20040003873Abstract: A method and apparatus for annealing copper. The method comprises forming a copper layer by electroplating on a substrate in an integrated processing system and annealing the copper layer in a chamber inside the integrated processing system.Type: ApplicationFiled: June 30, 2003Publication date: January 8, 2004Applicant: Applied Materials, Inc.Inventors: B. Michelle Chen, Ho Seon Shin, Yezdi Dordi, Ratson Morad, Robin Cheung
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Patent number: 6658763Abstract: A method and apparatus for heating and cooling a substrate are provided. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.Type: GrantFiled: November 12, 2002Date of Patent: December 9, 2003Assignee: Applied Materials, Inc.Inventors: Ratson Morad, Ho Seon Shin, Robin Cheung, Igor Kogan
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Patent number: 6645550Abstract: A method of treating a substrate. The method comprises forming a metal-containing layer on at least a selected portion of the substrate during a substrate cleaning process.Type: GrantFiled: June 22, 2000Date of Patent: November 11, 2003Assignee: Applied Materials, Inc.Inventors: Robin Cheung, Yezdi Dordi, Jennifer Tseng
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Patent number: 6635157Abstract: The present invention provides an electro-chemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electro-chemical deposition system generally comprises a mainframe having a mainframe wafer transfer robot, a loading station disposed in connection with the mainframe, one or more processing cells disposed in connection with the mainframe, and an electrolyte supply fluidly connected to the one or more electrical processing cells. Preferably, the electro-chemical deposition system includes a spin-rinse-dry (SRD) station disposed between the loading station and the mainframe, a rapid thermal anneal chamber attached to the loading station, and a system controller for controlling the electro-chemical deposition process and the components of the electro-chemical deposition system.Type: GrantFiled: May 29, 2001Date of Patent: October 21, 2003Assignee: Applied Materials, Inc.Inventors: Yezdi Dordi, Donald J. Olgado, Ratson Morad, Peter Hey, Mark Denome, Michael Sugarman, Mark Lloyd, Joseph Stevens, Dan Marohl, Ho Seon Shin, Eugene Ravinovich, Robin Cheung, Ashok K. Sinha, Avi Tepman, Dan Carl, George Birkmaier
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Publication number: 20030194872Abstract: A method for forming a conductive feature on a substrate having a connection between the metal deposited in an interconnect opening and an underlying metal feature is presented. The underlying metal feature is etched and a barrier layer is deposited on the structure such that the metal deposited in the interconnect opening and the metal deposited in the metal feature are not isolated from each other by an intervening structure or layer.Type: ApplicationFiled: April 16, 2002Publication date: October 16, 2003Applicant: Applied Materials, Inc.Inventors: Suketu A. Parikh, Robin Cheung
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Publication number: 20030194850Abstract: A method and apparatus is provided for filling apertures formed in a substrate surface by depositing materials that selectively inhibit or limit the formation or growth of subsequent layers used to fill an aperture. In one aspect, a method is provided for processing a substrate including providing a substrate having a field and apertures formed therein, wherein the apertures each have a bottom and sidewalls, depositing a seed layer on the bottom and sidewalls of the apertures, depositing a growth-inhibiting layer on at least one of the field of the substrate or an upper portion of the sidewalls of the apertures, and depositing a conductive layer on the growth-inhibiting layer and the seed layer. Deposition of the growth-inhibiting layer improves fill of the aperture from the bottom of the aperture up to the field of the substrate.Type: ApplicationFiled: April 16, 2002Publication date: October 16, 2003Applicant: Applied Materials, Inc.Inventors: John S. Lewis, Srinivas Gandikota, Sivakami Ramanathan, Girish Dixit, Robin Cheung, Fusen Chen
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Publication number: 20030146102Abstract: Embodiments of the invention provide a method of plating a copper film on a substrate in an electrochemical plating apparatus. The method includes positioning a substrate in an electrolyte solution, applying a current between the substrate and an anode to generate a current density of between about 10 mA/cm2 and about 40 mA/cm2 on the substrate surface, rotating the, substrate at a rotational speed of between about 20 rpm and about 50 rpm, and plating a copper film having a sheet resistance of less than about 16.5×10−2 Ohms/cm2.Type: ApplicationFiled: February 5, 2003Publication date: August 7, 2003Applicant: Applied Materials, Inc.Inventors: Sivakami Ramanathan, Srinivas Gandikota, Deenesh Padhi, Chris McGuirk, Girish Dixit, Robin Cheung
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Publication number: 20030143837Abstract: An apparatus and a method of depositing a catalytic layer comprising at least one metal selected from the group consisting of noble metals, semi-noble metals, alloys thereof, and combinations thereof in sub-micron features formed on a substrate. Examples of noble metals include palladium and platinum. Examples of semi-noble metals include cobalt, nickel, and tungsten. The catalytic layer may be deposited by electroless deposition, electroplating, or chemical vapor deposition. In one embodiment, the catalytic layer may be deposited in the feature to act as a barrier layer to a subsequently deposited conductive material. In another embodiment, the catalytic layer may be deposited over a barrier layer. In yet another embodiment, the catalytic layer may be deposited over a seed layer deposited over the barrier layer to act as a “patch” of any discontinuities in the seed layer. Once the catalytic layer has been deposited, a conductive material, such as copper, may be deposited over the catalytic layer.Type: ApplicationFiled: January 28, 2002Publication date: July 31, 2003Applicant: APPLIED MATERIALS, INC.Inventors: Srinivas Gandikota, Chris R. McGuirk, Deenesh Padhi, Muhammad Atif Malik, Sivakami Ramanathan, Girish A. Dixit, Robin Cheung
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Publication number: 20030140988Abstract: An apparatus and a method of depositing a catalytic layer comprising at least one metal selected from the group consisting of noble metals, semi-noble metals, alloys thereof, and combinations thereof in sub-micron features formed on a substrate. Examples of noble metals include palladium and platinum. Examples of semi-noble metals include cobalt, nickel, and tungsten. The catalytic layer may be deposited by electroless deposition, electroplating, or chemical vapor deposition. In one embodiment, the catalytic layer may be deposited in the feature to act as a barrier layer to a subsequently deposited conductive material. In another embodiment, the catalytic layer may be deposited over a barrier layer. In yet another embodiment, the catalytic layer may be deposited over a seed layer deposited over the barrier layer to act as a “patch” of any discontinuities in the seed layer. Once the catalytic layer has been deposited, a conductive material, such as copper, may be deposited over the catalytic layer.Type: ApplicationFiled: January 28, 2002Publication date: July 31, 2003Applicant: APPLIED MATERIALS, INC.Inventors: Srinivas Gandikota, Chris R. McGuirk, Deenesh Padhi, Muhammad Atif Malik, Sivakami Ramanathan, Girish A. Dixit, Robin Cheung