Patents by Inventor Robin Cheung
Robin Cheung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030131495Abstract: A method and apparatus for heating and cooling a substrate are provided. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.Type: ApplicationFiled: November 12, 2002Publication date: July 17, 2003Inventors: Ratson Morad, Ho Seon Shin, Robin Cheung, Igor Kogan
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Patent number: 6572010Abstract: An integrated solder bump deposition method and apparatus that enables solder bumps to be lithographically formed on a substrate. The apparatus comprises a plurality of electrolyte cells, and etch/clean/passthrough station and a reflow chamber.Type: GrantFiled: June 12, 2001Date of Patent: June 3, 2003Assignee: Applied Materials Inc.Inventors: Yezdi N. Dordi, Robin Cheung
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Publication number: 20030040830Abstract: A method and apparatus for performing intra-tool monitoring and control within a multi-step processing system. The method monitors the processing of a workpiece as the workpiece is processed by independently operating processing tools and produces control parameters for the various independently operating processing tools to optimize the processing of the workpiece. More specifically, the apparatus provides a metrology station located between each of a plurality of semiconductor wafer processing tools such that measurements can be made on wafers as they are passed from one tool to another providing intra tool monitoring. The data collected by the metrology station is coupled to a metrology data analyzer, which determines whether any of the plurality of wafer processing tools should be adjusted to improve the processing of the overall wafer.Type: ApplicationFiled: August 24, 2001Publication date: February 27, 2003Inventors: Suketu Parikh, Robin Cheung
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Publication number: 20030000844Abstract: One aspect of the invention provides a consistent metal electroplating technique to form void-less metal interconnects in sub-micron high aspect ratio features on semiconductor substrates. One embodiment of the invention provides a method for filling sub-micron features on a substrate, comprising reactive precleaning the substrate, depositing a barrier layer on the substrate using high density plasma physical vapor deposition; depositing a seed layer over the barrier layer using high density plasma physical vapor deposition; and electro-chemically depositing a metal using a highly resistive electrolyte and applying a first current density during a first deposition period followed by a second current density during a second period.Type: ApplicationFiled: June 26, 2002Publication date: January 2, 2003Applicant: Applied Materials, Inc.Inventors: Daniel A. Carl, Barry Chin, Liang Chen, Robin Cheung, Peijun Ding, Yezdi Dordi, Imran Hashim, Peter Hey, Ashok K. Sinha
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Publication number: 20020185523Abstract: An integrated solder bump deposition method and apparatus that enables solder bumps to be lithographically formed on a substrate. The apparatus comprises a plurality of electrolyte cells, and etch/clean/passthrough station and a reflow chamber.Type: ApplicationFiled: June 12, 2001Publication date: December 12, 2002Applicant: Applied Materials, Inc.Inventors: Yezdi N. Dordi, Robin Cheung
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Patent number: 6477787Abstract: A method and apparatus for heating and cooling a substrate are provided. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.Type: GrantFiled: February 11, 2002Date of Patent: November 12, 2002Assignee: Applied Materials, Inc.Inventors: Ratson Morad, Ho Seon Shin, Robin Cheung, Igor Kogan
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Publication number: 20020130046Abstract: A method of forming a copper layer with increased electromigration resistance. A doped copper layer is formed by controlling the incorporation of a non-metallic dopant during copper electroplating.Type: ApplicationFiled: March 15, 2001Publication date: September 19, 2002Applicant: Applied Materials, Inc.Inventors: Robin Cheung, Liang-Yuh Chen
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Publication number: 20020116836Abstract: A method and apparatus for heating and cooling a substrate are provided. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.Type: ApplicationFiled: February 11, 2002Publication date: August 29, 2002Inventors: Ratson Morad, Ho Seon Shin, Robin Cheung, Igor Kogan
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Patent number: 6436267Abstract: One aspect of the invention provides a consistent metal electroplating technique to form void-less metal interconnects in sub-micron high aspect ratio features on semiconductor substrates. One embodiment of the invention provides a method for filling sub-micron features on a substrate, comprising reactive precleaning the substrate, depositing a barrier layer on the substrate using high density plasma physical vapor deposition; depositing a seed layer over the barrier layer using high density plasma physical vapor deposition; and electro-chemically depositing a metal using a highly resistive electrolyte and applying a first current density during a first deposition period followed by a second current density during a second period.Type: GrantFiled: August 29, 2000Date of Patent: August 20, 2002Assignee: Applied Materials, Inc.Inventors: Daniel A. Carl, Barry Chin, Liang Chen, Robin Cheung, Peijun Ding, Yezdi Dordi, Imran Hashim, Peter Hey, Ashok K. Sinha
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Patent number: 6400030Abstract: An integrated circuit having semiconductor devices is connected by a first conductive channel damascened into a first oxide layer above the devices. A stop nitride layer, a via oxide layer, a via nitride layer, and a via resist are sequentially deposited on the first channel and the first oxide layer. The via resist is photolithographically developed with rectangular cross-section vias greater than the width of the channels and the via nitride layer is etched to the rectangular cross-section. A second channel oxide layer and a second channel resist are sequentially deposited on the via nitride layer and the exposed via oxide layer. The second channel resist is photolithographically developed with the second channels and an anisotropic oxide etch etches the second channels and rectangular box vias down to the stop nitride layer.Type: GrantFiled: May 30, 2000Date of Patent: June 4, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Fei Wang, Robin Cheung, Mark S. Chang, Richard J. Huang, Angela T. Hui
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Publication number: 20020033340Abstract: An apparatus and method is provided for analyzing or conditioning an electrochemical bath. One aspect of the invention provides a method for analyzing an electrochemical bath in an electrochemical deposition process including providing a first electrochemical bath having a first bath composition, utilizing the first electrochemical bath in an electrochemical deposition process to form a second electrochemical bath having a second bath composition and analyzing the first and second compositions to identify one or more constituents generated in the electrochemical deposition process. Additive material having a composition that is substantially the same as all or at least some of the one or more constituents generated in the electrochemical deposition process may be added to another electrochemical bath to produce a desired chemical composition.Type: ApplicationFiled: June 13, 2001Publication date: March 21, 2002Inventors: Robin Cheung, Daniel A. Carl, Liang-Yuh Chen, Yezdi Dordi, Paul F. Smith, Ratson Morad, Peter Hey, Ashok Sinha
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Patent number: 6357143Abstract: A method and apparatus for heating and cooling a substrate. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.Type: GrantFiled: July 20, 2001Date of Patent: March 19, 2002Assignee: Applied Materials, Inc.Inventors: Ratson Morad, Ho Seon Shin, Robin Cheung, Igor Kogan
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Publication number: 20020029961Abstract: The present invention provides an electrochemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electrochemical deposition system generally comprises a mainframe having a mainframe wafer transfer robot, a loading station disposed in connection with the mainframe, one or more processing cells disposed in connection with the mainframe, and an electrolyte supply fluidly connected to the one or more electrical processing cells. Preferably, the electrochemical deposition system includes a spin-rinse-dry (SRD) station disposed between the loading station and the mainframe, a rapid thermal anneal chamber attached to the loading station, and a system controller for controlling the electrochemical deposition process and the components of the electrochemical deposition system.Type: ApplicationFiled: May 29, 2001Publication date: March 14, 2002Applicant: Applied Materials, Inc.Inventors: Yezdi Dordi, Donald J. Olgado, Ratson Morad, Peter Hey, Mark Denome, Michael Sugarman, Mark Lloyd, Anna Marie Lloyd, Joseph Stevens, Dan Marohl, Ho Seon Shin, Eugene Ravinovich, Robin Cheung, Ashok K. Sinha, Avi Tepman, Dan Carl, George Birkmaier
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Publication number: 20020007567Abstract: A method and apparatus for heating and cooling a substrate are provided. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.Type: ApplicationFiled: July 20, 2001Publication date: January 24, 2002Inventors: Raston Morad, Ho Seon Shin, Robin Cheung, Igor Kogan
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Publication number: 20010055934Abstract: A system and method for treating a substrate by integrating the ling of a metal-containing layer on a substrate as part of a chemical mechanical polishing process. In one embodiment, a system for treating a substrate generally includes an annealing station incorporated into a chemical mechanical polishing processing system that includes a deposition station utilized to form a metal-containing layer on the substrate.Type: ApplicationFiled: May 7, 2001Publication date: December 27, 2001Applicant: Applied Materials, Inc.Inventor: Robin Cheung
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Patent number: 6319616Abstract: A method of forming a conductive line structure is provided. An adhesion layer is formed on a substrate surface. A seed layer is formed on the adhesion layer. A conductor is formed on the seed layer to form a partially complete structure. The partially complete structure is exposed to an electrolyte and undergoes an anodization process. At least a portion of the seed layer and a portion of the conductor are transformed to seed layer metal oxide and conductor metal oxide, respectively. At least a portion of the adhesion layer is transformed to an adhesion layer metal oxide and a further portion of the conductor is transformed to the conductor metal oxide.Type: GrantFiled: October 29, 1999Date of Patent: November 20, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Sergey Lopatin, Robin Cheung
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Patent number: 6276072Abstract: A method and apparatus for heating and cooling a substrate are provided. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism. The heating mechanism preferably comprises a heated substrate support adapted to support a substrate and to heat the supported substrate to a predetermined temperature, and the cooling mechanism preferably comprises a cooling plate. The transfer mechanism may comprise, for example, a wafer lift hoop having a plurality of fingers adapted to support a substrate, or a plurality of wafer lift pins. A dry gas source may be coupled to the chamber and adapted to supply a dry gas thereto.Type: GrantFiled: September 15, 1999Date of Patent: August 21, 2001Assignee: Applied Materials, Inc.Inventors: Ratson Morad, Ho Seon Shin, Robin Cheung, Igor Kogan
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Patent number: 6258223Abstract: The present invention discloses a system that provides for electroless deposition performed in-situ with an electroplating process to minimize oxidation and other contaminants prior to the electroplating process. The system allows the substrate to be transferred from the electroless deposition process to the electroplating process with a protective coating to also minimize oxidation. The system generally includes a mainframe having a mainframe substrate transfer robot, a loading station disposed in connection with the mainframe, one or more processing facilities disposed in connection with the mainframe, an electroless supply fluidly connected to the one or more processing applicators and optionally includes a spin-rinse-dry (SRD) station, a rapid thermal anneal chamber and a system controller for controlling the deposition processes and the components of the electro-chemical deposition system.Type: GrantFiled: July 9, 1999Date of Patent: July 10, 2001Assignee: Applied Materials, Inc.Inventors: Robin Cheung, Daniel A. Carl, Yezdi Dordi, Peter Hey, Ratson Morad, Liang-Yuh Chen, Paul F. Smith, Ashok K. Sinha
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Patent number: 6258220Abstract: The present invention provides an electro-chemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electro-chemical deposition system generally comprises a mainframe having a mainframe wafer transfer robot, a loading station disposed in connection with the mainframe, one or more processing cells disposed in connection with the mainframe, and an electrolyte supply fluidly connected to the one or more electrical processing cells. Preferably, the electro-chemical deposition system includes a spin-rinse-dry (SRD) station disposed between the loading station and the mainframe, a rapid thermal anneal chamber attached to the loading station, and a system controller for controlling the electro-chemical deposition process and the components of the electro-chemical deposition system.Type: GrantFiled: April 8, 1999Date of Patent: July 10, 2001Assignee: Applied Materials, Inc.Inventors: Yezdi Dordi, Donald J. Olgado, Ratson Morad, Peter Hey, Mark Denome, Michael Sugarman, Mark Lloyd, Joseph Stevens, Dan Marohl, Ho Seon Shin, Eugene Ravinovich, Robin Cheung, Ashok K. Sinha, Avi Tepman, Dan Carl, George Birkmaier
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Patent number: 6245670Abstract: A method for effectively filling a dual damascene opening having a via hole and a trench that are contiguous openings uses a two step deposition process. The method includes a step of filling the via hole by electroless deposition of a first conductive material into the via hole. A second conductive material is at a bottom wall of the via hole, and the second conductive material at the bottom wall of the via hole acts as an autocatalytic surface during the electroless deposition of the first conductive material within the via hole. The method also includes the step of depositing a seed layer of a third conductive material to cover walls of the trench and includes the step of filling the trench by electroplating deposition of the third conductive material from the seed layer into the trench. The present invention may be used to particular advantage for small geometry integrated circuits when the conductive material filling the via hole and the trench is copper.Type: GrantFiled: February 19, 1999Date of Patent: June 12, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Robin Cheung, Sergey Lopatin