Abstract: An integrated circuit includes a support, at least three metal layers above the support, the metal layers having a top metal layer with a top plate and a bottom metal layer with a bottom plate, dielectric material between the top and bottom plates to form a capacitor, and plural oxide layers above the support, such oxide layers including a top oxide layer, each oxide layer respectively covering a corresponding metal layer. The top oxide layer covers the top metal layer and has an opening exposing at least part of the top plate. A method of forming the integrated circuit by providing a support with metal and oxide layers, including a bottom plate, forming a cavity exposing the bottom plate, filling the cavity with dielectric, applying a further metal layer having a top plate and a further oxide layer, and forming an opening to expose the top plate.

Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate. The integrated circuit also includes a relative humidity sensor on the substrate. The relative humidity sensor includes a first sensor electrode, a second sensor electrode, and a humidity sensitive layer covering the first and second electrodes. The integrated circuit further includes a thermal conductivity based gas sensor on the substrate. The thermal conductivity based gas sensor has an electrically resistive sensor element located above the humidity sensitive layer.

Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate. The integrated circuit also includes an electrical impedance based gas sensor located on the substrate. The sensor includes first and second electrically conductive sensor electrodes. Each sensor electrode is enclosed in an electrically conductive corrosion protection material. The sensor also includes a gas sensitive material located between the sensor electrodes. The impedance of the gas sensitive material is sensitive to a gas to be sensed.

Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate having a major surface. The integrated circuit also includes a thermal conductivity based gas sensor having an electrically resistive sensor element located on the major surface for exposure to a gas to be sensed. The integrated circuit further includes a barrier located on the major surface for inhibiting a flow of the gas across the sensor element.

Abstract: An integrated circuit package for an integrated circuit having one or more sensor elements in a sensor element area of the circuit. An encapsulation covers bond wires but leaves an opening over the sensor element area. A protection layer is provided over the integrated circuit over which the encapsulation extends, and it has a channel around the sensor element area to act as a trap for any encapsulation material which has crept into the opening area.

Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying a plurality of circuit elements; a metallization stack (12, 14, 16) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion (20) and a second metal portion (21); a passivation stack (24, 26, 28) covering the metallization stack; a gas sensor including a sensing material portion (32, 74) on the passivation stack; a first conductive portion (38) extending through the passivation stack connecting a first region of the sensing material portion to the first metal portion; and a second conductive portion (40) extending through the passivation stack connecting a second region of the sensing material portion to the second metal portion. A method of manufacturing such an IC is also disclosed.

Abstract: The present invention relates to a method for fabrication of in-laid metal interconnects. The method comprises the steps of providing a substrate with a dielectric material on top thereof, depositing a protection layer on top of the dielectric material, depositing a sacrificial layer on top of the protection layer, the sacrificial layer having a mechanical strength that is lower than the mechanical strength of the protection layer, making an opening) through the sacrificial layer, through the protection layer and into the dielectric material, depositing a barrier layer in the opening and on the sacrificial layer, depositing metal material on the barrier layer, the metal material filling the opening, removing portions of the metal material existing beyond the opening by means of polishing, and removing the barrier layer and the sacrificial layer in one polishing step.

Abstract: Disclosed is an integrated circuit (IC) comprising a substrate (10) carrying a plurality of circuit elements; a metallization stack (12, 14, 16) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising at least one sensor electrode portion (20) and a bond pad portion (22), at least the at least one sensor electrode portion of said patterned upper metallization layer being covered by a moisture barrier film (23); a passivation stack (24, 26, 28) covering the metallization stack, said passivation stack comprising a first trench (32) exposing the at least one sensor electrode portion and a second trench (34) exposing the bond pad portion; said first trench being filled with a sensor active material (36). A method of manufacturing such an IC is also disclosed.

Abstract: A micro-device with a cavity, the micro-device including a substrate. A method of forming the micro-device includes the steps of: A) providing the substrate having a surface and comprising a sacrificial oxide region at the surface; B) covering the sacrificial oxide region with a porous layer being permeable to a vapor HF etchant; and C) selectively etching the sacrificial oxide region through the porous layer using the vapor HF etchant to obtain the cavity. This method may be used in the manufacture of various micro-devices with a cavity , i.e. MEMS devices, and in particular in the encapsulation part thereof, and semiconductor devices, and in particular the BEOL-part thereof.

Abstract: A sensor (2) for sensing a first substance and a second substance, the sensor comprising first (3) and second (5) sensor components each comprising a first material (20), the first material being sensitive to both the first substance and the second substance, the sensor further comprising a barrier (18) for preventing the second substance from passing into the second sensor component (5).

Abstract: A sensor for sensing an analyte includes capacitive elements, each having a pair of electrodes separated by a dielectric wherein the dielectric constant of the dielectric of at least one of the capacitive elements is sensitive to the analyte, the sensor further including a comparator adapted to compare a selected set of capacitive elements against a reference signal and to generate a comparison result signal, and a controller for iteratively selecting the set in response to the comparison result signal, wherein the sensor is arranged to produce a digitized output signal indicative of the sensed level of the analyte of interest. An IC comprising such a sensor, an electronic device comprising such an IC and a method of determining a level of an analyte of interest using such a sensor are also disclosed.

Abstract: Disclosed is a liquid immersion sensor comprising a substrate (10) carrying a conductive sensing element (20) and a corrosive agent (30) for corroding the conductive sensing element, said corrosive agent being immobilized in the vicinity of the conductive sensing element and being soluble in said liquid.

Abstract: A method of packaging a micro electromechanical structure is disclosed. The method comprises the steps of forming the structure on a substrate, depositing a sacrificial layer over the structure, patterning the sacrificial layer, depositing a porous layer over the patterned sacrificial layer, removing the patterned sacrificial layer through the porous layer, treating the porous layer with a plasma and depositing a capping layer over the plasma-treated porous layer. The plasma treatment step ensures that the capping layer material cannot enter the cavity formed by the removal of the sacrificial layer through the porous layer. A device formed by this method is also disclosed.

Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying a plurality of circuit elements; a metallization stack (12, 14, 16) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion (20); a passivation stack (24, 26, 28) covering the metallization stack; and a sensor including a sensing material (40) on the passivation stack, said sensor being coupled to the first metal portion by a via (34) extending through the passivation stack. A method of manufacturing such an IC is also disclosed.

Abstract: Disclosed is an integrated circuit comprising an electrode arrangement for detecting the presence of a liquid, said electrode arrangement comprising a first electrode and a second electrode, wherein, prior to exposure of the electrode arrangement to said liquid, a surface of at least one of the first electrode and second electrode is at least partially covered by a compound that is soluble in the liquid; the electrical properties of the electrode arrangement being dependent on the amount of the compound covering said surface. An package and electronic device comprising such an IC and a method of manufacturing such an IC are also disclosed.

Abstract: A container for containing a perishable substance has a container wall with an inner side and an outer side. The wall has an electrically conductive layer extending between the inner side and the outer side. The inner side faces the space containing the substance. The container comprises electronic circuitry having a sensor for sensing a physical property or condition of the substance, and an antenna for communicating an RF signal to a receiver, external to the container. The RF signal is indicative of the physical property or condition sensed. The sensor is positioned so as to be exposed to the space containing the substance in operational use of the container. The antenna is positioned at the outer side, or between the outer side and the electrically conductive layer, and is electrically isolated from the electrically conductive layer.

Abstract: A biocompatible electrode is manufactured by depositing filling metal 36 and etching back the filling metal to the surface of the surrounding insulator 30. Then, a further etch forms a recess 38 at the top of the via 32. An electrode metal 40 is then deposited and etched back to fill the recess 38 and form biocompatible electrode 42. In this way, a planar biocompatible electrode is achieved. The step of etching to form the recess may be carried out in the same CMP tool as is used to etch back the filling metal 36. A hydrogen peroxide etch may be used.

Abstract: A capacitive sensor for detecting the presence of a substance includes a plurality of upstanding conductive pillars arranged within a first layer of the sensor, a first electrode connected to a first group of the pillars, a second electrode connected to a second, different group of the pillars, and a dielectric material arranged adjacent the pillars, for altering the capacitance of the sensor in response to the presence of said substance.

Abstract: A damascene process is described using a copper fill process to fill a trench (12). The copper fill (20) is started with a deposited seed layer which includes (5) copper and titanium. Some titanium migrates to the surface during the copper fill process. The structure is annealed in a nitrogen atmosphere which creates a self-aligned TiN barrier (24) at the surface of the copper fill (20). Air gaps (26) may be created in the same annealing process. The process may be used to form a multilayer structure.

Abstract: The present invention relates to a method for fabrication of in-laid metal interconnects. The method comprises the steps of providing a substrate with a dielectric material (1) on top thereof, depositing a protection layer (2) on top of the dielectric material, depositing a sacrificial layer (7) on top of the protection layer, the sacrificial layer having a mechanical strength that is lower than the mechanical strength of the protection layer, making an opening (3) through the sacrificial layer, through the protection layer and into the dielectric material, depositing a barrier layer (4) in the opening and on the sacrificial layer, depositing metal material (5) on the barrier layer, the metal material filling the opening, removing portions of the metal material existing beyond the opening by means of polishing, and removing the barrier layer and the sacrificial layer in one polishing step.