Patents by Inventor Roland Rupp

Roland Rupp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Silicon Carbide Components and Methods for Producing Silicon Carbide Components
    Publication number: 20190067425
    Abstract: A method for producing a silicon carbide component includes forming a silicon carbide layer on an initial wafer, forming a doping region of the silicon carbide component to be produced in the silicon carbide layer, and forming an electrically conductive contact structure of the silicon carbide component to be produced on a surface of the silicon carbide layer. The electrically conductive contact structure electrically contacts the doping region. Furthermore, the method includes splitting the silicon carbide layer or the initial wafer after forming the electrically conductive contact structure, such that a silicon carbide substrate at least of the silicon carbide component to be produced is split off.
    Type: Application
    Filed: August 24, 2018
    Publication date: February 28, 2019
    Inventors: Roland Rupp, Ronny Kern
  • Method of manufacturing a silicon carbide semiconductor device by removing amorphized portions
    Patent number: 10217636
    Abstract: A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: February 26, 2019
    Assignee: Infineon Technologies AG
    Inventors: Thomas Aichinger, Victorina Poenariu, Wolfgang Bergner, Romain Esteve, Daniel Kueck, Dethard Peters, Gerald Reinwald, Roland Rupp, Gerald Unegg
  • Semiconductor device with diode region and trench gate structure
    Patent number: 10211306
    Abstract: A semiconductor device includes a semiconductor body formed from a semiconductor material with a band-gap of at least 2.0 eV, the semiconductor body having a diode region and a source region. The semiconductor device further includes a trench gate structure having a first sidewall and a second sidewall opposite the first sidewall, the first sidewall and the second sidewall extending along a common longitudinal direction. A doping concentration of a first doping type is higher in the diode region than in the source region. The trench gate structure projects from a first surface of the semiconductor body into the semiconductor body. A first portion of the second sidewall at the first surface is directly adjoined by the source region. A second portion of the second sidewall is in direct contact with the diode region. Additional semiconductor device embodiments are provided.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: February 19, 2019
    Assignee: Infineon Technologies AG
    Inventors: Ralf Siemieniec, Dethard Peters, Romain Esteve, Wolfgang Bergner, Thomas Aichinger, Daniel Kueck, Roland Rupp, Bernd Zippelius, Karlheinz Feldrapp, Christian Strenger
  • PARTICLE IRRADIATION APPARATUS, BEAM MODIFIER DEVICE, AND SEMICONDUCTOR DEVICE INCLUDING A JUNCTION TERMINATION EXTENSION ZONE
    Publication number: 20190049850
    Abstract: A semiconductor device is provided that includes a silicon carbide substrate including a main surface at which a plurality of doped zones are formed in a junction termination extension zone of the silicon carbide substrate, the plurality of doped zones are arranged such that a lateral dopant concentration gradient is formed that decreases from a central region of the silicon carbide substrate to an outer edge region of the silicon carbide substrate.
    Type: Application
    Filed: October 5, 2018
    Publication date: February 14, 2019
    Applicant: Infineon Technologies AG
    Inventors: Roland RUPP, Rudolf ELPELT, Romain ESTEVE
  • Semiconductor device and a method for forming a semiconductor
    Patent number: 10164019
    Abstract: A method for forming a semiconductor device includes forming at least one graphene layer on a surface of a semiconductor substrate. The method further includes forming a silicon carbide layer on the at least one graphene layer.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: December 25, 2018
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Guenther Ruhl, Hans-Joachim Schulze
  • Methods of Planarizing SiC Surfaces
    Publication number: 20180350612
    Abstract: A method of planarizing a roughened surface of a SiC substrate includes: forming a sacrificial material on the roughened surface of the SiC substrate, the sacrificial material having a density between 35% and 120% of the density of the SiC substrate; implanting ions through the sacrificial material and into the roughened surface of the SiC substrate to form an amorphous region in the SiC substrate; and removing the sacrificial material and the amorphous region of the SiC substrate by wet etching.
    Type: Application
    Filed: May 31, 2017
    Publication date: December 6, 2018
    Inventors: Hans-Joachim Schulze, Helmut Oefner, Roland Rupp
  • Semiconductor Device with Trench Gate Structure Including a Gate Electrode and a Contact Structure for a Diode Region
    Publication number: 20180350968
    Abstract: A semiconductor device includes trench structures that extend from a first surface into a semiconductor body. The trench structures include a gate structure and a contact structure that extends through the gate structure, respectively. Transistor mesas are between the trench structures. Each transistor mesa includes a body zone forming a first pn junction with a drift structure and a second pn junction with a source zone. Diode regions directly adjoin one of the contact structures form a third pn junction with the drift structure, respectively.
    Type: Application
    Filed: August 3, 2018
    Publication date: December 6, 2018
    Inventors: Thomas Aichinger, Romain Esteve, Dethard Peters, Roland Rupp, Ralf Siemieniec
  • PHARMACEUTICAL COMPOSITION CONTAINING DIMETHYL FUMARATE FOR ADMINISTRATION AT A LOW DAILY DOSE
    Publication number: 20180338946
    Abstract: The present invention relates to pharmaceutical compositions containing dimethyl fumarate (DMF), More specifically, the present invention relates to a pharmaceutical composition for oral use in treating hyperproliferative, inflammatory or autoimmune disorders by administering a low daily dosage in the range of 410 mg±5% or 400 mg±5% dimethyl fumarate, wherein the pharmaceutical formulation is in the form of an erosion matrix tablet.
    Type: Application
    Filed: July 26, 2018
    Publication date: November 29, 2018
    Inventors: Christin GALETZKA, Chris RUNDFELDT, Roland RUPP, Peder M. ANDERSEN
  • Method for Thinning Substrates
    Publication number: 20180330981
    Abstract: According to various embodiments, a method includes: providing a substrate having a first side and a second side opposite the first side; forming a buried layer in and/or over the substrate by implanting a chemical element having a greater electronegativity than the substrate into the first side of the substrate by ion implantation; and thinning the substrate from the second side of the substrate, wherein the buried layer comprises a solid state compound having a greater resistance to the thinning than the substrate and wherein the thinning stops at the buried layer.
    Type: Application
    Filed: July 11, 2018
    Publication date: November 15, 2018
    Inventors: Roland Rupp, Hans-Joachim Schulze, Francisco Javier Santos Rodriguez, Iris Moder, Ingo Muri
  • Particle irradiation apparatus, beam modifier device, and semiconductor device including a junction termination extension zone
    Patent number: 10120287
    Abstract: A beam modifier device is provided that includes scattering portions in which particles vertically impinging on an exposure surface of the beam modifier device are deflected from a vertical direction. A total permeability for the particles changes along a lateral direction parallel to the exposure surface.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: November 6, 2018
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Rudolf Elpelt, Romain Esteve
  • Semiconductor Devices with Trench Gate Structures in a Semiconductor Body with Hexagonal Crystal Lattice
    Publication number: 20180294260
    Abstract: A semiconductor device with a trench gate structure in a semiconductor body with a hexagonal crystal lattice is disclosed. In an embodiment a semiconductor device includes a semiconductor body with a hexagonal crystal lattice, wherein a mean surface plane of a first surface of the semiconductor body is tilted with respect to a <1-100> crystal direction of the hexagonal crystal lattice by an off-axis angle, a trench gate structure extending into the semiconductor body and at least two transistor mesas formed from portions of the semiconductor body and adjoining the trench gate structure, wherein sidewalls of the at least two transistor mesas are aligned with a (11-20) crystal plane and deviate from a normal to the mean surface plane by at most 5 degrees, and wherein each transistor mesa comprises a MOS gate channel.
    Type: Application
    Filed: June 6, 2018
    Publication date: October 11, 2018
    Inventors: Roland Rupp, Romain Esteve, Dethard Peters
  • Silicon Carbide Semiconductor Device and Method of Manufacturing
    Publication number: 20180277637
    Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body. The trench structure includes an auxiliary electrode at a bottom of the trench structure and a gate electrode arranged between the auxiliary electrode and the first surface. A shielding region adjoins the auxiliary electrode at the bottom of the trench structure and forms a first pn junction with a drift structure. A corresponding method of manufacturing the semiconductor device is also described.
    Type: Application
    Filed: March 23, 2018
    Publication date: September 27, 2018
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder, Roland Rupp
  • Forming electrode trenches by using a directed ion beam and semiconductor device with trench electrode structures
    Patent number: 10083835
    Abstract: By directing an ion beam with a beam divergence ? on a process surface of a semiconductor substrate, parallel electrode trenches are formed in the semiconductor substrate. A center axis of the directed ion beam is tilted to a normal to the process surface at a tilt angle ?, wherein at least one of the tilt angle ? and the beam divergence ? is not equal to zero. The semiconductor substrate is moved along a direction parallel to the process surface during formation of the electrode trenches. A conductive electrode is formed in the electrode trenches, wherein first sidewalls of the electrode trenches are tilted to the normal by a first slope angle ?1 with ?1 =(?+?/2) and second sidewalls are tilted to the normal by a second slope angle ?2 with ?2 =(???/2).
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: September 25, 2018
    Assignee: Infineon Technologies AG
    Inventors: Johannes Georg Laven, Anton Mauder, Roland Rupp, Hans-Joachim Schulze, Werner Schustereder
  • PHARMACEUTICAL COMPOSITION CONTAINING DIMETHYL FUMARATE FOR ADMINISTRATION AT A LOW DAILY DOSE
    Publication number: 20180256530
    Abstract: The present invention relates to pharmaceutical compositions containing dimethyl fumarate (DMF). More specifically, the present invention relates to a pharmaceutical composition for oral use in treating psoriasis by administering a low daily dosage in the range of 375 mg±5% dimethyl fumarate, wherein the pharmaceutical formulation is in the form of an erosion matrix tablet.
    Type: Application
    Filed: May 15, 2018
    Publication date: September 13, 2018
    Inventors: Christin GALETZKA, Chris RUNDFELDT, Roland RUPP, Peder M. ANDERSEN
  • Semiconductor device with trench gate structure including a gate electrode and a contact structure for a diode region
    Patent number: 10074741
    Abstract: A semiconductor device includes trench structures that extend from a first surface into a semiconductor body. The trench structures include a gate structure and a contact structure that extends through the gate structure, respectively. Transistor mesas are between the trench structures. Each transistor mesa includes a body zone forming a first pn junction with a drift structure and a second pn junction with a source zone. Diode regions directly adjoin one of the contact structures form a third pn junction with the drift structure, respectively.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: September 11, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Aichinger, Romain Esteve, Dethard Peters, Roland Rupp, Ralf Siemieniec
  • Method for thinning substrates
    Patent number: 10049914
    Abstract: According to various embodiments, a method may include: providing a substrate having a first side and a second side opposite the first side; forming a buried layer at least one of in or over the substrate by processing the first side of the substrate; thinning the substrate from the second side of the substrate, wherein the buried layer includes a solid state compound having a greater resistance to the thinning than the substrate and wherein the thinning stops at the buried layer.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: August 14, 2018
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Hans-Joachim Schulze, Francisco Javier Santos Rodriguez, Iris Moder, Ingo Muri
  • PHARMACEUTICAL FORMULATION COMPRISING ONE OR MORE FUMARIC ACID ESTERS IN AN EROSION MATRIX
    Publication number: 20180221284
    Abstract: A pharmaceutical formulation comprising an erosion matrix comprising one or more fumaric acid esters as well as one or more rate-controlling agents, wherein erosion of said erosion matrix permits controlled release of said fumaric acid ester(s).
    Type: Application
    Filed: April 4, 2018
    Publication date: August 9, 2018
    Inventors: Henrik NILSSON, Roland RUPP
  • Method of Manufacturing a Silicon Carbide Semiconductor Device by Removing Amorphized Portions
    Publication number: 20180204725
    Abstract: A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.
    Type: Application
    Filed: March 13, 2018
    Publication date: July 19, 2018
    Inventors: Thomas Aichinger, Victorina Poenariu, Wolfgang Bergner, Romain Esteve, Daniel Kueck, Dethard Peters, Gerald Reinwald, Roland Rupp, Gerald Unegg
  • Wafer Carrier, Method for Manufacturing the Same and Method for Carrying a Wafer
    Publication number: 20180197766
    Abstract: A wafer carrier comprises a first foil, a second foil, and a chamber between the first and the second foil. The first foil has a perforation and is used for carrying the wafer. The first and the second foil are connected to each other so as to form the chamber. The chamber is configured to be evacuated to form a vacuum in the chamber, the vacuum causes an underpressure at the perforation, the underpressure forms a carrying force to the wafer to be carried.
    Type: Application
    Filed: March 8, 2018
    Publication date: July 12, 2018
    Inventors: Francisco Javier Santos Rodriguez, Roland Rupp, Ronny Kern, Josef Unterweger
  • Method for forming a semiconductor device and a semiconductor device
    Patent number: 10020226
    Abstract: In certain embodiments, a semiconductor device includes a plurality of semiconductor chips. Each semiconductor chip comprises a semiconductor body having a first side and a second side opposite the first side, a graphite substrate bonded to the second side of the semiconductor body and comprising an opening leaving an area of the second side of the semiconductor body uncovered by the graphite substrate, and a back-side metallization arranged in the opening of the graphite substrate and electrically contacting the area of the second side. The semiconductor device further includes a plurality of separation trenches each separating one of the plurality of semiconductor chips from an adjacent one of the plurality of semiconductor chips.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: July 10, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Roland Rupp, Wolfgang Lehnert, Francisco Javier Santos Rodriguez, Hans-Joachim Schulze