Abstract: An electronic package includes a substrate wafer having front and rear faces. An emitting integrated circuit chip is mounted to the front face of the substrate wafer and includes a light radiation optical emitter. A receiving integrated circuit chip is also mounted to the front face of the substrate wafer and includes at least one light radiation optical sensor. A transparent encapsulant extends above the optical sensor and the optical emitter. An opaque encapsulant encapsulates the transparent encapsulant. The opaque encapsulant has a front window situated above the optical emitter and which is offset laterally relative to the optical sensor. The transparent encapsulant accordingly has an uncovered front face situated above the optical emitter and offset laterally relative to the optical sensor. The opaque encapsulant may include an additional front window. The receiving integrated circuit chip further includes a second optical sensor situated opposite the additional front window.

Abstract: An electronic package includes a substrate wafer having front and rear faces and a through passage having a front window and a blind cavity communicating laterally with the front window. A receiving integrated circuit chip is mounted on the rear face and includes an optical sensor situated opposite the blind cavity. A transparent encapsulant extends above the optical sensor and at least partially fills the through passage. An emitting integrated circuit chip, embedded in the transparent encapsulant, includes an optical emitter of luminous radiation. The emitting integrated circuit chip may be mounted to the front face or within the through passage to the receiving integrated circuit chip. The substrate wafer may further include a second through passage. The receiving integrated circuit chip further includes a second optical sensor situated opposite the second through passage. A cover plate is mounted to the front face at the second through passage.

Abstract: A semiconductor package includes a transmissive support plate and includes at least one elongate hole. An integrated circuit semiconductor device is mounted on a rear face of the support plate. The semiconductor device includes first and second optical elements oriented towards the rear face of the support plate, where the first and second optical elements are placed on either side of the elongate hole. An encapsulation material made of an opaque material encapsulates the semiconductor device and fills the elongate hole so as to form an optical insulation partition between the first and second optical elements. A cavity is left, however, between each optical element and a rear face of the support plate.

Abstract: A method for manufacturing and for testing an integrated circuit, including the steps of forming, on the upper portion of the integrated circuit, a passivation layer including openings at the level of metal tracks of the last interconnect stack of the integrated circuit; forming, in the openings, first pads connected to second pads formed on the passivation layer by conductive track sections, the first pads being intended for the connection of the integrated circuit; testing the integrated circuit by bringing test tips in contact with the second pads; and eliminating at least a portion of at least one of the conductive track sections.

Abstract: A method for fabricating electrical bonding pads on one face of a wafer includes the production of electrically conductive areas and electrical connection branches connecting these conductive areas. A layer of mask material is deposited and openings are produced in this mask layer which extend above said conductive areas and at least some of which extend at least partly beyond the peripheral edges of the underlying conductive areas. Blocks made of a solder material are produces in the openings by electrodeposition in a bath. The mask material is then removed along with the connection branches. The wafer is passed through or placed in an oven so as to shape, on the conductive areas, the blocks into substantially domed electrical bonding pads.

Abstract: An optical device includes at least one optical die (4) that is embedded, at least peripherally, in a plate made of an encapsulation material so that the optical die may transmit light, from one side of the plate to the other. An electronic package is formed by a semiconductor device which includes at least one optical, integrated-circuit chip with the optical device placed so that the optical die lies above optical integrated circuits formed in or on the integrated circuit chip. The optical device is attached onto the semiconductor device.

Abstract: A method for fabricating electrical bonding pads on the electrical contact areas of a wafer includes producing first blocks made of a solder material, producing second blocks made of a solder material on these first blocks, and passing the blocks through an oven so as to shape the blocks into approximately domed electrical bonding pads.

Abstract: A first component includes a slice formed from an integrated circuit chip having a front face and a rear face. An encapsulation block encapsulates the integrated circuit chip such that front and rear faces of the chip and front and rear faces of the encapsulation block are co-planar to form front and rear faces of the slice. Front and rear electrical connection networks are provided on the front and rear faces, respectively, with the electrical connection networks linked by electrical connection vias passing through the encapsulation block. A thermal transfer layer at least partially covers the rear face. A second component may be behind and at a distance from the first component. Connection elements interposed between the first component and the second component include both thermal connection elements in contact with the thermal transfer layer and electrical connection elements interconnecting the first and second components.

Abstract: A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate and a dielectric plate is positioned adjacent the integrated circuit chip. An encapsulation block embeds the integrated circuit chip and the passive component, the block having a frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. An electrical connection is made between the electrical connection frontside and the passive component. That electrical connection includes connection lines placed on the wafer frontside and wafer backside. The electrical connection further includes at least one via passing through the encapsulation block.

Abstract: A surface-mounted shielded multicomponent assembly, comprising a wafer on which several electronic components are assembled; an insulating layer conformally deposited on the structure with a thickness smaller than the height of the electronic components, comprising at least one opening emerging on a contact of said wafer; a conductive shielding layer covering the insulating layer and said at least one opening; and a resin layer covering the conductive layer.

Abstract: A semiconductor device includes at least one first component (5) (for example, a first integrated circuit), having a front face provided with electrical connection pads. The first component is embedded in a support layer (2) is a position such that the front face of the first component is not covered and lies parallel to a first face of the support layer. An intermediate layer (8) is formed on the front face of the first component and on the first face of the support layer. An electrical connection network (9) within the intermediate layer selectively connects to the electrical connection pads of the first component. The device further includes at least one second component (11) (for example, a second integrate circuit, having one face placed above the intermediate layer and provided with electrical connection pads selectively connected to the electrical connection network.

Abstract: A surface-mounted electronic component including balls bonded to its front surface and, on the front surface, a protective resin layer having a thickness smaller than the ball height, wherein grooves extend in the resin layer between balls of the chip.

Abstract: A method for fabricating electrical bonding pads on the electrical contact areas of a wafer includes producing first blocks made of a solder material, producing second blocks made of a solder material on these first blocks, and passing the blocks through an oven so as to shape the blocks into approximately domed electrical bonding pads.

Abstract: A method for manufacturing and for testing an integrated circuit, including the steps of forming, on the upper portion of the integrated circuit, a passivation layer including openings at the level of metal tracks of the last interconnect stack of the integrated circuit; forming, in the openings, first pads connected to second pads formed on the passivation layer by conductive track sections, the first pads being intended for the connection of the integrated circuit; testing the integrated circuit by bringing test tips in contact with the second pads; and eliminating at least a portion of at least one of the conductive track sections.

Abstract: An electronic device which includes an electronic component having a substrate and a plurality of metal interconnection layers, the plurality of metal interconnection layers having a top surface. It further comprises a dielectric layer situated above said metal interconnection layers, a conductive layer situated above said dielectric layer, an inductor coil and a ground shield, the inductor coil being formed in the conductive layer and the ground shield being formed in a layer of said plurality of metal interconnection layers.

Abstract: A wire is electrically connected to an electrical bonding pad of an integrated circuit chip and electronic device through an intermediate electrical interconnect block that is interposed between the electrical bonding pad and one end of the electrical lead wire.

Abstract: A semiconductor package includes a semiconductor die attached to a support having electrically conductive paths, the semiconductor die having a bond-pad electrically connected to the electrically a conductive path on the support by a wire-bond of a first metallic composition, the wire-bond and the bond-pad being coated with a protection layer of a second metallic composition.

Abstract: A stackable semiconductor package includes a board having first electrical connections, an integrated circuit chip fixed on a front face of the board, second electrical connections which connect the chip to the first electrical connections of the board and front electrical contact terminals arranged beyond at least one edge of the chip on the front face of this board. An encapsulation block of a coating material is formed on the front face of the board and encapsulates the chip, its electrical connections and the front terminals. The block has at least one opening which at least partially uncovers the front terminals with a view to receiving electrical connection beads of a stacked second package. This one opening is preferably in the form of a groove.

Abstract: An electronic device protected against electromagnetic disturbances comprising: a support structure having a first and second electronic component, wherein the support structure includes a conductive means surrounding each of the first and second electronic components; a first and second insulating block formed overlying the first and second electronic components on the support structure; and a metal layer overlying the first and second insulating blocks that are formed over the first and second electronic components, wherein the metal layer is electrically connected to the support structure through the conductive means to protect the first and second electronic components from the electromagnetic disturbances irradiating from each of the first and second electronic components.

Abstract: A method for fabricating electrical bonding pads on one face of a wafer includes the production of electrically conductive areas and electrical connection branches connecting these conductive areas. A layer of mask material is deposited and openings are produced in this mask layer which extend above said conductive areas and at least some of which extend at least partly beyond the peripheral edges of the underlying conductive areas. Blocks made of a solder material are produces in the openings by electrodeposition in a bath. The mask material is then removed along with the connection branches. The wafer is passed through or placed in an oven so as to shape, on the conductive areas, the blocks into substantially domed electrical bonding pads.