Patents by Inventor Romain Coffy

Romain Coffy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190376676
    Abstract: The disclosure concerns a housing for a light source mounted on a substrate, the housing comprising: a molded body having an opening permitting the passage of a light beam generated by the light source; one or more surfaces for receiving a diffuser; and first and second conducting pins traversing the molded body, each pin abutting one of said surfaces.
    Type: Application
    Filed: June 12, 2019
    Publication date: December 12, 2019
    Applicants: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Joseph HANNAN, Stuart ROBERTSON, Romain COFFY, Jean-Michel RIVIERE
  • Publication number: 20190379173
    Abstract: The disclosure concerns a housing for a light source mounted on a substrate, the housing comprising: a barrel comprising a mounting for a diffuser; and a diffuser positioned in the mounting, wherein the barrel comprises first and second conducting columns and a fuse or conductive wire electrically coupling the first and second conducting columns. A portion of the fuse is mechanically fixed to the diffuser and/or the fuse being arranged to trap the diffuser in said mounting.
    Type: Application
    Filed: June 5, 2019
    Publication date: December 12, 2019
    Inventors: Romain COFFY, Jean-Michel RIVIERE
  • Publication number: 20190376667
    Abstract: The disclosure concerns a housing for a light source mounted on a substrate, the housing comprising: a barrel having first and second conducting columns; and a diffuser having one or more conductive paths arranged to electrically connect the first and second conducting columns when the diffuser is mounted on the barrel.
    Type: Application
    Filed: June 5, 2019
    Publication date: December 12, 2019
    Inventors: Romain COFFY, Jean-Michel RIVIERE
  • Publication number: 20190356390
    Abstract: An optoelectronic device includes a substrate and a first optoelectronic chip flush with a surface of the substrate. The device includes a cover that covers the substrate and the first optoelectronic chip. The cover comprises a cavity above a first optical transduction region of the first optoelectronic chip. The device also includes a second optoelectronic chip having a second optical transduction region spaced apart from the first optical transduction region and the cavity continues above the second optical transduction region.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 21, 2019
    Inventors: Alexandre COULLOMB, Romain COFFY, Jean-Michel RIVIERE
  • Publication number: 20190355864
    Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 21, 2019
    Inventors: Alexandre COULLOMB, Romain COFFY, Jean-Michel RIVIERE
  • Publication number: 20190355674
    Abstract: A first integrated circuit chip is assembled to a second integrated circuit chip with a back-to-back surface relationship. The back surfaces of the integrated circuit chips are attached to each other using one or more of an adhesive, solder or molecular bonding. The back surface of at least one the integrated circuit chips is processed to include at least one of a trench, a cavity or a saw cut.
    Type: Application
    Filed: May 14, 2019
    Publication date: November 21, 2019
    Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Denis FARISON, Romain COFFY, Jean-Michel RIVIERE
  • Publication number: 20190319157
    Abstract: A carrier wafer has a back face and a front face and a network of electrical connections between the back face and the front face. A first electronic chip is mounted with its bottom face on top of the front face of the carrier wafer. The first electronic chip has a through-opening extending between the bottom face and a face. A second electronic chip is installed in the through-opening and mounted to the front face of the carrier wafer.
    Type: Application
    Filed: April 8, 2019
    Publication date: October 17, 2019
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Pte Ltd
    Inventors: Romain COFFY, Laurent HERARD, David GANI
  • Publication number: 20190304891
    Abstract: A cover for an electronic device includes a support body having a through-passage. An optical element which allows light to pass is mounted on said support body in a position extending across the through-passage. A surface of the optical element includes an electrically-conducting track configured as a security detection element. At least two electrical connection leads are rigidly attached to the support body and include first uncovered portions internal to the support body and electrically connected to spaced apart locations on the electrically-conducting track. The at least two electrical connection leads further including second uncovered portions external to said support body. The cover is mounted on a support plate carrying an electronic chip situated in the through-passage at a distance from the optical element.
    Type: Application
    Filed: March 26, 2019
    Publication date: October 3, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Romain COFFY
  • Publication number: 20190189859
    Abstract: A cover for an electronic circuit package, including an element having peripheral portions housed in an inner groove of a through opening.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 20, 2019
    Inventors: Jean-Michel RIVIERE, Romain COFFY, Karine SAXOD
  • Publication number: 20190189860
    Abstract: An electronic circuit including a cover crossed by an element and having a planar main inner surface.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 20, 2019
    Inventors: Jean-Michel RIVIERE, Romain COFFY, Karine SAXOD
  • Publication number: 20190190606
    Abstract: A cover for an electronic circuit package, including: a body having an opening extending therethrough; a first element located in the opening and having a surface continuing planar or rounded shapes of a surface of the cover; and a second element of connection of the first element to the body.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 20, 2019
    Inventors: Jean-Michel RIVIERE, Romain COFFY, Karine SAXOD
  • Patent number: 9502361
    Abstract: An electronic device includes a first and a second integrated-circuit chip that are stacked at a distance from one another, and a plurality of electrical connection pillars and at least one protective barrier interposed between the chips. The protective barrier delimits a free space between mutually opposing local regions of the chips, and an encapsulation block extends around the chip that has the smaller mounting face and over the periphery of the mounting face of the other chip. The electrical connection pillars and the protective barrier are made of at least one identical metallic material with a view to simultaneous fabrication.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: November 22, 2016
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain Coffy, Julien Pruvost
  • Patent number: 9478677
    Abstract: An electronic device includes a substrate plate with a traversing passage. An electronic component, mounted to the substrate plate, includes an integrated circuit chip with an optical sensor and an opaque protective plate mounted above the sensor. The electronic component is mounted with the chip facing the substrate plate such that the protective plate is engaged with the traversing passage. Electrical connection elements extend between the chip and the substrate plate. An internal block of encapsulation material extends into the traversing passage of the substrate plate between the chip and the substrate plate so as to embed the electrical connection elements.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: October 25, 2016
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Julien Pruvost, Romain Coffy
  • Patent number: 9401349
    Abstract: A stack of chips is formed by a first integrated-circuit chip and a second integrated-circuit chip. The chips have opposing faces which are separated from each other by an interposed spacer. The spacer is fastened by adhesion to only one of the opposing faces. The opposing faces are fastened to each other by a local adhesive which is separate from spacer.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: July 26, 2016
    Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (MALTA) LTD, STMICROELECTRONICS S.R.L.
    Inventors: Angelo Crobu, Kenneth Fonk, Romain Coffy
  • Publication number: 20160148880
    Abstract: An electronic device includes a first and a second integrated-circuit chip that are stacked at a distance from one another, and a plurality of electrical connection pillars and at least one protective barrier interposed between the chips. The protective barrier delimits a free space between mutually opposing local regions of the chips, and an encapsulation block extends around the chip that has the smaller mounting face and over the periphery of the mounting face of the other chip. The electrical connection pillars and the protective barrier are made of at least one identical metallic material with a view to simultaneous fabrication.
    Type: Application
    Filed: September 14, 2015
    Publication date: May 26, 2016
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain Coffy, Julien Pruvost
  • Patent number: 9245914
    Abstract: An electronic device is formed by a stack of an integrated circuit chip and an optical plate. The integrated circuit chip includes integrated circuits (such as optical circuits) formed on or in a semiconductor substrate plate. The optical integrated circuits may form an optical sensor. An electrical connection network is provided on the top side of the semiconductor substrate plate. Electrical connection lugs, which are connected to the electrical connection network through electrical connection vias, are mounted on the back side of the semiconductor substrate plate. The vias are through silicon vias situated at a distance from the periphery of the semiconductor substrate plate. The optical plate is configured to allow light radiation to pass to the optical integrated circuits.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: January 26, 2016
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Olivier Le-Briz, Romain Coffy
  • Publication number: 20150364455
    Abstract: A stack of chips is formed by a first integrated-circuit chip and a second integrated-circuit chip. The chips have opposing faces which are separated from each other by an interposed spacer. The spacer is fastened by adhesion to only one of the opposing faces. The opposing faces are fastened to each other by a local adhesive which is separate from spacer.
    Type: Application
    Filed: May 28, 2015
    Publication date: December 17, 2015
    Applicants: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (MALTA) LTD, STMICROELECTRONICS S.R.L.
    Inventors: Angelo Crobu, Kenneth Fonk, Romain Coffy
  • Publication number: 20150357484
    Abstract: An electronic device includes a substrate plate with a traversing passage. An electronic component, mounted to the substrate plate, includes an integrated circuit chip with an optical sensor and an opaque protective plate mounted above the sensor. The electronic component is mounted with the chip facing the substrate plate such that the protective plate is engaged with the traversing passage. Electrical connection elements extend between the chip and the substrate plate. An internal block of encapsulation material extends into the traversing passage of the substrate plate between the chip and the substrate plate so as to embed the electrical connection elements.
    Type: Application
    Filed: May 28, 2015
    Publication date: December 10, 2015
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Julien Pruvost, Romain Coffy
  • Patent number: 9136292
    Abstract: An electronic package includes a substrate wafer having front and rear faces. An emitting integrated circuit chip is mounted to the front face of the substrate wafer and includes a light radiation optical emitter. A receiving integrated circuit chip is also mounted to the front face of the substrate wafer and includes at least one light radiation optical sensor. A transparent encapsulant extends above the optical sensor and the optical emitter. An opaque encapsulant encapsulates the transparent encapsulant. The opaque encapsulant has a front window situated above the optical emitter and which is offset laterally relative to the optical sensor. The transparent encapsulant accordingly has an uncovered front face situated above the optical emitter and offset laterally relative to the optical sensor. The opaque encapsulant may include an additional front window. The receiving integrated circuit chip further includes a second optical sensor situated opposite the additional front window.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: September 15, 2015
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain Coffy, Remi Brechignac
  • Patent number: 9134421
    Abstract: An electronic package includes a substrate wafer having front and rear faces and a through passage having a front window and a blind cavity communicating laterally with the front window. A receiving integrated circuit chip is mounted on the rear face and includes an optical sensor situated opposite the blind cavity. A transparent encapsulant extends above the optical sensor and at least partially fills the through passage. An emitting integrated circuit chip, embedded in the transparent encapsulant, includes an optical emitter of luminous radiation. The emitting integrated circuit chip may be mounted to the front face or within the through passage to the receiving integrated circuit chip. The substrate wafer may further include a second through passage. The receiving integrated circuit chip further includes a second optical sensor situated opposite the second through passage. A cover plate is mounted to the front face at the second through passage.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: September 15, 2015
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Julien Vittu, Romain Coffy