Abstract: A method of handling radar signals of a radar system having a plurality of antennas is provided. The method may include generating a plurality of time-based radar signals based on a radar signal received by an associated antenna of the plurality of antennas, and transforming each time-based radar signal of the time-based radar signals into radar signals that each comprise a plurality of pairs of a frequency-based-value and an associated intensity value.

Abstract: A radar device is provided that is arranged for conducting an interference detection and mitigation based on received and sampled radar signals and storing interference-mitigated data; conducting an FFT on the interference-mitigated data and storing FF-transformed data; conducting a compression on the FF-transformed data into compressed data; and storing the compressed data in a memory. Also, a method for operating such radar device is suggested.

Abstract: A cache circuit associated with a hypervisor system is disclosed. The cache circuit comprises a cache memory circuit comprising a plurality of cachelines, wherein each cacheline is configured to store data associated with one or more virtual machines (VMs) of a plurality of VMs associated with the hypervisor system and a plurality of tag array entries respectively associated with the plurality of cachelines. In some embodiments, each tag array entry of the plurality of tag entries comprises a tag field configured to store a tag identifier (ID) that identifies an address of a main memory circuit to which a data stored in the corresponding cacheline is associated and a VM tag field configured to store a VM ID associated with a VM to which the data stored in the corresponding cacheline is associated.

Abstract: A device for accessing memory configured to store an image data cube, wherein the memory has memory banks, and each memory bank has memory rows and memory columns. The device includes an input configured to receive a memory access request having a logical start address, which specifies a logical bank, a logical row, and a logical column, and a burst size; and a memory address generator configured to generate physical memory addresses based on the logical start address and the burst size, wherein any consecutive logical start addresses mapped to different memory rows are mapped to different memory banks.

Abstract: A device for processing radar signals is suggested, said device comprising a DMA engine, a buffer and a processing stage, wherein the DMA engine is arranged for conducting a read access to a memory, wherein such read access comprises at least two data entries, and for filling the buffer by resorting the at least two data entries, wherein the processing stage is arranged for processing the data stored in the buffer.

Abstract: The present disclosure relates to a radar device including a first radar-IC for processing first receive signals from first antennas of an antenna array, wherein the first radar-IC is configured to determine a first range-Doppler map based on the first receive signals, and to determine a first subregion of the first range-Doppler map based on criteria of interest. The radar device also includes at least a second radar-IC for processing second receive signals from second antennas of the antenna array, wherein the second radar-IC is configured to determine a second range-Doppler map based on the second receive signals, and to determine a second subregion of the second range-Doppler map based on the criteria of interest. A data interface is configured to forward information indicative of the first and/or the second subregions to a common processor for further processing.

Abstract: A method for processing radar signals includes emitting a first radar signal via a transmitting antenna of a first radar unit, where the first radar signal is phase modulated using a first code and a first frequency offset is added to at least a portion of the first radar signal, and emitting a second radar signal via a transmitting antenna of a second radar unit, where the second radar signal is phase modulated using a second code. The first code and the second code are orthogonal to each other and the first radar unit and the second radar unit are loosely coupled with each other. The method further includes receiving a combined radar signal via a receiving antenna of the first radar unit, where the combined radar signal comprises a reflections of the first and the second radar signals, and processing the combined radar signal at the first radar unit.

Abstract: An implementation relates to a device for processing an image data stream. The device may include a first processing unit and a second processing unit for receiving the image data stream. The first processing unit may be arranged for providing a first data stream, the first data stream has a reduced bandwidth compared to the image data stream. The second processing unit may arranged for providing a second data stream, the second data stream has a reduced bandwidth compared to the image data stream.

Abstract: A device for accessing memory configured to store an image data cube, wherein the memory has memory banks, and each memory bank has memory rows and memory columns. The device includes an input configured to receive a memory access request having a logical start address, which specifies a logical bank, a logical row, and a logical column, and a burst size; and a memory address generator configured to generate physical memory addresses based on the logical start address and the burst size, wherein any consecutive logical start addresses mapped to different memory rows are mapped to different memory banks.

Abstract: A method for processing a radar signal includes adjusting a processing clock signal, wherein the processing clock signal determines an operation period of a signal processing circuit, wherein the processing clock signal is determined based on a time window, wherein the size of the time window is determined based on the maximum time available for processing a portion of the radar signal and wherein the end of the time window is determined such that it does not occur during an active transmission portion of the radar system.

Abstract: A radar device is disclosed that includes an input DMA module, at least one processing module, a histogram module, and an output DMA module. The input DMA module is configured to access a memory and supply data from the memory to the at least one processing module and/or to the histogram module. Each of the processing modules is configured to be enabled or disabled, wherein the at least one processing module that is enabled is configured to process at least a portion of the data supplied by the input DMA module, wherein the histogram module is fed by data from the at least processing module that is enabled and/or by the input DMA module. The output DMA module is configured to store the data that are processed by the at least one processing module that is enabled in the memory. Also, an according method is provided.

Abstract: A processing device having a skew controller configured to measure skew values between a plurality of signal lines coupled to the processing device; and a security module configured to store the skew values, and to compare new skew values with the stored skew values, wherein when the new skew values do not equal the stored skew values, the processing device is configured to perform an alarm action.

Abstract: A method for processing a radar signal is provided. The method may include receiving chirps of a radar signal, sampling the radar signal, dividing the samples that correspond to the chirp of the radar signal into at least two virtual chirps, and processing the radar signal based on the at least two virtual chirps. Also, a corresponding device is provided.

Abstract: An example relates to a method for processing radar signals, wherein said radar signals comprise digitized data received by at least one radar antenna, the method comprising (i) determining FFT results based on the digitized data received; and (ii) storing a first group of the FFT results without a second group of the FFT results.

Abstract: A radar device is disclosed including an input DMA module, at least one processing module, and an output DMA module. The input DMA module is arranged to access a memory and supply data from the memory to the at least one processing module, wherein each of the processing modules is arranged to be enabled or disabled. The at least one processing module that is enabled is arranged to process at least a portion of the data supplied by the input DMA module, and the output DMA module is arranged to store the data that are processed by the at least one processing module that is enabled in the memory. Also, a method for processing data by a radar device is provided.

Abstract: A radar device including at least three subcircuits, wherein each subcircuit has a cascade input port and a cascade output port and is chained such that the cascade output port of a first subcircuit is connected to the cascade input port of a subsequent subcircuit, the cascade input port of the last subcircuit of the chain is connected to the cascade output port of its preceding subcircuit, and the cascade output port of the last subcircuit of the chain is connectable to an external device, and wherein the at least three subcircuits are configured to conduct a radar computation in a distributed manner such that intermediate results are conveyed towards the last subcircuit of the chain which is configured to combine these results and supply them towards its cascade output port.

Abstract: A device for radar applications includes a computing engine, a radar acquisition unit connected to the computing engine, a timer unit connected to the computing engine, a cascade input port, and a cascade output port. The cascade input port is configured to convey an input signal to the computing engine and the cascade output port is configured to convey an output signal from the computing engine. Further, an according system, a radar system, a vehicle with such radar system and a method are provided.

Abstract: An apparatus for light detection and ranging is provided. The apparatus includes a reflective surface configured to oscillate about a rotation axis, and a plurality of light sources each configured to controllably emit a respective light beam via an optical system onto the reflective surface. Further, the apparatus includes a controller configured to control emission times of the plurality of light sources so that the reflective surface emits a plurality of light beams to an environment according to a first sequence of beam directions for a first measurement, and according to a second sequence of beam directions for a subsequent second measurement.

Abstract: A method for processing radar signals, wherein said radar signals comprise digitized data received by at least one radar antenna, the method comprising (i) determining FFT results based on the digitized data received; and (ii) storing a first group of the FFT results, wherein the first group of FFT results comprises at least two portions, wherein a first portion of FFT results is stored with a first accuracy and a second portion of FFT results is stored with a second accuracy.

Abstract: A radar sensor is described herein. In accordance with one example embodiment the radar sensor includes a transmitter for transmitting an RF signal and a receiver configured to receive a respective back-scattered signal from at least one radar target and to provide a corresponding digital radar signal. The radar sensor further includes a processor configured to convert the digital radar signal into the frequency do-main thus providing respective frequency domain data and to compress the frequency domain data. A communication interface is configured to transmit the compressed frequency domain data via a communication link operably coupled to the communication interface. Furthermore, respective and related radar methods and systems are described.