Abstract: An electronic control unit includes a signal input circuit configured to receive a sensor signal from a radar sensor or from a lidar Sensor and a processing circuit configured to determine a first condition based on a first representation of the sensor signal, and to generate an activation signal in response to the first condition.

Abstract: A device for processing radar signals is suggested, the device comprising: (i) a memory, which is arranged to store radar data and (ii) an accessor comprising a DMA engine, wherein the accessor is arranged to access data of the memory via the DMA engine, to filter the accessed data, and to forward the filtered data.

Abstract: Techniques for radar detection based on preacquisition ramps are discussed. One example system comprises transmitter circuitry, receiver circuitry, and one or more processors. The transmitter circuitry can transmit preacquisition ramps and acquisition ramps. The receiver circuitry can receive preacquisition signals and acquisition signals based on interactions between the environment and the preacquisition ramps and acquisition ramps, respectively. The one or more processors can perform preprocessing based on the preacquisition signals to obtain interim results based on one or more of the environment or the system; generate a range Doppler map based at least in part on the acquisition signals; and evaluate the range Doppler map based at least in part on the interim results.

Abstract: A method for processing radar signals includes emitting a first radar signal via a transmitting antenna of a first radar unit, where the first radar signal is phase modulated using a first code and a first frequency offset is added to at least a portion of the first radar signal, and emitting a second radar signal via a transmitting antenna of a second radar unit, where the second radar signal is phase modulated using a second code. The first code and the second code are orthogonal to each other and the first radar unit and the second radar unit are loosely coupled with each other. The method further includes receiving a combined radar signal via a receiving antenna of the first radar unit, where the combined radar signal comprises a reflections of the first and the second radar signals, and processing the combined radar signal at the first radar unit.

Abstract: A modulator operable to control an oscillator is described. The modulator can include a memory that stores oscillator control values and a bit streaming block. The bit streaming block can generate a bit stream based on the oscillator control values and transmit the bit stream to the oscillator to control an oscillation frequency of the oscillator. The modulator can also include a bit streaming loader (BSL). The BSL can receive one or more of the oscillator control values from the memory, generate one or more corresponding bit values based on the one or more of the oscillator control values, and provide the one or more bit values to the bit streaming block. The bit streaming block can then generate the bit stream based the one or more bit values generated by the BSL.

Abstract: A processing device having a skew controller configured to measure skew values between a plurality of signal lines coupled to the processing device; and a security module configured to store the skew values, and to compare new skew values with the stored skew values, wherein when the new skew values do not equal the stored skew values, the processing device is configured to perform an alarm action.

Abstract: A method is suggested for processing radar signals in a processing stage, the method comprising: (i) determining FFT results at a first precision, and (ii) storing a first group of the FFT results at a second precision, wherein the second precision is lower than the first precision. Also, a device and a computer program are provided accordingly.

Abstract: A modulator operable to control an oscillator is described. The modulator can include a memory that stores oscillator control values and a bit streaming block. The bit streaming block can generate a bit stream based on the oscillator control values and transmit the bit stream to the oscillator to control an oscillation frequency of the oscillator. The modulator can also include a bit streaming loader (BSL). The BSL can receive one or more of the oscillator control values from the memory, generate one or more corresponding bit values based on the one or more of the oscillator control values, and provide the one or more bit values to the bit streaming block. The bit streaming block can then generate the bit stream based the one or more bit values generated by the BSL.

Abstract: A device is suggested for processing input data received by several antennas, the device including a processing unit including a buffer and at least one multiplier, wherein the processing unit is configured to calculate a second stage FFT result based on input data received by a first antenna, multiply the second stage FFT result for the first antenna with a first compensation value, and store the result in the buffer. The processing unit is further configured to calculate a second stage FFT result based on input data received by a second antenna, multiply the second stage FFT for the second antenna with a second compensation value, and add the result to the value stored in the buffer.

Abstract: Techniques for radar detection based on preacquisition ramps are discussed. One example system comprises transmitter circuitry, receiver circuitry, and one or more processors. The transmitter circuitry can transmit preacquisition ramps and acquisition ramps. The receiver circuitry can receive preacquisition signals and acquisition signals based on interactions between the environment and the preacquisition ramps and acquisition ramps, respectively. The one or more processors can perform preprocessing based on the preacquisition signals to obtain interim results based on one or more of the environment or the system; generate a range Doppler map based at least in part on the acquisition signals; and evaluate the range Doppler map based at least in part on the interim results.

Abstract: An embodiment relates to a method for processing input data that includes multiplying a portion of the input data with a first set of coefficients or with a second set of coefficients, wherein the first set of coefficients and the second set of coefficients are stored in a memory, wherein the first set of coefficients is used on phase modulated input data and wherein the second set of coefficients is used on input data that are not phase modulated.

Abstract: An embodiment relates to a method for processing radar signals. The radar signals may include digitized data received by at least two radar antennas. The method may include determining CFAR results on FFT results based on data received by a first antenna, and applying the CFAR results to FFT results based on data received by a second antenna.

Abstract: An embodiment relates to a method for processing radar signals. The radar signals may include digitized data received by at least two radar antennas. The method may include determining CFAR results on FFT results based on data received by a first antenna, and applying the CFAR results to FFT results based on data received by a second antenna.

Abstract: An embodiment relates to a method for processing radar signals. The radar signals may include digitized data received by at least two radar antennas. The method may include determining CFAR results on FFT results based on data received by a first antenna, and applying the CFAR results to FFT results based on data received by a second antenna.

Abstract: A device for processing radar signals is suggested, said device comprising a DMA engine, a buffer and a processing stage, wherein the DMA engine is arranged for conducting a read access to a memory, wherein such read access comprises at least two data entries, and for filling the buffer by resorting the at least two data entries, wherein the processing stage is arranged for processing the data stored in the buffer.

Abstract: A device for radar applications includes a computing engine, a radar acquisition unit connected to the computing engine, a timer unit connected to the computing engine, a cascade input port, and a cascade output port. The cascade input port is configured to convey an input signal to the computing engine and the cascade output port is configured to convey an output signal from the computing engine. Further, an according system, a radar system, a vehicle with such radar system and a method are provided.

Abstract: An example relates to a method for processing radar signals, wherein said radar signals comprise digitized data received by at least one radar antenna, the method comprising (i) determining FFT results based on the digitized data received; and (ii) storing a first group of the FFT results without a second group of the FFT results.

Abstract: A method for processing radar signals, wherein said radar signals comprise digitized data received by at least one radar antenna, the method comprising (i) determining FFT results based on the digitized data received; and (ii) storing a first group of the FFT results, wherein the first group of FFT results comprises at least two portions, wherein a first portion of FFT results is stored with a first accuracy and a second portion of FFT results is stored with a second accuracy.

Abstract: A device for radar applications includes a computing engine, a radar acquisition unit connected to the computing engine, a timer unit connected to the computing engine, a cascade input port, and a cascade output port. The cascade input port is configured to convey an input signal to the computing engine and the cascade output port is configured to convey an output signal from the computing engine. Further, an according system, a radar system, a vehicle with such radar system and a method are provided.

Abstract: A device is suggested for processing input data received by several antennas, the device including a processing unit including a buffer and at least one multiplier, wherein the processing unit is configured to calculate a second stage FFT result based on input data received by a first antenna, multiply the second stage FFT result for the first antenna with a first compensation value, and store the result in the buffer. The processing unit is further configured to calculate a second stage FFT result based on input data received by a second antenna, multiply the second stage FFT for the second antenna with a second compensation value, and add the result to the value stored in the buffer.