Abstract: A method of manufacturing a semiconductor device includes forming electrode trenches in a semiconductor substrate between semiconductor mesas that separate the electrode trenches, the semiconductor mesas including portions of a drift layer of a first conductivity type and a body layer of a second, complementary conductivity type between a first surface of the semiconductor substrate and the drift layer, respectively. The method further includes forming isolated source zones of the first conductivity type in the semiconductor mesas, the source zones extending from the first surface into the body layer. The method also includes forming separation structures in the semiconductor mesas between neighboring source zones arranged along an extension direction of the semiconductor mesas, the separation structures forming partial or complete constrictions of the semiconductor mesa, respectively.

Abstract: An electric assembly includes a bipolar switching device and a transistor circuit. The transistor circuit is electrically connected in parallel with the bipolar switching device and includes a normally-on wide bandgap transistor.

Abstract: An electric assembly includes a reverse conducting switching device and a rectifying device. The reverse conducting switching device includes transistor cells for desaturation configured to be, under reverse bias, turned on in a desaturation mode and to be turned off in a saturation mode. The rectifying device is electrically connected anti-parallel to the switching device. In a range of a diode forward current from half of a maximum rating diode current of the switching device to the maximum rating diode current, a diode I/V characteristic of the rectifying device shows a voltage drop across the rectifying device higher than a saturation I/V characteristic of the switching device with the transistor cells for desaturation turned off and lower than a desaturation I/V characteristic of the switching device with the transistor cells for desaturation turned on.

Abstract: Disclosed is a bipolar semiconductor device, comprising a semiconductor body having a first surface; and a base region of a first doping type and a first emitter region in the semiconductor body, wherein the first emitter region adjoins the first surface and comprises a plurality of first type emitter regions of a second doping type complementary to the first doping type, a plurality of second type emitter regions of the second doping type, a plurality of third type emitter regions of the first doping type, and a recombination region comprising recombination centers, wherein the first type emitter regions and the second type emitter regions extend from the first surface into the semiconductor body, wherein the first type emitter regions have a higher doping concentration and extend deeper into the semiconductor body from the first surface than the second type emitter regions, wherein the third type emitter regions adjoin the first type emitter regions and the second type emitter regions, and wherein the recom

Abstract: A reverse blocking semiconductor device is manufactured by introducing impurities of a first conductivity type into a semiconductor substrate of the first conductivity type through a process surface to obtain a process layer extending into the semiconductor substrate up to a first depth, and introducing impurities of a second, complementary conductivity type into the semiconductor substrate through openings of an impurity mask provided on the process surface to obtain emitter zones of the second conductivity type extending up to a second depth deeper than the first depth and channels of the first conductivity type between the emitter zones. Exposed portions of the process layer are removed above the emitter zones.

Abstract: A semiconductor device includes a body zone in a semiconductor mesa, which is formed between neighboring control structures that extend from a first surface into a semiconductor body. A drift zone forms a first pn junction with the body zone. In the semiconductor mesa, the drift zone includes a first drift zone section that includes a constricted section of the semiconductor mesa. A minimum horizontal width of the constricted section parallel to the first surface is smaller than a maximum horizontal width of the body zone. An emitter layer between the drift zone and the second surface parallel to the first surface includes at least one first zone of a conductivity type of the drift zone.

Abstract: A method of manufacturing a semiconductor device includes forming electrode trenches in a semiconductor substrate between semiconductor mesas that separate the electrode trenches, the semiconductor mesas including portions of a drift layer of a first conductivity type and a body layer of a second, complementary conductivity type between a first surface of the semiconductor substrate and the drift layer, respectively. The method further includes forming isolated source zones of the first conductivity type in the semiconductor mesas, the source zones extending from the first surface into the body layer. The method also includes forming separation structures in the semiconductor mesas between neighboring source zones arranged along an extension direction of the semiconductor mesas, the separation structures forming partial or complete constrictions of the semiconductor mesa, respectively.

Abstract: A transistor includes first and second load terminals and a semiconductor body coupled to both terminals. The semiconductor body includes: a drift region having dopants of a first conductivity type; a transistor section for conducting a forward load current and having a control head coupling the first load terminal to a first side of the drift region; and a diode section for conducting a reverse load current. A diode port couples the second load terminal to a second side of the drift region and includes: a first emitter electrically connected to the second load terminal and having dopants of the first conductivity type for injecting majority charge carriers into the drift region; and a second emitter having dopants of a second conductivity type for injecting minority charge carriers into the drift region. A pn-junction transition between the first and second emitters has a breakdown voltage of less than 10 V.

Abstract: A method of manufacturing an insulated gate bipolar transistor includes providing trenches extending from a first surface to a layer section in a semiconductor portion, introducing impurities into mesa sections between the trenches, and forming, from the introduced impurities, second portions of doped regions separated from source regions by body regions. The source regions are electrically connected to an emitter electrode. The second portions have a second mean net impurity concentration exceeding at least ten times a first mean net impurity concentration in first portions of the doped layer. The first portions extend from the body regions to the layer section, respectively.

Abstract: A semiconductor device includes transistor cells formed along a first surface at a front side of a semiconductor body in a transistor cell area. A drift zone structure forms first pn junctions with body zones of the transistor cells. An auxiliary structure between the drift zone structure and a second surface at a rear side of the semiconductor body includes a first portion that contains deep level dopants requiring at least 150 meV to ionize. A collector structure directly adjoins the auxiliary structure. An injection efficiency of minority carriers from the collector structure into the drift zone structure varies along a direction parallel to the first surface at least in the transistor cell area.

Abstract: A method for controlling a first switch and a second switch is suggested, wherein each switch is an RC-IGBT and wherein both switches are arranged as a half-bridge circuit. The method includes: controlling the first switch in an IGBT-mode; controlling the second switch such that it becomes desaturated when being in a DIODE-mode; wherein controlling the second switch starts before and lasts at least as long as the first switch changes its IGBT-mode from blocking state to conducting state.

Abstract: An electric assembly includes a semiconductor switching device with a maximum breakdown voltage rating across two load terminals in an off-state. A clamping diode is electrically connected to the two load terminals and parallel to the switching device. A semiconductor body of the clamping diode is made of silicon carbide. An avalanche voltage of the clamping diode is lower than the maximum breakdown voltage rating of the switching device.

Abstract: A semiconductor device includes transistor cells and control structures. The transistor cells include source zones of a first conductivity type and body zones of a second conductivity type. The source and body zones are formed in a semiconductor mesa formed from a portion of a semiconductor body. The control structures include first portions extending from a first surface into the semiconductor body on at least two opposing sides of the semiconductor mesa, second portions between the first portions and separated from the first surface by portions of the semiconductor mesa, and third portions connecting the first and the second portions and separated from the first surface by portions of the semiconductor mesa. Constricted sections of the semiconductor mesa separate third portions neighboring each other along a horizontal longitudinal extension of the semiconductor mesa.

Abstract: A method for forming a semiconductor device comprises forming an amorphous or polycrystalline semiconductor layer adjacently to at least one semiconductor doping region having a first conductivity type located in a semiconductor substrate. The method further comprises incorporating dopants into the amorphous or polycrystalline semiconductor layer during or after forming the amorphous or polycrystalline semiconductor layer. The method further comprises annealing the amorphous or polycrystalline semiconductor layer to transform at least a part of the amorphous or polycrystalline semiconductor layer into a substantially monocrystalline semiconductor layer and to form at least one doping region having the second conductivity type in the monocrystalline semiconductor layer, such that a p-n junction is formed between the at least one semiconductor doping region having the first conductivity type and the at least one doping region having the second conductivity type.

Abstract: A semiconductor device includes a semiconductor mesa that includes at least one body zone forming first pn junctions with source zones and a second pn junction with a drift zone. Electrode structures are on opposite sides of the semiconductor mesa. At least one of the electrode structures includes a gate electrode configured to control a charge carrier flow through the at least one body zone. In a separation region between the source zones, which are arranged along an extension direction of the semiconductor mesa, the semiconductor mesa includes at least one partial or complete constriction.

Abstract: A semiconductor device includes a semiconductor mesa which is formed between cell trench structures extending from a first surface into a semiconductor body. The semiconductor mesa includes a body zone forming a first pn junction with a drift zone between the body zone and a second surface opposite to the first surface. Source zones are arranged along a longitudinal axis of the semiconductor mesa at a first distance from each other and form second pn junctions with the body zone. A barrier structure, which has the conductivity type of the source zones, forms at least one of a unipolar homojunction with the drift zone and a pn junction with the body zone at least outside a vertical projection of the source zones perpendicular to the first surface. The barrier structure may be absent in the vertical projection of the source zones.

Abstract: A semiconductor device includes at least one IGBT cell region, at least one switchable free-wheeling diode region, and at least one non-switchable free-wheeling diode region integrated in the same semiconductor substrate as the at least one IGBT cell region and the at least one switchable free-wheeling diode region.

Abstract: A semiconductor device includes transistor cells that connect a first load electrode with a drift structure forming first pn junctions with body zones when a gate voltage applied to a gate electrode exceeds a first threshold voltage. First auxiliary cells in a vertical projection of and electrically connected with the first load electrode are configured to inject charge carriers into the drift structure at least in a forward biased mode of the first pn junctions. Second auxiliary cells are configured to inject charge carriers into the drift structure at high emitter efficiency when in the forward biased mode of the first pn junctions the gate voltage is below a second threshold voltage lower than the first threshold voltage and at low emitter efficiency when the gate voltage exceeds the second threshold voltage.

Abstract: Semiconductor device with a semiconductor body that includes a clamping structure including a pn junction diode and a Schottky junction diode serially connected back to back between a first contact and a second contact. A breakdown voltage of the pn junction diode is greater than 100 V and a breakdown voltage of the Schottky junction diode is greater than 10 V.

Abstract: A semiconductor device includes a drift zone in a semiconductor body. A charge-carrier transfer region forms a pn junction with the drift zone in the semiconductor body. A control structure electrically connects a recombination region to the drift zone during a desaturation cycle and disconnects the recombination region from the drift zone outside the desaturation cycle. During the desaturation cycle the recombination region reduces a charge carrier plasma in the drift zone and reduces reverse recovery losses without adversely affecting blocking characteristics.