Abstract: An apparatus comprises an electrostimulation energy storage capacitor, a circuit path communicatively coupled to the electrostimulation energy storage capacitor and configured to provide quasi-constant current neural stimulation through a load from the electrostimulation energy storage capacitor, a current measuring circuit communicatively coupled to the circuit path and configured to obtain a measure of quasi-constant current delivered to the load, and a control circuit communicatively coupled to the current measuring circuit, wherein the control circuit is configured to initiate adjustment of the voltage level of the storage capacitor for a subsequent delivery of quasi-constant current according to a comparison of the measured load current to a specified load current value.

Abstract: An implantable medical device (IMD) may include multiple power supply circuits and an electrostimulation therapy output circuit configured to, in response to a control signal specifying an electrostimulation therapy, controllably connect any one or more of the first or second power supply circuits to any one or more of a first electrostimulation output node or a second electrostimulation output node to deliver an electrostimulation. In an embodiment, the IMD may include an electrostimulation therapy return circuit configured to establish a return path for the electrostimulation delivered via one or more of the first electrostimulation output node or the second electrostimulation output node.

Abstract: A method of operating an implantable medical device (IMD) includes demodulating a data signal incoming to the IMD, serially storing demodulated data received in the data signal in a first serial buffer register, transferring the received demodulated data to a parallel buffer register from the first serial buffer register, wherein the parallel buffer register operates according to a clock signal having a lower frequency than a clock signal used to operate a serial buffer register, switching the serial storing of demodulated data to a second serial buffer register during the transferring of the received demodulated data to the parallel buffer register, and alternating the serial storing of the received data between the first and second serial buffer registers.

Abstract: An implantable medical device can include an integrated circuit comprising an electrostatic discharge (ESD) protection circuit. The ESD protection circuit can include an active circuit, a first passive circuit, and a second passive circuit. For example, at least one of the first or second passive circuits can include an array of capacitors in a series configuration, a parallel configuration, or a combination of series and parallel configurations. The first and second passive circuits can be configured to establish a specified time constant, and, in response to an applied ESD, the first and second passive circuits can provide a control signal to active circuit to switch the active circuit from a substantially non-conductive mode to a substantially conductive mode.

Abstract: An implantable medical device such as a cardiac pacemaker or implantable cardioverter/defibrillator with the capability of storing body temperature measurements taken periodically and/or when triggered by particular events.

Abstract: This document discusses, among other things, a communication circuit for an IMD comprising a radio frequency (RF) modulator to modulate and demodulate IMD data signals, first and second serial buffer registers to store received demodulated data and to store transmit data for modulation and configured to operate according to a first clock signal, and a parallel buffer register to receive data in parallel from the first and second serial buffer registers and configured to operate according to a second clock signal that is slower than the first clock signal. The communication circuit also includes a telemetry control circuit configured to, when in the receive mode, alternate between serially receiving data into the first serial buffer register while the parallel buffer receives data from the second serial buffer register, and serially receiving data into the second serial buffer register while the parallel buffer receives data from the first serial buffer.

Abstract: A method comprising providing a programmable non-volatile memory (PNVM) circuit fabricated together with a processor on an integrated circuit chip (IC) in an implantable medical device (IMD), partitioning the PNVM circuit into a plurality of portions based on how often that the processor accesses a portion, and selectively providing power or selectively restricting power to one or more of the portions according to how often that the processor accesses a portion.

Abstract: An implantable medical device may have a circuit failure mode. The disclosed circuit may have an integrated failure point designed to fail prior to those portions of the circuit. The integrated failure point may include a narrowed portion of a high voltage lead and a grounded lead having a narrow gap separating the grounded lead from the narrowed portion of the high voltage lead. During a high stress fault condition the narrowed portion of the high voltage lead acts as a fuse, forming a vaporized cloud of metal, which shorts current in the high voltage lead across the narrow gap to the grounded lead, thus protecting the remaining portion of the circuit from the high stress condition.

Abstract: A depolarization sensing threshold can be determined using an amplitude-limited portion of a cardiac signal received using an implantable medical device. One or more cardiac depolarizations can be detected using the cardiac signal and the depolarization sensing threshold.

Abstract: An apparatus comprises an electrostimulation energy storage capacitor, a circuit path communicatively coupled to the electrostimulation energy storage capacitor and configured to provide quasi-constant current neural stimulation through a load from the electrostimulation energy storage capacitor, a current measuring circuit communicatively coupled to the circuit path and configured to obtain a measure of quasi-constant current delivered to the load, and a control circuit communicatively coupled to the current measuring circuit, wherein the control circuit is configured to initiate adjustment of the voltage level of the storage capacitor for a subsequent delivery of quasi-constant current according to a comparison of the measured load current to a specified load current value.

Abstract: An implantable medical device such as a cardiac pacemaker or implantable cardioverter/defibrillator with the capability of storing body temperature measurements taken periodically and/or when triggered by particular events.

Abstract: An implantable medical device such as a cardiac pacemaker or implantable cardioverter/defibrillator with the capability of storing body temperature measurements taken periodically and/or when triggered by particular events.

Abstract: An implantable medical device comprising a far field RF transmitter and receiver, a controller circuit communicatively coupled to the RF transmitter and receiver, and a wakeup timer circuit integral to, or communicatively coupled to, the controller. The controller is configured to initiate power up of the RF transmitter and receiver during a wakeup interval defined by the wakeup timer circuit, detect a digital key received from a second device during the wakeup interval, transmit a response using the RF transmitter when the digital key is received, and receive a communication from the second device and resynchronize the wake-up timer according to a time of the communication.

Abstract: A method comprising providing a programmable non-volatile memory (PNVM) circuit fabricated together with a processor on an integrated circuit chip (IC) in an implantable medical device (IMD), partitioning the PNVM circuit into a plurality of portions based on how often that the processor accesses a portion, and selectively providing power or selectively restricting power to one or more of the portions according to how often that the processor accesses a portion.

Abstract: A system comprising an implantable medical device (IMD). The IMD includes a processor fabricated on an integrated circuit chip (IC), a random access memory (RAM) circuit fabricated on the same IC, and a programmable non-volatile memory (PNVM) circuit also fabricated on the same IC.

Abstract: An implantable medical device may have a circuit failure mode. The disclosed circuit may have an integrated failure point designed to fail prior to those portions of the circuit. The integrated failure point may include a narrowed portion of a high voltage lead and a grounded lead having a narrow gap separating the grounded lead from the narrowed portion of the high voltage lead. During a high stress fault condition the narrowed portion of the high voltage lead acts as a fuse, forming a vaporized cloud of metal, which shorts current in the high voltage lead across the narrow gap to the grounded lead, thus protecting the remaining portion of the circuit from the high stress condition.

Abstract: An implantable medical device may have a circuit failure mode. The disclosed circuit may have an integrated failure point designed to fail prior to those portions of the circuit. The integrated failure point may include a narrowed portion of a high voltage lead and a grounded lead having a narrow gap separating the grounded lead from the narrowed portion of the high voltage lead. During a high stress fault condition the narrowed portion of the high voltage lead acts as a fuse, forming a vaporized cloud of metal, which shorts current in the high voltage lead across the narrow gap to the grounded lead, thus protecting the remaining portion of the circuit from the high stress condition.

Abstract: An implantable medical device comprising a far field RF transmitter and receiver, a controller circuit communicatively coupled to the RF transmitter and receiver, and a wakeup timer circuit integral to, or communicatively coupled to, the controller. The controller is configured to initiate power up of the RF transmitter and receiver during a wakeup interval defined by the wakeup timer circuit, detect a digital key received from a second device during the wakeup interval, transmit a response using the RF transmitter when the digital key is received, and receive a communication from the second device and resynchronize the wake-up timer according to a time of the communication.

Abstract: A telemetry system enabling radio frequency (RF) communications between an implantable medical device and an external device, or programmer, in which the RF circuitry is normally maintained in a powered down state in order to conserve power. At synchronized wakeup intervals, one of the devices designated as a master device powers up its RF transmitter to request a communications session, and the other device designated as a slave device powers up its RF transmitter to listen for the request. Telemetry is conducted using a far field or near field communication link.

Abstract: This document discusses, among other things, a communication circuit for an IMD comprising a radio frequency (RF) modulator to modulate and demodulate IMD data signals, first and second serial buffer registers to store received demodulated data and to store transmit data for modulation and configured to operate according to a first clock signal, and a parallel buffer register to receive data in parallel from the first and second serial buffer registers and configured to operate according to a second clock signal that is slower than the first clock signal. The communication circuit also includes a telemetry control circuit configured to, when in the receive mode, alternate between serially receiving data into the first serial buffer register while the parallel buffer receives data from the second serial buffer register, and serially receiving data into the second serial buffer register while the parallel buffer receives data from the first serial buffer.