Abstract: The invention provides an apparatus, system, and method for cluster-wide peer recovery in the event of a computer failure. A failure of a first computer is detected and a recovery module is registered as the first computer. In one embodiment, the recovery module is a peer computer. The recovery module retrieves a privately held undo log data through the authorized assumption of the failure identity associated with the failed first computer, backs out in-flight transaction updates of the first computer, and frees up data resources locked by the first computer.

Abstract: A computer implemented method, data processing system, and computer usable code are provided for burn-in testing of a multiprocessor. A process identifies a power management data set for a plurality of processor cores associated with the multiprocessor. The process selects one or more of the plurality of processor cores to form a selected set of processor cores based upon the power management data set. The process initiates a burn-in test across the selected set of processor cores. In response to a determination that all processor cores in the plurality of processor cores have not been selected, the process repeats the above selecting and initiating steps until all the processor cores have been selected.

Abstract: A method and apparatus tracks packets and reliably transmits data over a computer transmission system with a reduced amount of memory needed in the transmission interface. The invention eliminates the need to keep all the packets of data queued until the acknowledge message for that data has arrived. Instead, it keeps track of how many packets have been sent and which packets correspond to the end of a message, marking them off when acknowledge messages are received. If packets are lost, the invention determines which packet were lost, backs up to the lost packet, re-fetches the data and resends it. Embodiments of the present invention eliminate the need to queue packets, reducing silicon size and allowing the available bandwidth of the output bus to be more fully utilized.

Abstract: A system and method to optimize multi-core microprocessor performance using voltage offsets is presented. A multi-core device tests each of its processor cores in order to identify each processor core's optimum supply voltage. In turn, the device configures voltage offset networks for each processor core based upon each processor core's identified optimum supply voltage. As a result, the offset voltages produced by the voltage offset networks are subtracted from the multi-core device's main voltage, which results in the voltage offset networks supplying optimum supply voltages to each processor core. The voltage offset networks may include fuses to generate a fixed voltage offset, or the voltage offset networks may include a control circuit to dynamically adjust voltage offsets during the multi-core device's operation.

Abstract: The present invention relates to immobilized procainamide analogs, as well as to a method of making immobilized procainamide analogs. These immobilized analogs are prepared by activating the carboxyl group on a substituted p-benzoic acid derivative toward nucleophilic attack; reacting the activated benzoic acid derivative with a polyamine to produce the benzoic acid derivative of Formula 3: and binding the benzoic acid derivative of Formula 3 to a latex polymer having functional groups that react with aliphatic amino groups. A method of conducting an immunoassay using the immobilized procainamide analog Formula 3 is described, comprising the steps of preparing a solution comprising said immobilized procainamide analog; adding a sample suspected of containing procainamide to said solution; adding an anti-procainamide antibody to said solution and observing the rate of increase in solution turbidity following antibody addition.

Abstract: A method and apparatus tracks packets and reliably transmits data over a computer transmission system with a reduced amount of memory needed in the transmission interface. The invention eliminates the need to keep all the packets of data queued until the acknowledge message for that data has arrived. Instead, it keeps track of how many packets have been sent and which packets correspond to the end of a message, marking them off when acknowledge messages are received. If packets are lost, the invention determines which packet were lost, backs up to the lost packet, re-fetches the data and resends it. Embodiments of the present invention eliminate the need to queue packets, reducing silicon size and allowing the available bandwidth of the output bus to be more fully utilized.

Abstract: Concurrent read access and exclusive write access are provided in a shared memory architecture to permit one or more devices in the shared memory architecture to maintain read access to a block of memory such as a cache line while one device has exclusive permission to modify that block of memory. By doing so, a device that has permission to modify may make updates to its copy of the block of memory without invalidating other copies of the block of memory, and potentially enabling other devices to continue to read data from their respective copies of the block of memory without having to retrieve the updated copy of the block of memory.

Abstract: An apparatus, system and method for providing multiple logical partitions in a system area network are provided Logical partitioning support is provided for host channel adapters which allows multiple operating systems to share the resources of a single physical host channel adapter (HCA). The apparatus, system and method ensures that each operating system is unaware that the HCA hardware resources are being shared with other operating systems and further guarantees that the individual operating systems are prevented from accessing HCA hardware resources which are associated with other operating systems.

Abstract: The invention provides an apparatus, system, and method for cluster-wide peer recovery in the event of a computer failure. A failure of a first computer is detected and a recovery module is registered as the first computer. In one embodiment, the recovery module is a peer computer. The recovery module retrieves a privately held undo log data through the authorized assumption of the failure identity associated with the failed first computer, backs out in-flight transaction updates of the first computer, and frees up data resources locked by the first computer.

Abstract: A method for manufacturing a turbine nozzle assembly using a fixture includes providing a first position of the fixture, positioning at least one datum of the turbine nozzle assembly adjacent at least one datum location point on the fixture when the fixture is in the first position, coupling the turbine nozzle assembly to the fixture when the fixture is in the first position, rotating the fixture from the first position into a second position that facilitates manufacturing the turbine nozzle assembly, and performing a manufacturing process on the turbine nozzle assembly when the fixture is in the second position.

Abstract: A method for removably holding an electrode for use in an electric-discharge machining (EDM) apparatus including a tool holder having an expandable collet. The method includes providing the collet in an unclamped position, receiving at least a portion of the electrode within an opening of the collet, and moving the collet to a clamped position using at least one of electrical, pneumatic, and hydraulic power, wherein in the clamped position the collet exerts a radially inward force around a circumference of the electrode to facilitate fixedly holding the electrode.

Abstract: A method, apparatus and computer program product are provided for implementing dynamic Virtual Lane buffer reconfiguration in a channel adapter. A first register is provided for communicating an adapter buffer size and allocation capability for the channel adapter. At least one second register is provided for communicating a current port buffer size and one second register is associated with each physical port of the channel adapter. A plurality of third registers is provided for communicating a current VL buffer size, and one third register is associated with each VL of each physical port of the channel adapter. The second register is used for receiving change requests for adjusting the current port buffer size for an associated physical port. The third register is used for receiving change requests for adjusting the current VL buffer size for an associated VL.

Abstract: Installation and method for performing a financial service comprising the following steps: (a) calculation of at least one inflation correction value for a desired coupon value CV in a year i making use of the coupon value CV and of future index data Ii; (b) calculation of a cash value of the at least one inflation correction value for the coupon value CV in year i making use of the coupon value CV, the future index data Ii and the interest rates inti; (c) presentation of a purchase price to a purchaser at which the at least one inflation correction value for the coupon value CV, or a portion thereof, can be purchased.

Abstract: The invention comprises an electronically secured inter-processor and virtual device communications system, with an input/output controller board, a multi-drop bus interface to multiple devices, and a parallel interface to an industry standard single board computer. The invention assigns a bus address and virtual identification number to each device and controls communications between the main central processing unit and the devices through a Plug-n-Play protocol.

Abstract: A fabric conditioning article for use in a clothes dryer. The fabric conditioning article having a flexible sheet and a fabric conditioning composition deposited on the sheet. The fabric conditioning composition includes a fabric conditioning agent, perfumed particles and minor components. The perfume particles are a perfume composition incorporated into a porous mineral carrier such as clay and/or zeolite. Optionally, the perfume composition comprises low levels of unstable perfume components. Alternatively, the perfumed particles have a coating material encapsulating at least a portion of the particles. Optionally, the articles are packaged in a container having a moisture barrier to prevent premature release of the perfume therefrom.

Abstract: A high-speed switching system and method are presented, wherein an n-to-1 switch is configured to receive n data inputs, choose a single data output from the received n data inputs, and output the chosen data output. In a preferred embodiment, the system is configured as a modular system having multiple 2-to-1 switches that are cascaded together in binary-tree fashion, thereby allowing for a simpler implementation over a wide range of n. The system and method also provide an approach for providing a data valid signal, which indicates whether or not the chosen data output is expected.

Abstract: Clear, or translucent fabric softener compositions comprise fabric softener compound, principal solvent system, and high electrolyte levels. The high electrolyte level allows for a broader range of principal solvents to be used and/or reduces the incidence of increased viscosity when low levels of principal solvent are used. Phase stabilizers which are primarily ethoxylated hydrophobic materials can be used to reduce the amount of principal solvent that is needed and/or to stabilize the compositions in the presence of the highest levels of electrolyte. Specific phase stabilizers provide additional benefits including improved softening. Specific electrolytes provide improved results. Addition of primary solvents and/or phase stabilizers to the softener compounds can improve the viscosity/handling of the compounds and the ability to create the finished compositions.

Abstract: An apparatus, system and method for controlling access to facilities based on usage class of a requestor are provided. With the apparatus, system and method, a two level protection mechanism is provided for protecting host channel adapter (HCA) facilities from unauthorized access. With the present invention, a first level of access is provided through virtual address translation and a mechanism for determining if the requestor of access may access a system memory address space page associated with a real address to which the virtual address maps. A second level of access is provided through the allocation of usage classes and determining a required usage class for accessing an HCA facility.

Abstract: Clear, or translucent fabric softener compositions comprise fabric softener compound, principal solvent system, and high electrolyte levels. The high electrolyte level allows for a broader range of principal solvents to be used and/or reduces the incidence of increased viscosity when low levels of principal solvent are used. Phase stabilizers which are primarily ethoxylated hydrophobic materials can be used to reduce the amount of principal solvent that is needed and/or to stabilize the compositions in the presence of the highest levels of electrolyte. Specific phase stabilizers provide additional benefits including improved softening. Specific electrolytes provide improved results. Addition of primary solvents and/or phase stabilizers to the softener compounds can improve the viscosity/handling of the compounds and the ability to create the finished compositions.

Abstract: An electronic Input/Output Interface and device abstraction system used in gaming machine includes: a game central processing unit (the game “CPU”); an intelligent input/output controller board (the “IOCB”); an Industry Standard Architecture PC bus “ISA” bus); and a framed message transport protocol. The IOCB facilitates the communications between the game CPU and virtual device services, which are peripheral devices associated with the gaming system. These include devices such as displays, buttons, hoppers, coin mechanisms and bill validators. The framed message transport protocol includes: a message header, a body containing a virtual device message, and a packet validation signature. The game CPU communicates to gaming peripherals by sending virtual device messages across the ISA bus to the IOCB. The IOCB then routes the virtual device message to the appropriate virtual device services.