Abstract: Methods for forming layers on a substrate having one or more features formed therein are provided herein. In some embodiments, a method for forming layers on a substrate having one or more features formed therein may include depositing a seed layer within the one or more features; and etching the seed layer to remove at least a portion of the seed layer proximate an opening of the feature such that the seed layer comprises a first thickness disposed on a lower portion of a sidewall of the feature proximate a bottom of the feature and a second thickness disposed on an upper portion of the sidewall proximate the opening of the feature and wherein the first thickness is greater than the second thickness.

Abstract: An apparatus and process are described that allow electroplating to fill sub-micron, high aspect ratio semiconductor substrate features using a non-copper/pre-electroplating layer on at least upper portions of side walls of the features, thereby providing reliable bottom up accumulation of the electroplating fill material in the feature. This apparatus and process eliminates feature filling material voids and enhances reliability of the electroplating in the diminishing size of features associated with future technology nodes of 22, 15, 11, and 8 nm. Modification of an upper portion of a metal seed layer allows for filling of the feature using electroplated fill material accumulating from the bottom of the feature up to reliability and predictability and substantially void-free.

Abstract: A halogen-free resin composition, a copper clad laminate using the same, and a printed circuit board using the same are introduced. The halogen-free resin composition comprising (A) 100 parts by weight of epoxy resin; (B) 3 to 15 parts by weight of diaminodiphenyl sulfone (DDS); and (C) 5 to 70 parts by weight of phenolic co-hardener. The halogen-free resin composition features specific ingredients and proportion to thereby achieve satisfactory maximum preservation period of the prepreg manufactured from the halogen-free resin composition, control the related manufacturing process better, and attain satisfactory laminate properties, such as a high degree of water resistance, a high degree of heat resistance, and satisfactory dielectric properties, and thus is suitable for producing a prepreg or a resin film to thereby be applicable to copper clad laminates and printed circuit boards.

Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.

Abstract: A halogen-free resin composition including (A) 100 parts by weight of polyphenylene ether resin containing an alkenyl group; (B) 10 to 50 parts by weight of cyclo olefin copolymer (COC); (C) 5 to 50 parts by weight of 1,2,4-trivinylcyclohexane resin and/or 1,3,5-triethyloxymethyl cyclohexane resin; and (D) 5 to 150 parts by weight of polyphenylene ether pre-polymerized branch cyanate ester. The halogen-free resin composition can manifest low dielectric constant, low dielectric dissipation factor, high heat resistance, and high glass transition temperature by using the specified ingredient in the specified ratio, thus can be used in preparing a prepreg or a resin film, which is applicable to copper clad laminates and printed circuit boards.

Abstract: A magnetron sputter reactor (410) and its method of use, in which SIP sputtering and ICP sputtering are promoted is disclosed. In another chamber (412) an array of auxiliary magnets positioned along sidewalls (414) of a magnetron sputter reactor on a side towards the wafer from the target is disclosed. The magnetron (436) preferably is a small one having a stronger outer pole (442) of a first polarity surrounding a weaker inner pole (440) of a second polarity all on a yoke (444) and rotates about the axis (438) of the chamber using rotation means (446, 448, 450). The auxiliary magnets (462) preferably have the first polarity to draw the unbalanced magnetic field (460) towards the wafer (424), which is on a pedestal (422) supplied with power (454). Argon (426) is supplied through a valve (428). The target (416) is supplied with power (434).

Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.

Abstract: An apparatus and process are described that allow electroplating to fill sub-micron, high aspect ratio semiconductor substrate features using a non-copper/pre-electroplating layer on at least upper portions of side walls of the features, thereby providing reliable bottom up accumulation of the electroplating fill material in the feature. This apparatus and process eliminates feature filling material voids and enhances reliability of the electroplating in the diminishing size of features associated with future technology nodes of 22, 15, 11, and 8 nm. The presence of non-copper pre-electroplating material on the side walls allows the feature whose side walls, but not bottom surface, are lined with such pre-electroplating material (such as cobalt) to fill the feature using electroplated fill material accumulating from the bottom of the feature up to reliability and predictability and substantially void-free.

Abstract: A plasma sputtering method for metal chalcogenides, such as germanium antimony telluride (GST), useful in forming phase-change memories. The substrate is held at a selected temperature at which the material deposits in either an amorphous or crystalline form. GST has a low-temperature amorphous range and a high-temperature crystalline range separated by a transition band of 105-120° C. Bipolar pulsed sputtering with less than 50% positive pulses of less than 10:s pulse width cleans the target while maintain the sputtering plasma. The temperature of chamber shields is maintained at a temperature favoring crystalline deposition or they may be coated with arc-spray aluminum or with crystallographically aligned copper or aluminum.

Abstract: Embodiments of the present invention generally relates to an apparatus and a method for processing semiconductor substrates. One embodiment provides a method provides a method for processing a substrate comprising forming a seed layer over a substrate having trench or via structures formed therein, coating a portion of the seed layer with an organic passivation film, and immersing the trench or via structures in a plating solution to deposit a conductive material over the seed layer not covered by the organic passivation film.

Abstract: Methods for forming layers on a substrate having one or more features formed therein are provided herein. In some embodiments, a method for forming layers on a substrate having one or more features formed therein may include depositing a seed layer within the one or more features; and etching the seed layer to remove at least a portion of the seed layer proximate an opening of the feature such that the seed layer comprises a first thickness disposed on a lower portion of a sidewall of the feature proximate a bottom of the feature and a second thickness disposed on an upper portion of the sidewall proximate the opening of the feature and wherein the first thickness is greater than the second thickness.

Abstract: Embodiments of the present invention generally relates to an apparatus and a method for processing semiconductor substrates. One embodiment provides a method provides a method for processing a substrate comprising forming a seed layer over a substrate having trench or via structures formed therein, coating a portion of the seed layer with an organic passivation film, and immersing the trench or via structures in a plating solution to deposit a conductive material over the seed layer not covered by the organic passivation film.

Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.

Abstract: A sputtering target for a sputtering chamber comprises a sputtering plate composed of a chalcogenide material comprising an average yield strength of from about 40 MPa to about 120 MPa and a thermal conductivity of at least about 2.8 W/(m·K). In one version the sputtering plate is composed of a chalcogenide material with a stoichiometric ratio that varies by less than about 5% throughout the body of the sputtering plate. In another version, the sputtering plate is composed of a chalcogenide material having an average grain size of at least 20 microns, and an oxygen content of less than 600 weight ppm. The sputtering target is sputtered by applying a pulsed DC voltage to the sputtering target.

Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.

Abstract: A plasma sputtering method for metal chalcogenides, such as germanium antimony telluride (GST), useful in forming phase-change memories. The substrate is held at a selected temperature at which the material deposits in either an amorphous or crystalline form. GST has a low-temperature amorphous range and a high-temperature crystalline range separated by a transition band of 105-120° C. Bipolar pulsed sputtering with less than 50% positive pulses of less than 10:s pulse width cleans the target while maintain the sputtering plasma. The temperature of chamber shields is maintained at a temperature favoring crystalline deposition or they may be coated with arc-spray aluminum or with crystallographically aligned copper or aluminum.

Abstract: A graphical user interface for an electronic apparatus such as a mobile terminal is presented. The graphical user interface gives a user access to a multi-level structure of selectable user interface items. The graphical user interface involves, on a display of the electronic apparatus, a focused region, an unfocused region and a descriptor region. The focused region presents a first plurality of user interface items belonging to a current level in said multi-level structure. The focused region has a focus area for focusing on a desired user interface item in response to user input on an input device of the electronic apparatus. The unfocused region presents a second plurality of user interface items belonging to at least one level superior to the current level in the multi-level structure. The descriptor region presents descriptive information about a currently focused user interface item in the focus area.

Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.

Abstract: An array of auxiliary magnets is disclosed that is positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target. The magnetron preferably is a small, strong one having a stronger outer pole of a first magnetic polarity surrounding a weaker outer pole of a second magnetic polarity and rotates about the central axis of the chamber. The auxiliary magnets preferably have the first magnetic polarity to draw the unbalanced magnetic field component toward the wafer. The auxiliary magnets may be either permanent magnets or electromagnets.

Abstract: A magnetron sputter reactor (410) and its method of use, in which SIP sputtering and ICP sputtering are promoted is disclosed. In another chamber (412) an array of auxiliary magnets positioned along sidewalls (414) of a magnetron sputter reactor on a side towards the wafer from the target is disclosed. The magnetron (436) preferably is a small one having a stronger outer pole (442) of a first polarity surrounding a weaker inner pole (440) of a second polarity all on a yoke (444) and rotates about the axis (438) of the chamber using rotation means (446, 448, 450). The auxiliary magnets (462) preferably have the first polarity to draw the unbalanced magnetic field (460) towards the wafer (424), which is on a pedestal (422) supplied with power (454). Argon (426) is supplied through a valve (428). The target (416) is supplied with power (434).