Abstract: A reference signal generator includes a voltage reference, an amplifier coupled to the voltage reference, and a precharge circuit coupled to the amplifier. The voltage reference is configured to generate a constant voltage. The amplifier is configured to receive the constant voltage from the voltage reference and generate a regulating primary output signal and a non-regulating secondary output signal. The precharge circuit is configured to charge a noise reduction capacitor with the non-regulating secondary output signal.

Abstract: A reference signal generator includes a voltage reference, an amplifier coupled to the voltage reference, and a precharge circuit coupled to the amplifier. The voltage reference is configured to generate a constant voltage. The amplifier is configured to receive the constant voltage from the voltage reference and generate a regulating primary output signal and a non-regulating secondary output signal. The precharge circuit is configured to charge a noise reduction capacitor with the non-regulating secondary output signal.

Abstract: A method of power delivery. Port controllers each include a state machine, an IO pin, a receptacle supply pin receiving power from a receptacle, and a gate driver pin coupled to a control node of a power path switch each having an output coupled to a load. The state machines implement a dead-battery control (DBC) algorithm upon sensing a DB condition. The DBC algorithm pulls up the IO pin, starts a timer for T1, and monitors the IO pin for T1. If the IO pin is pulled low, the port controller is reset for a pulled low period, the DBC algorithm is then restarted or its IO pin is monitored until not pulled low for T1. One port controller pulls its IO pin low for an assertion period to claim priority over the other port controller, and closes its associated power path switch to exclusively provide power to the load.

Abstract: A method of power delivery. Port controllers each include a state machine, an IO pin, a receptacle supply pin receiving power from a receptacle, and a gate driver pin coupled to a control node of a power path switch each having an output coupled to a load. The state machines implement a dead-battery control (DBC) algorithm upon sensing a DB condition. The DBC algorithm pulls up the IO pin, starts a timer for T1, and monitors the IO pin for T1. If the IO pin is pulled low, the port controller is reset for a pulled low period, the DBC algorithm is then restarted or its IO pin is monitored until not pulled low for T1. One port controller pulls its IO pin low for an assertion period to claim priority over the other port controller, and closes its associated power path switch to exclusively provide power to the load.

Abstract: An embodiment of the invention provides a method for continuously detecting when a USB client device may be charged according to a BCS charging standard. Power is supplied from a USB host device to the USB client device with a first current limit. Next, the USB host device monitors data lines D+ and D? for a first part of a handshake. When the first part of the handshake is detected, a second part of the handshake is provided by the USB host device indicating that the USB client device may be changed according to the BCS charging standard. All current sources and all voltage sources that are coupled to the data lines D+ and D? are decoupled from data lines D+ and D? after the handshake is complete. After the data lines are decoupled, communication may begin between the USB host device and the USB client device.

Abstract: Implementing a piecewise-polynomial-continuous function in a translinear circuit generally involves translinear elements that form translinear loops that are linked by a clamp transistor. A first translinear loop controls a first portion of the piecewise-polynomial-continuous function in a first area of operation. A second translinear loop controls a second portion of the piecewise-polynomial-continuous function in a second area of operation. When activated in the second area of operation, the clamp transistor draws current through one of the translinear elements without drawing current away from another translinear element of the translinear circuit.

Abstract: Implementing a piecewise-polynomial-continuous function in a translinear circuit generally involves translinear elements that form translinear loops that are linked by a clamp transistor. A first translinear loop controls a first portion of the piecewise-polynomial-continuous function in a first area of operation. A second translinear loop controls a second portion of the piecewise-polynomial-continuous function in a second area of operation. When activated in the second area of operation, the clamp transistor draws current through one of the translinear elements without drawing current away from another translinear element of the translinear circuit.

Abstract: An embodiment of the invention provides a method for continuously detecting when a USB client device may be charged according to a BCS charging standard. Power is supplied from a USB host device to the USB client device with a first current limit. Next, the USB host device monitors data lines D+ and D? for a first part of a handshake. When the first part of the handshake is detected, a second part of the handshake is provided by the USB host device indicating that the USB client device may be changed according to the BCS charging standard. All current sources and all voltage sources that are coupled to the data lines D+ and D? are decoupled from data lines D+ and D? after the handshake is complete. After the data lines are decoupled, communication may begin between the USB host device and the USB client device.

Abstract: Apparatus to compare an input signal to a threshold level are disclosed. An example circuit described herein includes a Widlar bandgap circuit to receive the input signal, an intermediate stage coupled with the output of the Widlar bandgap circuit, and a final stage coupled with the output of the intermediate stage, the final stage to provide an output based on the input signal and the threshold level.

Abstract: Apparatus to compare an input signal to a threshold level are disclosed. An example circuit described herein includes a Widlar bandgap circuit to receive the input signal, an intermediate stage coupled with the output of the Widlar bandgap circuit, and a final stage coupled with the output of the intermediate stage, the final stage to provide an output based on the input signal and the threshold level.

Abstract: A translinear network (34) has first (Q1, Q2, Q3, Q4) and second (Q4, Q3, Q5, Q6) translinear loops. A Trafton-Hastings clamp circuit (36) is connected to generate a piecewise-polynomial-continuous current IY, the value of which becomes undefined when current IX=0 due to a removable singularity in the transfer equation at this point. A current mirror (38) comprising a plurality of transistors (M1, M2, M3) is coupled to the Trafton-Hastings clamp circuit (36), and operates to add additional currents in transistors Q3 and Q5 to IX, when the Trafton-Hastings clamp transistor (Q7) conducts, so as to perturb the removable singularity in the transfer equation into the left half-plane.

Abstract: An amplifier (10?) has a first amplifier stage (14) for producing a control current (IX) in response to an input voltage. A second amplifier stage (16) has first (46) and second (38) transistors. The first transistor (46) is coupled to receive the control current (IX) and is operable to produce a control voltage. The second transistor (38) is coupled to receive the control voltage and operable to produce an output current. A nonlinear resistive element (50) is coupled to the first transistor (46) to add a nonlinear function of the control current (IX) to the control voltage. The nonlinear resistive element (50) may include a third transistor connected between the first transistor (46) and a reference potential, operable to receive the control current (IX) and to generate the nonlinear function thereof.

Abstract: An amplifier (10?) has a first amplifier stage (14) for producing a control current (IX) in response to an input voltage. A second amplifier stage (16) has first (46) and second (38) transistors. The first transistor (46) is coupled to receive the control current (IX) and is operable to produce a control voltage. The second transistor (38) is coupled to receive the control voltage and operable to produce an output current. A nonlinear resistive element (50) is coupled to the first transistor (46) to add a nonlinear function of the control current (IX) to the control voltage. The nonlinear resistive element (50) may include a third transistor connected between the first transistor (46) and a reference potential, operable to receive the control current (IX) and to generate the nonlinear function thereof.

Abstract: An apparatus for comparing an input voltage with a threshold voltage includes: (a) a first current mirror device that includes a first bipolar transistor with a first base and a first collector; the first base and the first collector establish a diode-connected first collector; the input voltage is received at the first current mirror device; (b) a second current mirror device that includes a second bipolar transistor with a second base and a second collector; the second base and the second collector establish a diode-connected second collector; (c) a first impedance coupled in series with the diode-connected first collector and the diode-connected second collector; and (d) a second impedance coupled between ground and the second current mirror device. The first and second current mirror devices are coupled with an output locus at which output signals appear to indicate relative voltage levels of the input and the threshold voltages.

Abstract: An amplifier (10?) has a first amplifier stage (14) for producing a control current (IX) in response to an input voltage. A second amplifier stage (16) has first (46) and second (38) transistors. The first transistor (46) is coupled to receive the control current (IX) and is operable to produce a control voltage. The second transistor (38) is coupled to receive the control voltage and operable to produce an output current. A nonlinear resistive element (50) is coupled to the first transistor (46) to add a nonlinear function of the control current (IX) to the control voltage. The nonlinear resistive element (50) may include a third transistor connected between the first transistor (46) and a reference potential, operable to receive the control current (IX) and to generate the nonlinear function thereof.

Abstract: The present invention comprises a circuit consisting of four transistors (101-104) and an optional clamping Zener (107) arranged such that the current drawn through a load (120) is equal to the lesser of an input current (106) and a reference current (105).

Abstract: The present invention comprises a circuit consisting of four transistors (101-104) and an optional clamping Zener (107) arranged such that the current drawn through a load (120) is equal to the lesser of an input current (106) and a reference current (105).

Abstract: A structure and method of minimizing package-shift effects in integrated circuits is implemented by using a thick metallic overcoat applied after the deposition and patterning of the conventional insulating protective overcoat. The metallic overcoat most preferably comprises a layer of electrolytically deposited copper approximately 15 &mgr;m thick that is patterned to provide for electrically independent regions; but an unbroken area of the metallic overcoat is left over any sensitive analog circuitry, such as a bandgap reference circuit. The thick metallic coating, in addition to minimizing package-shift effects, is also useful as a low-resistance routing layer. The metallic overcoat is sufficiently thin to allow low-profile packaging. The method employs a conductive overcoat that is significantly thin compared to conventional insulating conformal overcoats.

Abstract: An apparatus for comparing an input voltage with a threshold voltage includes: (a) a first current mirror device that includes a first bipolar transistor with a first base and a first collector; the first base and the first collector establish a diode-connected first collector; the input voltage is received at the first current mirror device; (b) a second current mirror device that includes a second bipolar transistor with a second base and a second collector; the second base and the second collector establish a diode-connected second collector; (c) a first impedance coupled in series with the diode-connected first collector and the diode-connected second collector; and (d) a second impedance coupled between ground and the second current mirror device. The first and second current mirror devices are coupled with an output locus at which output signals appear to indicate relative voltage levels of the input and the threshold voltages.

Abstract: Systems and methods are provided for limiting voltage to low-voltage devices employing a high-voltage supply. The systems and methods employ voltage limiting devices to bias cascode devices. The cascode devices are serially connected from a high-voltage supply to a low-voltage node. The voltage limiters are serially connected from the high-voltage supply to ground to bias the cascode devices. Current sources are connected in parallel with the voltage limiters except the one connected to ground. If the current sources are set to deliver substantially equal currents, then the order in which the cascode transistors are biased becomes nondeterministic, but the circuit continues to finction and the overall supply current is thereby minimized.