Abstract: A voltage-controlled three-terminal magnon transistor is provided, including a ferroelectric layer, a magnetic layer, a generation terminal, a control terminal, a detection terminal, and a bottom electrode. After a current is inputted into the generation terminal, a magnon is generated in the magnetic layer. The detection terminal is made of a heavy metal material, which can convert the magnon in the magnetic layer into a charge flow. When a voltage pulse applied between the control terminal and the bottom electrode exceeds a critical value, non-volatile polarization and non-volatile strain states of the ferroelectric layer change, which in turn affects a transmission capability of the magnon in the magnetic layer based on a magnetoelectric coupling effect between the ferroelectric layer and the magnetic layer. In addition, a voltage signal of the detection terminal exhibits a regular loop change behavior with a change of the voltage pulse.

Abstract: An antenna module includes: a first insulation medium substrate, including a first section provided with a first groove and a second section, where an integrated circuit is disposed in the first groove; a flexible substrate including a conductive structure, where the flexible substrate is stacked on the first insulation medium substrate, and a part that is of the flexible substrate and that is located between the first section and the second section is bendable; and an antenna structure, including a first metal structure that is disposed on the first section and that is connected to the conductive structure and the integrated circuit, and a second metal structure that is disposed on the second section and that is connected to the conductive structure. This avoids a warping problem caused by different thermal expansion coefficients of a plastic packaging material and a substrate, and reduces a risk of product failure.

Abstract: A near-field communication (NFC) apparatus includes a clock extractor configured to perform clock recovery based on a first carrier signal sent by an NFC card reader to obtain a field clock signal; a digital phase-locked loop configured to perform frequency tracking on the field clock signal to output a first clock signal; a digital baseband chip configured to perform load modulation based on the first clock signal to generate a second carrier signal; and a controller configured to detect a frequency or a phase of the field clock signal, and selectively perform open-loop control on the digital phase-locked loop based on a detection result.

Abstract: The embodiments of the present disclosure provide a method for positioning a target object. The method may include: determining an identification result by processing an image based on an identification model, wherein the identification result includes a first position of each of at least one target object in a first coordinate system; determining, from the image, a target image of each of the at least one target object based on the first position of each of the at least one target object in the first coordinate system; and determining, based on a first reference image and the target image of each of the at least one target object, a second position of each of the at least one target object in a second coordinate system, wherein the second position is configured to determine operation parameters of an operating device.

Abstract: The present disclosure relates to the field of communication technologies, and provide a near-field communication (NFC) chip, a phase synchronization method, and an electronic device, to quickly synchronize a transmitted signal of an NFC card device with a carrier of an NFC card reader. The NFC chip includes a processing circuit configured to: determine a first carrier frequency offset between a local clock signal and a carrier clock signal, and generate a first frequency control word based on the first carrier frequency offset. The carrier clock signal is determined based on a received signal received by the NFC chip. The NFC chip further includes a phase-locked loop configured to generate a first clock signal based on the local clock signal and the first frequency control word.

Abstract: An antenna module includes: a first insulation medium substrate, including a first section provided with a first groove and a second section, where an integrated circuit is disposed in the first groove; a flexible substrate including a conductive structure, where the flexible substrate is stacked on the first insulation medium substrate, and a part that is of the flexible substrate and that is located between the first section and the second section is bendable; and an antenna structure, including a first metal structure that is disposed on the first section and that is connected to the conductive structure and the integrated circuit, and a second metal structure that is disposed on the second section and that is connected to the conductive structure. This avoids a warping problem caused by different thermal expansion coefficients of a plastic packaging material and a substrate, and reduces a risk of product failure.

Abstract: A support device includes a support structure, a carrier assembly, and an elastic assembly. The carrier assembly is configured to support a display device. The carrier assembly ascends and descends relative to the support structure. The elastic assembly is connected to the support structure and the carrier assembly and provides different support forces to the carrier assembly to support display devices of different weights.

Abstract: The present disclosure provides an antenna packaging module and the making method. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a third packaging layer, and a packaging antenna connector to an external circuit board. The antenna structure includes a connector opening and at least a first antenna structure and a second antenna structure stacked on one surface of the redistribution layer. The packaging antenna connector is designed in the connector opening and is electrically connected to the redistribution layer. Electrical terminals are provided through the packaging antenna connector disposed in the connector opening, thus reducing the antenna signal loss. The antenna packaging module requires neither any metal wire ends electrically connected to redistribution layer, nor a flip-chip process.

Abstract: The application describes an antenna packaging module for a semiconductor chip and a method for making it. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a metal bump, a third packaging layer and a packaging antenna connector. The antenna structure comprises a connector opening, a first antenna structure and a second antenna structure stacked on the second surface of the redistribution layer. The packaging antenna connector is disposed in the connector opening, and is electrically connected to the redistribution layer. Electrical interconnection of packaging an antenna connector in a connector opening in the packaging layer, the antenna signal loss is reduced, and the overall e advantage of WLP AiP is further improved.

Abstract: The present invention proposes an O-band silicon-based high-speed semiconductor laser diode for optical communication and its manufacturing method, by using different buffer layers to form the growth surface of InP material with low dislocation density; N—InAlGaAs is used instead of conventional N—InAlAs electron-blocking layer in the epi-structure to reduce the barrier for electrons to enter the quantum wells from N-type and lower the threshold; a superlattice structure quantum barrier is used instead of a single layer barrier structure to improve the transport of heavy holes in the quantum wells; and the material structure is adjusted to achieve a reliable O-band high direct modulation speed semiconductor laser diode for optical communication on silicon substrate.

Abstract: A time-to-digital converter (TDC) is disclosed, which comprises a ring oscillator module and a digital error correction module. The ring oscillator module is configured to receive a sampling signal, an addressing signal, and a preset signal, and includes: a ring oscillator arranged with a plurality of inverters; a phase sampler configured to sample phase signals generated by the inverters for generating a first output signal; a counter clock generator configured to generate first and second clock signals; first and second counters configured to respectively generate first and second counter output signals; and a data sampler configured to sample the first and second counter output signals to respectively generate second and third output signals. The digital error correction module is arranged to process the first, second and third output signals for generating a digital signal.

Abstract: A method for processing signals or data liable to interference arising from the sharing of channels in multi-user transmissions is applied to a base station apparatus. The base station apparatus receives a codeword from a terminal apparatus, and decodes the received codeword using a parity check matrix. The base station apparatus 110 can determine whether interference exists in a signal or data by analyzing the received codeword, and terminates a decoding of the received codeword if interference is found.

Abstract: The present disclosure provides an antenna packaging module and the making method. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a third packaging layer, and a packaging antenna connector to an external circuit board. The antenna structure includes a connector opening and at least a first antenna structure and a second antenna structure stacked on one surface of the redistribution layer. The packaging antenna connector is designed in the connector opening and is electrically connected to the redistribution layer. Electrical terminals are provided through the packaging antenna connector disposed in the connector opening, thus reducing the antenna signal loss. The antenna packaging module requires neither any metal wire ends electrically connected to redistribution layer, nor a flip-chip process.

Abstract: The application describes an antenna packaging module for a semiconductor chip and a method for making it. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a metal bump, a third packaging layer and a packaging antenna connector. The antenna structure comprises a connector opening, a first antenna structure and a second antenna structure stacked on the second surface of the redistribution layer. The packaging antenna connector is disposed in the connector opening, and is electrically connected to the redistribution layer. Electrical interconnection of packaging an antenna connector in a connector opening in the packaging layer, the antenna signal loss is reduced, and the overall e advantage of WLP AiP is further improved.

Abstract: The present invention provides a hexa-lactoside-triazanonane triacetic acid (NOTA) derivative, a method for radiolabeling a hexa-lactoside positron emission tomography (PET) imaging agent for a liver receptor with Ga-68, and a hexa-lactoside PET imaging agent for a liver receptor. The hexa-lactoside-NOTA derivative is a conjugate of six chains of lactose with NOTA obtained by conjugating hexa-lactoside to a chelating agent p-thiocyanate-benzyl-triazanonane diacetic acid-glutamic acid in the presence of triethyl amine/dimethyl formamide as a solvent. The radiolabeling method comprises labeling with Ga-68 at room temperature. According to the present invention, the labeling effect is stable, the labeling efficiency of the labeled product is greater than 95%, the labeled product is highly stable and the radiochemical purity is still greater than 90% after 4 hours.

Abstract: A digital-to-time converter (DTC) assisted all digital phase locked loop (ADPLL) circuit is disclosed, which comprises: a DTC error compensator arranged to receive a phase offset signal being a processed output from a time-to-digital converter (TDC) circuit, the phase offset signal includes a DTC error corresponding to a phase difference between a reference clock signal processed by a DTC circuit and a feedback clock signal derived from an output signal of the ADPLL circuit. The compensator is arranged to process the phase offset signal for generating a digital signal representative of the DTC error, which is provided as an output signal. Also, the output signal is arranged to be subtracted from the phase offset signal to obtain a phase rectified signal of the phase offset signal.

Abstract: A digital-to-time converter (DTC) assisted all digital phase locked loop (ADPLL) circuit is disclosed, which comprises: a DTC error compensator arranged to receive a phase offset signal being a processed output from a time-to-digital converter (TDC) circuit, the phase offset signal includes a DTC error corresponding to a phase difference between a reference clock signal processed by a DTC circuit and a feedback clock signal derived from an output signal of the ADPLL circuit. The compensator is arranged to process the phase offset signal for generating a digital signal representative of the DTC error, which is provided as an output signal. Also, the output signal is arranged to be subtracted from the phase offset signal to obtain a phase rectified signal of the phase offset signal.

Abstract: A time-to-digital converter (TDC) is disclosed, which comprises a ring oscillator module and a digital error correction module. The ring oscillator module is configured to receive a sampling signal, an addressing signal, and a preset signal, and includes: a ring oscillator arranged with a plurality of inverters; a phase sampler configured to sample phase signals generated by the inverters for generating a first output signal; a counter clock generator configured to generate first and second clock signals; first and second counters configured to respectively generate first and second counter output signals; and a data sampler configured to sample the first and second counter output signals to respectively generate second and third output signals. The digital error correction module is arranged to process the first, second and third output signals for generating a digital signal.

Abstract: A multi-arm hanging rail type casting cleaning robot comprises a traveling device, a rotating device, a lifting device, a working arm mounting seat, and four working arms mounted on an annular rail, wherein in addition to pneumatic grippers and magnetic cranes, cleaning tools such as pneumatic air picks and plasma cutters are further provided on end effecters of the working arms. The traveling device of the present invention adopts a four-point hanging supporting mode to realize long-distance stable traveling. Large arm adjusting cylinders and small arm adjusting cylinders are used to replace servo reducing motors to adjust postures of the working arms. The four working arms can jointly and synchronously work. The two pneumatic grippers, the two magnetic cranes, and the four cleaning tools can be flexibly transformed and replaced. The needs of cleaning operations can be satisfied.