Patents by Inventor Ryohei GEJO

Ryohei GEJO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11462633
    Abstract: A semiconductor device includes first and second electrode, a semiconductor part therebetween, and first and second control electrode. The first control electrode is provided in a first trench between the first electrode and the semiconductor part. The second control electrode is provided in a second trench between the second electrode and the semiconductor part. The semiconductor part includes first, third, fifth and sixth layers of a first conductivity type and second and fourth layers of a second conductivity type. The second layer is provided the first layer and the first electrode. The third layer is provided between the second layer and the first electrode. The fourth layer is provided between the first layer and the second electrode. The sixth layer is provided between the first layer and the second electrode. The second electrode is electrically connected to the first layer via a first-conductivity-region including the sixth layer.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: October 4, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryohei Gejo, Tatsunori Sakano, Tomoaki Inokuchi
  • Publication number: 20220293785
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a conductive member, a semiconductor member, and an insulating member. The conductive member includes a conductive member end portion and a conductive member other-end portion. The conductive member end portion is between the first electrode and the conductive member other-end portion. The conductive member is electrically connected with one of the second electrode or the third electrode. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first and second partial regions. The first partial region is between the first and second electrodes. The second semiconductor region is between the first partial region and the third semiconductor region. The third semiconductor region is electrically connected with the second electrode.
    Type: Application
    Filed: August 6, 2021
    Publication date: September 15, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke KOBAYASHI, Tomoaki INOKUCHI, Hiro GANGI, Hiroki NEMOTO, Akihiro GORYU, Ryohei GEJO, Tsuyoshi KACHI, Tatsuya NISHIWAKI
  • Publication number: 20220246606
    Abstract: A semiconductor device includes a semiconductor part, first and second electrodes, a control electrode and a control interconnect. The semiconductor part includes first to sixth layers and is provided between the first and second electrodes. The second layer is provided between the first layer and the second electrode. The third layer is provided between the second layer and the second electrode. The fourth and fifth layers are arranged between the first layer and the first electrode. The second electrode and the control interconnect are arranged on the semiconductor part. The control electrode is provided between the second electrode and the semiconductor part. The sixth layer is provided between the first layer and the control interconnect. The fifth semiconductor layer is provided between the first electrode and the sixth layer. The first semiconductor layer includes a carrier trap provided between the fifth and sixth layers.
    Type: Application
    Filed: September 10, 2021
    Publication date: August 4, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryohei GEJO, Akiyo MINAMIKAWA, Shigeaki HAYASE
  • Patent number: 11380790
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, and third semiconductor regions, a first member, and a first insulating member. A direction from the first electrode toward the second electrode is along a first direction. The first semiconductor region includes first, second, and third partial regions. A second direction from the second partial region toward the first partial region crosses the first direction. The third partial region is between the second partial region and the second semiconductor region in the first direction. The third semiconductor region is provided between the third partial region and the second semiconductor region. The first insulating member includes a first insulating region and a second insulating region. The first insulating region is between the third partial region and the first member. The second insulating region is between the third semiconductor region and the third electrode.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: July 5, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke Kobayashi, Hiro Gangi, Tomoaki Inokuchi, Ryohei Gejo
  • Patent number: 11374563
    Abstract: A semiconductor device includes first and second electrodes, a semiconductor part therebetween and first to third control electrodes between the first electrode and the semiconductor part. The semiconductor part includes first and third layers of a first-conductivity-type and second and fourth layers of a second-conductivity-type. The second, third and fourth layers are provided between the first layer and the first electrode, between the second layer and the first electrode, and between the first layer and the second electrode, respectively. To the first to third control electrodes, first to third voltages greater than the threshold voltage thereof are applied at first to third timings, respectively. The third, second and first voltages are reduced to a lower level than the threshold voltage at a fourth timing after the first to third timings, at a fifth timing after the fourth timing and at a sixth timing after the fifth timing, respectively.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: June 28, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsunori Sakano, Ryohei Gejo
  • Publication number: 20220190154
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a first conductive member, a semiconductor member, and a first insulating member. The third electrode includes a third electrode end portion and a third electrode other-end portion. The first conductive member includes a first conductive member end portion and a first conductive member other-end portion. The first conductive member is electrically connected with one of the second electrode or the third electrode. The semiconductor member includes first to fourth semiconductor regions. The first semiconductor region includes first and second partial regions. The third semiconductor region is electrically connected with the second electrode. The fourth semiconductor region is electrically connected with the first electrode. At least a portion of the first insulating member is between the semiconductor member and the third electrode and between the semiconductor member and the first conductive member.
    Type: Application
    Filed: August 5, 2021
    Publication date: June 16, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke KOBAYASHI, Akihiro GORYU, Ryohei GEJO, Hiro GANGI, Tomoaki INOKUCHI, Shotaro BABA, Tatsuya NISHIWAKI, Tsuyoshi KACHI
  • Patent number: 11335787
    Abstract: A semiconductor device includes first and second electrodes, a semiconductor part between the first and second electrodes, first to third control electrodes between the semiconductor part and the first electrode, first and second control terminals electrically connected respectively to the first and second control electrodes. The first to third control electrodes each are provided in a trench of the semiconductor part. The third control electrode is provided between the first and second control electrodes. The semiconductor part includes first and third layers of a first conductivity type, and second and fourth layers of a second conductivity type. The second layer is provided between the first layer and the first electrode. The third layer is selectively provided between the second layer and the first electrode. The fourth layer is provided between the first layer and the second electrode. The first electrode is electrically connected to the second and third layers.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: May 17, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsunori Sakano, Ryohei Gejo
  • Publication number: 20220140120
    Abstract: According to one embodiment, a semiconductor device includes first to fourth electrodes, a semiconductor member, and first and second insulating members. The semiconductor member is located between the second and first electrodes, and includes a first semiconductor region a second semiconductor region between the first semiconductor region and the first electrode, a third semiconductor region between the second semiconductor region and the first electrode, a fourth semiconductor region between the second semiconductor region and the first electrode, a fifth semiconductor region between the first semiconductor region and the second electrode, a sixth semiconductor region between the fifth semiconductor region and the second electrode, and a seventh semiconductor region between the fifth semiconductor region and the second electrode. A portion of the first insulating member is between the third electrode and the semiconductor member.
    Type: Application
    Filed: August 25, 2021
    Publication date: May 5, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryohei GEJO, Tatsunori SAKANO, Takahiro KATO
  • Patent number: 11296076
    Abstract: A semiconductor device includes a first electrode on a first surface of a semiconductor part, a second electrode on a second surface opposite to the first surface, and first and second control electrodes in trenches, respectively, at a first surface side. The semiconductor part includes first to sixth layers. The second and third layers of a second conductivity type are selectively provided between the first layer of a first conductivity type and the first electrode. The third layer includes a second conductivity type impurity with a higher concentration than a concentration of a second-conductivity-type impurity in the second layer. The fourth layer of the first conductivity type is selectively provided between the second layer and the first electrode. The fifth layer of the second conductivity type and the sixth layer of the first conductivity type are selectively provided between the first layer and the second electrode.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: April 5, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryohei Gejo, Tatsunori Sakano
  • Publication number: 20210391458
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, first and second electrodes, a gate electrode, a gate terminal, a first conductive member, a first terminal, and a first insulating member. The semiconductor member includes first and second semiconductor regions, and a third semiconductor region provided between the first and second semiconductor regions. The first electrode is electrically connected to the first semiconductor region. The second electrode is electrically connected to the second semiconductor region. The gate terminal is electrically connected to the gate electrode. The first conductive member is electrically insulated from the first and second electrodes, and the gate electrode. The first terminal is electrically connected to the first conductive member.
    Type: Application
    Filed: February 9, 2021
    Publication date: December 16, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke KOBAYASHI, Tatsunori SAKANO, Hiro GANGI, Tomoaki INOKUCHI, Takahiro KATO, Yusuke HAYASHI, Ryohei GEJO, Tatsuya NISHIWAKI
  • Publication number: 20210281258
    Abstract: A semiconductor device includes first and second electrodes, a semiconductor part therebetween and first to third control electrodes between the first electrode and the semiconductor part. The semiconductor part includes first and third layers of a first-conductivity-type and second and fourth layers of a second-conductivity-type. The second, third and fourth layers are provided between the first layer and the first electrode, between the second layer and the first electrode, and between the first layer and the second electrode, respectively. To the first to third control electrodes, first to third voltages greater than the threshold voltage thereof are applied at first to third timings, respectively. The third, second and first voltages are reduced to a lower level than the threshold voltage at a fourth timing after the first to third timings, at a fifth timing after the fourth timing and at a sixth timing after the fifth timing, respectively.
    Type: Application
    Filed: September 4, 2020
    Publication date: September 9, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsunori SAKANO, Ryohei GEJO
  • Publication number: 20210242341
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, and third semiconductor regions, a first member, and a first insulating member. A direction from the first electrode toward the second electrode is along a first direction. The first semiconductor region includes first, second, and third partial regions. A second direction from the second partial region toward the first partial region crosses the first direction. The third partial region is between the second partial region and the second semiconductor region in the first direction. The third semiconductor region is provided between the third partial region and the second semiconductor region. The first insulating member includes a first insulating region and a second insulating region. The first insulating region is between the third partial region and the first member. The second insulating region is between the third semiconductor region and the third electrode.
    Type: Application
    Filed: September 9, 2020
    Publication date: August 5, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke KOBAYASHI, Hiro GANGI, Tomoaki INOKUCHI, Ryohei GEJO
  • Publication number: 20210242336
    Abstract: A semiconductor device includes first and second electrode, a semiconductor part therebetween, and first and second control electrode. The first control electrode is provided in a first trench between the first electrode and the semiconductor part. The second control electrode is provided in a second trench between the second electrode and the semiconductor part. The semiconductor part includes first, third, fifth and sixth layers of a first conductivity type and second and fourth layers of a second conductivity type. The second layer is provided the first layer and the first electrode. The third layer is provided between the second layer and the first electrode. The fourth layer is provided between the first layer and the second electrode. The sixth layer is provided between the first layer and the second electrode. The second electrode is electrically connected to the first layer via a first-conductivity-region including the sixth layer.
    Type: Application
    Filed: September 9, 2020
    Publication date: August 5, 2021
    Inventors: Ryohei GEJO, Tatsunori SAKANO, Tomoaki INOKUCHI
  • Publication number: 20210134991
    Abstract: A semiconductor device includes first and second electrodes, a semiconductor part therebetween, and a control electrode between the semiconductor part and the first electrode. The semiconductor part includes first, third and fifth layers of a first conductivity type and second and fourth layers of a second conductivity type. The second layer is provided between the first layer and the first electrode. The third layer is provided between the second layer and the first electrode. The fourth layer and the fifth layer are selectively provided between the first layer and the second electrode. In a method for controlling the semiconductor device, first to third voltages are applied in order to the control electrode while a p-n junction between the first and second layers is biased in a forward direction. The second and third voltages are greater than the first voltage, and the third voltage is less than the second voltage.
    Type: Application
    Filed: September 9, 2020
    Publication date: May 6, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryohei GEJO, Tatsunori SAKANO
  • Publication number: 20210134791
    Abstract: A semiconductor device includes a first electrode on a first surface of a semiconductor part, a second electrode on a second surface opposite to the first surface, and first and second control electrodes in trenches, respectively, at a first surface side. The semiconductor part includes first to sixth layers. The second and third layers of a second conductivity type are selectively provided between the first layer of a first conductivity type and the first electrode. The third layer includes a second conductivity type impurity with a higher concentration than a concentration of a second-conductivity-type impurity in the second layer. The fourth layer of the first conductivity type is selectively provided between the second layer and the first electrode. The fifth layer of the second conductivity type and the sixth layer of the first conductivity type are selectively provided between the first layer and the second electrode.
    Type: Application
    Filed: September 9, 2020
    Publication date: May 6, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryohei GEJO, Tatsunori SAKANO
  • Publication number: 20210126100
    Abstract: A semiconductor device includes first and second electrodes, a semiconductor part between the first and second electrodes, first to third control electrodes between the semiconductor part and the first electrode, first and second control terminals electrically connected respectively to the first and second control electrodes. The first to third control electrodes each are provided in a trench of the semiconductor part. The third control electrode is provided between the first and second control electrodes. The semiconductor part includes first and third layers of a first conductivity type, and second and fourth layers of a second conductivity type. The second layer is provided between the first layer and the first electrode. The third layer is selectively provided between the second layer and the first electrode. The fourth layer is provided between the first layer and the second electrode. The first electrode is electrically connected to the second and third layers.
    Type: Application
    Filed: September 8, 2020
    Publication date: April 29, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsunori SAKANO, Ryohei GEJO
  • Publication number: 20200295133
    Abstract: According to one embodiment, a semiconductor device include first and second electrodes, first, second, third, fourth, fifth, and sixth semiconductor regions, a gate electrode, and an interconnect portion. The first semiconductor region is provided on the first electrode. The second semiconductor region is electrically connected to the first electrode and provided around the first semiconductor region. The third semiconductor region is provided on the first and second semiconductor regions. The fourth semiconductor region is provided on a portion of the third semiconductor region. The fifth semiconductor region is provided selectively on the fourth semiconductor region. The gate electrode opposes the fifth and fourth semiconductor regions, and the portion. The sixth semiconductor region is provided on another portion of the third semiconductor region. The second electrode is provided on the fourth and fifth semiconductor regions. The interconnect portion is electrically connected to the gate electrode.
    Type: Application
    Filed: August 26, 2019
    Publication date: September 17, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Akiyo KAWAKAMI, Ryohei GEJO
  • Publication number: 20200294873
    Abstract: A semiconductor device includes upper and lower electrode plates, and semiconductor elements therebetween. First and second metal plates are disposed between the upper electrode plate and a first semiconductor element, and between the upper electrode plate and a second semiconductor element, respectively. The first semiconductor element is disposed between central portions of the upper and lower electrode plates. The upper electrode plate includes a first upper pole electrically connected to the first semiconductor element and a second upper pole electrically connected to the second semiconductor element. A first total length is a sum of a height of the first upper pole and thicknesses of the first semiconductor element and the first metal plate. A second total length longer than the first total length is a sum of a height of the second upper pole and thicknesses of the second semiconductor element and the second metal plate.
    Type: Application
    Filed: June 7, 2019
    Publication date: September 17, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Ryohei GEJO
  • Patent number: 10756181
    Abstract: According to one embodiment, a semiconductor device include first and second electrodes, first, second, third, fourth, fifth, and sixth semiconductor regions, a gate electrode, and an interconnect portion. The first semiconductor region is provided on the first electrode. The second semiconductor region is electrically connected to the first electrode and provided around the first semiconductor region. The third semiconductor region is provided on the first and second semiconductor regions. The fourth semiconductor region is provided on a portion of the third semiconductor region. The fifth semiconductor region is provided selectively on the fourth semiconductor region. The gate electrode opposes the fifth and fourth semiconductor regions, and the portion. The sixth semiconductor region is provided on another portion of the third semiconductor region. The second electrode is provided on the fourth and fifth semiconductor regions. The interconnect portion is electrically connected to the gate electrode.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: August 25, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Akiyo Kawakami, Ryohei Gejo
  • Patent number: 10727225
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a gate electrode, a fifth semiconductor region, a sixth semiconductor region, a seventh semiconductor region, an eighth semiconductor region, and a second electrode. The first semiconductor region is provided on the first electrode. The eighth semiconductor region surrounds the third semiconductor region, the sixth semiconductor region, and the seventh semiconductor region. The eighth semiconductor region includes a first region and a second region respectively arranged with the third semiconductor region and the seventh semiconductor region in a third direction. A lower end of the second region is positioned higher than a lower end of the first region.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: July 28, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Ryohei Gejo