Patents by Inventor Ryohei Miyagawa
Ryohei Miyagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230223410Abstract: A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line provided for each column, proving a power supply voltage; and a feedback signal line provided for each column, conveying a signal from a peripheral circuit to a pixel, in which each of the pixels includes: an N-type diffusion layer; a photoelectric conversion element above the N-type diffusion layer; and a charge accumulation node between the N-type diffusion layer and the photoelectric conversion element, accumulating signal charge generated in the photoelectric conversion element, the feedback signal line, a metal line which is a part of the charge accumulation node, the vertical signal line, and the power line are disposed in a second interconnect layer, and the vertical signal line and the power line are disposed between the feedback signal line and the metal line.Type: ApplicationFiled: February 9, 2023Publication date: July 13, 2023Inventors: Tokuhiko TAMAKI, Hirohisa OHTSUKI, Ryohei MIYAGAWA, Motonori ISHII
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Patent number: 11605656Abstract: A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line provided for each column, proving a power supply voltage; and a feedback signal line provided for each column, conveying a signal from a peripheral circuit to a pixel, in which each of the pixels includes: an N-type diffusion layer; a photoelectric conversion element above the N-type diffusion layer; and a charge accumulation node between the N-type diffusion layer and the photoelectric conversion element, accumulating signal charge generated in the photoelectric conversion element, the feedback signal line, a metal line which is a part of the charge accumulation node, the vertical signal line, and the power line are disposed in a second interconnect layer, and the vertical signal line and the power line are disposed between the feedback signal line and the metal line.Type: GrantFiled: September 18, 2020Date of Patent: March 14, 2023Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tokuhiko Tamaki, Hirohisa Ohtsuki, Ryohei Miyagawa, Motonori Ishii
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Publication number: 20210005650Abstract: A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line provided for each column, proving a power supply voltage; and a feedback signal line provided for each column, conveying a signal from a peripheral circuit to a pixel, in which each of the pixels includes: an N-type diffusion layer; a photoelectric conversion element above the N-type diffusion layer; and a charge accumulation node between the N-type diffusion layer and the photoelectric conversion element, accumulating signal charge generated in the photoelectric conversion element, the feedback signal line, a metal line which is a part of the charge accumulation node, the vertical signal line, and the power line are disposed in a second interconnect layer, and the vertical signal line and the power line are disposed between the feedback signal line and the metal line.Type: ApplicationFiled: September 18, 2020Publication date: January 7, 2021Inventors: Tokuhiko TAMAKI, Hirohisa Ohtsuki, Ryohei Miyagawa, Motonori Ishii
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Patent number: 10879301Abstract: An imaging device includes: a photoelectric converter which converts light into signal charges; a charge accumulation region which is electrically connected to the photoelectric converter, and accumulates the signal charges; a transistor having a gate electrode which is electrically connected to the charge accumulation region; and a contact plug which electrically connects the photoelectric converter to the charge accumulation region, is in direct contact with the charge accumulation region, and comprises a semiconductor material.Type: GrantFiled: January 15, 2020Date of Patent: December 29, 2020Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yusuke Sakata, Mitsuyoshi Mori, Yutaka Hirose, Hiroshi Masuda, Hitoshi Kuriyama, Ryohei Miyagawa
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Patent number: 10818707Abstract: A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line provided for each column, proving a power supply voltage; and a feedback signal line provided for each column, conveying a signal from a peripheral circuit to a pixel, in which each of the pixels includes: an N-type diffusion layer; a photoelectric conversion element above the N-type diffusion layer; and a charge accumulation node between the N-type diffusion layer and the photoelectric conversion element, accumulating signal charge generated in the photoelectric conversion element, the feedback signal line, a metal line which is a part of the charge accumulation node, the vertical signal line, and the power line are disposed in a second interconnect layer, and the vertical signal line and the power line are disposed between the feedback signal line and the metal line.Type: GrantFiled: September 13, 2018Date of Patent: October 27, 2020Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tokuhiko Tamaki, Hirohisa Ohtsuki, Ryohei Miyagawa, Motonori Ishii
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Publication number: 20200152690Abstract: An imaging device includes: a photoelectric converter which converts light into signal charges; a charge accumulation region which is electrically connected to the photoelectric converter, and accumulates the signal charges; a transistor having a gate electrode which is electrically connected to the charge accumulation region; and a contact plug which electrically connects the photoelectric converter to the charge accumulation region, is in direct contact with the charge accumulation region, and comprises a semiconductor material.Type: ApplicationFiled: January 15, 2020Publication date: May 14, 2020Inventors: Yusuke SAKATA, Mitsuyoshi MORI, Yutaka HIROSE, Hiroshi MASUDA, Hitoshi KURIYAMA, Ryohei MIYAGAWA
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Patent number: 10553639Abstract: A solid-state imaging device includes: a first electrode formed above a semiconductor substrate; a photoelectric conversion film formed on the first electrode and for converting light into signal charges; a second electrode formed on the photoelectric conversion film; a charge accumulation region electrically connected to the first electrode and for accumulating the signal charges converted from the light by the photoelectric conversion film; a reset gate electrode for resetting the charge accumulation region; an amplification transistor for amplifying the signal charges accumulated in the charge accumulation region; and a contact plug in direct contact with the charge accumulation region, comprising a semiconductor material, and for electrically connecting to each other the first electrode and the charge accumulation region.Type: GrantFiled: August 22, 2018Date of Patent: February 4, 2020Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Yusuke Sakata, Mitsuyoshi Mori, Yutaka Hirose, Hiroshi Masuda, Hitoshi Kuriyama, Ryohei Miyagawa
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Patent number: 10367025Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.Type: GrantFiled: December 21, 2017Date of Patent: July 30, 2019Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Yoshihiro Sato, Ryohei Miyagawa, Tokuhiko Tamaki, Junji Hirase, Yoshiyuki Ohmori, Yoshiyuki Matsunaga
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Publication number: 20190013340Abstract: A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line provided for each column, proving a power supply voltage; and a feedback signal line provided for each column, conveying a signal from a peripheral circuit to a pixel, in which each of the pixels includes: an N-type diffusion layer; a photoelectric conversion element above the N-type diffusion layer; and a charge accumulation node between the N-type diffusion layer and the photoelectric conversion element, accumulating signal charge generated in the photoelectric conversion element, the feedback signal line, a metal line which is a part of the charge accumulation node, the vertical signal line, and the power line are disposed in a second interconnect layer, and the vertical signal line and the power line are disposed between the feedback signal line and the metal line.Type: ApplicationFiled: September 13, 2018Publication date: January 10, 2019Inventors: Tokuhiko TAMAKI, Hirohisa OHTSUKI, Ryohei MIYAGAWA, Motonori ISHII
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Publication number: 20190013349Abstract: A solid-state imaging device includes: a first electrode formed above a semiconductor substrate; a photoelectric conversion film formed on the first electrode and for converting light into signal charges; a second electrode formed on the photoelectric conversion film; a charge accumulation region electrically connected to the first electrode and for accumulating the signal charges converted from the light by the photoelectric conversion film; a reset gate electrode for resetting the charge accumulation region; an amplification transistor for amplifying the signal charges accumulated in the charge accumulation region; and a contact plug in direct contact with the charge accumulation region, comprising a semiconductor material, and for electrically connecting to each other the first electrode and the charge accumulation region.Type: ApplicationFiled: August 22, 2018Publication date: January 10, 2019Inventors: Yusuke SAKATA, Mitsuyoshi MORI, Yutaka HIROSE, Hiroshi MASUDA, Hitoshi KURIYAMA, Ryohei MIYAGAWA
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Patent number: 10103181Abstract: A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line provided for each column, proving a power supply voltage; and a feedback signal line provided for each column, conveying a signal from a peripheral circuit to a pixel, in which each of the pixels includes: an N-type diffusion layer; a photoelectric conversion element above the N-type diffusion layer; and a charge accumulation node between the N-type diffusion layer and the photoelectric conversion element, accumulating signal charge generated in the photoelectric conversion element, the feedback signal line, a metal line which is a part of the charge accumulation node, the vertical signal line, and the power line are disposed in a second interconnect layer, and the vertical signal line and the power line are disposed between the feedback signal line and the metal line.Type: GrantFiled: April 14, 2017Date of Patent: October 16, 2018Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tokuhiko Tamaki, Hirohisa Ohtsuki, Ryohei Miyagawa, Motonori Ishii
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Patent number: 10084008Abstract: A solid-state imaging device includes: a first electrode formed above a semiconductor substrate; a photoelectric conversion film formed on the first electrode and for converting light into signal charges; a second electrode formed on the photoelectric conversion film; a charge accumulation region electrically connected to the first electrode and for accumulating the signal charges converted from the light by the photoelectric conversion film; a reset gate electrode for resetting the charge accumulation region; an amplification transistor for amplifying the signal charges accumulated in the charge accumulation region; and a contact plug in direct contact with the charge accumulation region, comprising a semiconductor material, and for electrically connecting to each other the first electrode and the charge accumulation region.Type: GrantFiled: August 16, 2017Date of Patent: September 25, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yusuke Sakata, Mitsuyoshi Mori, Yutaka Hirose, Hiroshi Masuda, Hitoshi Kuriyama, Ryohei Miyagawa
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Publication number: 20180190706Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.Type: ApplicationFiled: March 1, 2018Publication date: July 5, 2018Inventors: Mitsuyoshi MORI, Ryohei MIYAGAWA, Yoshiyuki OHMORI, Yoshihiro SATO, Yutaka HIROSE, Yusuke SAKATA, Toru OKINO
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Publication number: 20180114811Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.Type: ApplicationFiled: December 21, 2017Publication date: April 26, 2018Inventors: Yoshihiro SATO, Ryohei MIYAGAWA, Tokuhiko TAMAKI, Junji HIRASE, Yoshiyuki OHMORI, Yoshiyuki MATSUNAGA
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Patent number: 9942506Abstract: A solid-state imaging device according to the present disclosure includes pixels arranged two-dimensionally, each of the pixels including: a metal electrode; a photoelectric conversion layer that is on the metal electrode and converts light into an electrical signal; a transparent electrode on the photoelectric conversion layer; an electric charge accumulation region that is electrically connected to the metal electrode and accumulates electric charges from the photoelectric conversion layer; an amplifier transistor that applies a signal voltage according to an amount of the electric charges in the electric charge accumulation region; and a reset transistor that resets electrical potential of the electric charge accumulation region, in which the reset transistor includes a gate oxide film thicker than a gate oxide film of the amplifier transistor.Type: GrantFiled: September 29, 2017Date of Patent: April 10, 2018Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Mitsuyoshi Mori, Hirohisa Ohtsuki, Yoshiyuki Ohmori, Yoshihiro Sato, Ryohei Miyagawa
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Patent number: 9935149Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.Type: GrantFiled: February 24, 2017Date of Patent: April 3, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Mitsuyoshi Mori, Ryohei Miyagawa, Yoshiyuki Ohmori, Yoshihiro Sato, Yutaka Hirose, Yusuke Sakata, Toru Okino
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Publication number: 20180048839Abstract: A solid-state imaging device according to the present disclosure includes pixels arranged two-dimensionally, each of the pixels including: a metal electrode; a photoelectric conversion layer that is on the metal electrode and converts light into an electrical signal; a transparent electrode on the photoelectric conversion layer; an electric charge accumulation region that is electrically connected to the metal electrode and accumulates electric charges from the photoelectric conversion layer; an amplifier transistor that applies a signal voltage according to an amount of the electric charges in the electric charge accumulation region; and a reset transistor that resets electrical potential of the electric charge accumulation region, in which the reset transistor includes a gate oxide film thicker than a gate oxide film of the amplifier transistor.Type: ApplicationFiled: September 29, 2017Publication date: February 15, 2018Inventors: Mitsuyoshi MORI, Hirohisa OHTSUKI, Yoshiyuki OHMORI, Yoshihiro SATO, Ryohei MIYAGAWA
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Patent number: 9881960Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.Type: GrantFiled: November 28, 2014Date of Patent: January 30, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yoshihiro Sato, Ryohei Miyagawa, Tokuhiko Tamaki, Junji Hirase, Yoshiyuki Ohmori, Yoshiyuki Matsunaga
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Publication number: 20170345865Abstract: A solid-state imaging device includes: a first electrode formed above a semiconductor substrate; a photoelectric conversion film formed on the first electrode and for converting light into signal charges; a second electrode formed on the photoelectric conversion film; a charge accumulation region electrically connected to the first electrode and for accumulating the signal charges converted from the light by the photoelectric conversion film; a reset gate electrode for resetting the charge accumulation region; an amplification transistor for amplifying the signal charges accumulated in the charge accumulation region; and a contact plug in direct contact with the charge accumulation region, comprising a semiconductor material, and for electrically connecting to each other the first electrode and the charge accumulation region.Type: ApplicationFiled: August 16, 2017Publication date: November 30, 2017Inventors: Yusuke SAKATA, Mitsuyoshi MORI, Yutaka HIROSE, Hiroshi MASUDA, Hitoshi KURIYAMA, Ryohei MIYAGAWA
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Patent number: 9813651Abstract: A solid-state imaging device according to the present disclosure includes pixels arranged two-dimensionally, each of the pixels including: a metal electrode; a photoelectric conversion layer that is on the metal electrode and converts light into an electrical signal; a transparent electrode on the photoelectric conversion layer; an electric charge accumulation region that is electrically connected to the metal electrode and accumulates electric charges from the photoelectric conversion layer; an amplifier transistor that applies a signal voltage according to an amount of the electric charges in the electric charge accumulation region; and a reset transistor that resets electrical potential of the electric charge accumulation region, in which the reset transistor includes a gate oxide film thicker than a gate oxide film of the amplifier transistor.Type: GrantFiled: December 22, 2014Date of Patent: November 7, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Mitsuyoshi Mori, Hirohisa Ohtsuki, Yoshiyuki Ohmori, Yoshihiro Sato, Ryohei Miyagawa