Patents by Inventor Ryuichi KANOH

Ryuichi KANOH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220201323
    Abstract: Provided is an encoder that achieves further improvement. The encoder includes processing circuitry and memory. Using the memory, the processing circuitry: obtains two prediction images from two reference pictures; derives a luminance gradient value of each pixel position in each of the two prediction images; derives a luminance local motion estimation value of each pixel position in a current block; generates a luminance final prediction image using a luminance value and the luminance gradient value in each of the two prediction images, and the luminance local motion estimation value of the current block; and generates a chrominance final prediction image using at least one of the luminance gradient value of each of the two prediction images or the luminance local motion estimation value of the current block, and chrominance of each of the two prediction images.
    Type: Application
    Filed: September 16, 2021
    Publication date: June 23, 2022
    Inventors: Ryuichi KANOH, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Takashi HASHIMOTO
  • Publication number: 20220201297
    Abstract: An encoder that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: splits the current block into a first sub block, a second sub block, and a third sub block in a first direction, the second sub block being located between the first sub block and the third sub block; prohibits splitting the second sub block into two partitions in the first direction; and encodes the first sub block, the second sub block, and the third sub block.
    Type: Application
    Filed: March 8, 2022
    Publication date: June 23, 2022
    Inventors: Sughosh Pavan SHASHIDHAR, Hai Wei SUN, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Jing Ya LI, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Tadamasa TOMA
  • Patent number: 11368685
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: June 21, 2022
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11368709
    Abstract: An encoder is an encoder that encodes a block in a picture using a prediction image of the block, and includes circuitry and memory. Using the memory, the circuitry: calculates a first average pixel value which is an average pixel value of first reference samples out of the first reference samples and second reference samples, The first reference samples are referable and located outside the block and adjacent to a first side of the block. The second reference samples are referable and located outside the block and adjacent to a second side of the block. When generating the prediction image, the circuitry applies the same prediction pixel value to inner samples among current samples to be processed that are included in the block. The inner samples constitute a quadrilateral region including at least two current samples in each of a horizontal direction and a vertical direction.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: June 21, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Patent number: 11368703
    Abstract: An image decoder splits a block of a picture into a plurality of sub blocks in a first direction using a first partition mode; and decodes the plurality of sub blocks, wherein, when the block is sized N pixels by 2N pixels and the first direction is along the 2N pixels, N being an integer, the first partition mode includes splitting the block into the plurality of sub blocks including at least one sub block sized N/4 pixels by 2N pixels, and excludes splitting the block into two sub blocks sized N/2 pixels by 2N pixels.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: June 21, 2022
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Ru Ling Liao, Han Boon Teo, Takahiro Nishi, Ryuichi Kanoh, Tadamasa Toma
  • Patent number: 11350092
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: May 31, 2022
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11350085
    Abstract: An encoder includes memory and circuitry. The circuitry, using the memory, (i) selects a mode from among a plurality of modes each for deriving a motion vector, and derives a motion vector for a current block via the selected mode, and (ii) performs inter prediction encoding on the current block, using the derived motion vector, via one of a skip mode and a non-skip mode different from the skip mode. The plurality of modes include a plurality of first modes each for predicting the motion vector for the current block based on an encoded block neighboring the current block without encoding information indicating a motion vector into a stream. When a second mode included in the plurality of first modes is selected, the current block is encoded via the non-skip mode regardless of presence or absence of a residual coefficient.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: May 31, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh
  • Patent number: 11330265
    Abstract: An encoder which encodes a current block to be encoded in an image includes: a transformer which performs a primary transform from residuals of the current block to primary coefficients, determines whether to apply a secondary transform to the current block, and performs the secondary transform from the primary coefficients to secondary coefficients when the secondary transform is applied; a quantizer which calculates quantized primary coefficients by performing a first quantization on the primary coefficients when a secondary transform is not applied, and calculates quantized secondary coefficients by performing a second quantization different from the first quantization on the secondary coefficients when the secondary transform is applied; and an entropy encoder which generates an encoded bitstream by encoding either quantized primary coefficients or quantized secondary coefficients.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: May 10, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Kiyofumi Abe, Tadamasa Toma, Takahiro Nishi
  • Patent number: 11310491
    Abstract: An encoder includes memory and circuitry. The circuitry, using the memory, (i) selects a mode from among a plurality of modes each for deriving a motion vector, and derives a motion vector for a current block via the selected mode, and (ii) performs inter prediction encoding on the current block, using the derived motion vector, via one of a skip mode and a non-skip mode different from the skip mode. The plurality of modes include a plurality of first modes each for predicting the motion vector for the current block based on an encoded block neighboring the current block without encoding information indicating a motion vector into a stream. When a second mode included in the plurality of first modes is selected, the current block is encoded via the non-skip mode regardless of presence or absence of a residual coefficient.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: April 19, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh
  • Patent number: 11303895
    Abstract: An encoder that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: splits the current block into a first sub block, a second sub block, and a third sub block in a first direction, the second sub block being located between the first sub block and the third sub block; prohibits splitting the second sub block into two partitions in the first direction; and encodes the first sub block, the second sub block, and the third sub block.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: April 12, 2022
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Sughosh Pavan Shashidhar, Hai Wei Sun, Chong Soon Lim, Ru Ling Liao, Han Boon Teo, Jing Ya Li, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh, Tadamasa Toma
  • Publication number: 20220103859
    Abstract: An encoder includes: circuitry; and memory, in which using the memory, the circuitry, in affine motion compensation prediction in inter prediction for a current block, places a limit on a range within which motion estimation or motion compensation is performed, and performs the motion compensation for the current block.
    Type: Application
    Filed: December 14, 2021
    Publication date: March 31, 2022
    Inventors: Takashi HASHIMOTO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI, Ryuichi KANOH
  • Publication number: 20220094949
    Abstract: An encoder, includes: circuitry; and memory. Using the memory, the circuitry: in inter prediction for a current block, determines a base motion vector, and writes, in an encoded signal, a delta motion vector representing (i) one direction among a plurality of directions including a diagonal direction and (ii) a distance from the base motion vector; and encodes the current block using the delta motion vector and the base motion vector as a motion vector of the current block.
    Type: Application
    Filed: December 1, 2021
    Publication date: March 24, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Publication number: 20220086440
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 17, 2022
    Inventors: Sughosh Pavan SHASHIDHAR, Hai Wei SUN, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Jing Ya LI, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Tadamasa TOMA
  • Publication number: 20220086476
    Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.
    Type: Application
    Filed: November 24, 2021
    Publication date: March 17, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Publication number: 20220078419
    Abstract: An encoder includes processing circuitry and a memory coupled to the processing circuitry. The processing circuitry is configured to: select a filter based at least on a prediction mode used for a first block, the filter including first filter coefficients for the first block and second filter coefficients for a second block; multiply values of first pixels among the first block and second pixels among the second block by the first filter coefficients to change a value of a first pixel in the first pixels; and multiply the values of the first pixels among the first block and the second pixels among the second block by the second filter coefficients to change a value of a second pixel in the second pixels.
    Type: Application
    Filed: November 18, 2021
    Publication date: March 10, 2022
    Inventors: Ryuichi KANOH, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20220060719
    Abstract: An encoder includes memory, and circuitry accessible to the memory. The circuitry accessible to the memory: determines whether OBMC is applicable to generation of a prediction image of a current block, according to whether BIO is to be applied to the generation of the prediction image of the current block; when BIO is to be applied to the generation of the prediction image of the current block, determines that OBMC is not applicable to the generation of the prediction image of the current block, and applies BIO to the generation of the prediction image of the current block without applying OBMC.
    Type: Application
    Filed: November 5, 2021
    Publication date: February 24, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH
  • Patent number: 11259022
    Abstract: An encoder that encodes a current block in a picture includes circuitry and a memory coupled to the circuitry. The circuitry, in operation: selects at least one transform basis from among candidates for a transform basis which include a basis of a type-II discrete cosine transform (DCT-II) and at least one of a basis of a type-IV discrete cosine transform (DCT-IV) or a basis of a type-IV discrete sine transform (DST-IV); and transforms prediction error values of the current block, using the at least one transform basis selected. When the size of the current block is greater than a threshold size, the circuitry selects at least one transform basis after excluding at least one of the basis of the DCT-IV or the basis of the DST-IV from the candidates. The threshold size is at most half a maximum size to which the DCT-II is applicable.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: February 22, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20220046256
    Abstract: An encoder which encodes a video including a plurality of pictures includes circuitry and memory. Using the memory, the circuitry performs: encoding a first picture among the plurality of pictures; and performing (i) a first operation for encoding a parameter set for a second picture which follows the first picture in coding order among the plurality of pictures after encoding the first picture, and encoding the second picture after encoding the parameter set, or (ii) a second operation for encoding the second picture without encoding the parameter set after encoding the first picture. The circuitry performs the first operation when the second picture is a determined picture, in the performing of the first operation or the second operation.
    Type: Application
    Filed: October 25, 2021
    Publication date: February 10, 2022
    Inventors: Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE, Ryuichi KANOH
  • Publication number: 20220046284
    Abstract: The encoder includes processing circuitry, and memory. Using the memory, the processing circuitry: generates a predicted image of an input image that is a current image to be encoded, based on generated data output from a generator network in response to a reference image being input to the generator network, the generator network being a neural network; calculates a prediction error by subtracting the predicted image from the input image; and generates an encoded image by at least transforming the prediction error.
    Type: Application
    Filed: October 26, 2021
    Publication date: February 10, 2022
    Inventors: Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE, Ryuichi KANOH, Luca RIGAZIO, Alec HODGKINSON
  • Publication number: 20220046266
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Application
    Filed: October 20, 2021
    Publication date: February 10, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI