Patents by Inventor Ryuichi KANOH

Ryuichi KANOH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220385902
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry in operation: determines whether the shape of a current chroma block to be split satisfies a first condition; generates one or more second candidates for a block partitioning method by eliminating one or more predetermined candidates from a plurality of first candidates for a block partitioning method when the current chroma block satisfies the first condition; selects a block partitioning method from among the one or more second candidates; and splits the current chroma block according to the block partitioning method selected.
    Type: Application
    Filed: July 29, 2022
    Publication date: December 1, 2022
    Inventors: Ryuichi KANOH, Tadamasa TOMA, Kiyofumi ABE, Takahiro NISHI
  • Publication number: 20220368935
    Abstract: A decoder that decodes a current block using a motion vector includes: a processor; and memory. Using the memory, the processor: derives a first candidate vector from one or more candidate vectors of one or more neighboring blocks that neighbor the current block; determines, in a first reference picture for the current block, a first adjacent region that includes a position indicated by the first candidate vector; calculates evaluation values of a plurality of candidate regions included in the first adjacent region; and determines a first motion vector of the current block, based on a first candidate region having a smallest evaluation value among the evaluation values. The first adjacent region is included in a first motion estimation region determined based on the position indicated by the first candidate vector.
    Type: Application
    Filed: July 15, 2022
    Publication date: November 17, 2022
    Inventors: Takashi HASHIMOTO, Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE, Ryuichi KANOH
  • Publication number: 20220360815
    Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 10, 2022
    Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Ru Ling LIAO, Jing Ya LI, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Patent number: 11477485
    Abstract: The encoder includes processing circuitry, and memory. Using the memory, the processing circuitry: generates a predicted image of an input image that is a current image to be encoded, based on generated data output from a generator network in response to a reference image being input to the generator network, the generator network being a neural network; calculates a prediction error by subtracting the predicted image from the input image; and generates an encoded image by at least transforming the prediction error.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: October 18, 2022
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Ryuichi Kanoh, Luca Rigazio, Alec Hodgkinson
  • Patent number: 11463724
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in inter prediction processing: derives a first motion vector of a current block to be processed, using a motion vector of a previous block which has been previously processed; derives a second motion vector of the current block by performing motion estimation in the vicinity of the first motion vector; and generates a prediction image of the current block by performing motion compensation using the second motion vector.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: October 4, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Takashi Hashimoto
  • Patent number: 11457240
    Abstract: An encoder which transforms a current block to be encoded in an image to encode the current block includes circuitry and memory. The circuitry, using the memory: determines a plurality of first transform basis candidates and transforms the current block using a transform basis included in the plurality of first transform basis candidates determined, when the current block has a first size; and determines one or more second transform basis candidates different from the plurality of first transform basis candidates and transforms the current block using a transform basis included in the one or more second transform basis candidates determined, when the current block has a second size larger than the first size.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: September 27, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi, Masato Ohkawa, Hideo Saitou
  • Patent number: 11457215
    Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: September 27, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20220303589
    Abstract: An image decoder performs a first partitioning including using a first partition mode, without parsing first splitting information indicative of the first partition mode, to split a first block into a plurality of second blocks in response to that the first block is located adjacent to an edge of a picture and that the dimensions of the first block satisfy a first condition; and performs a second partitioning on the second block by parsing second splitting information indicative of a second partition mode, wherein the second partition mode allows at least one of a quad tree splitting and a binary splitting, and using the second partition mode to split the second block into a plurality of coding units (CUs), wherein the second partition mode prohibits the quad tree splitting of the second block in response to that the second block is located adjacent to the edge of the picture.
    Type: Application
    Filed: June 3, 2022
    Publication date: September 22, 2022
    Inventors: Ryuichi KANOH, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20220303572
    Abstract: An encoder that; obtains two prediction images by performing motion compensation using two motion vectors; obtains a gradient value of each of pixels included in the two prediction images; derives a local motion estimation value for each of sub-blocks based on the pixel value and the gradient value of each of the pixels, the sub-blocks being obtained by partitioning the current block; and generates a final prediction image for the current block using the pixel value and the gradient value of each of the pixels, and the local motion estimation value derived for each of the sub-blocks. Each of the pixels in the two prediction images is interpolated with sub-pixel accuracy, and a reference range for the interpolation is included in a normal reference range that is referred to for motion compensation for the current block in normal inter prediction performed without using the local motion estimation value.
    Type: Application
    Filed: June 8, 2022
    Publication date: September 22, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Takashi HASHIMOTO
  • Publication number: 20220295083
    Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: derives a one-dimensional array of a plurality of reference samples for intra prediction; performs smoothing on the one-dimensional array of the plurality of reference samples which has been derived; and generates a prediction image using the plurality of reference samples. In deriving the one-dimensional array, the circuitry projects a value of at least one decoded pixel located on a first line onto a second line perpendicular to the first line, to derive at least one of the plurality of reference samples, and the smoothing is performed on the at least one decoded pixel projected onto the second line.
    Type: Application
    Filed: May 26, 2022
    Publication date: September 15, 2022
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Publication number: 20220295092
    Abstract: An encoder is an encoder that encodes a block in a picture using a prediction image of the block, and includes circuitry and memory. Using the memory, the circuitry: calculates a first average pixel value which is an average pixel value of first reference samples out of the first reference samples and second reference samples, The first reference samples are referable and located outside the block and adjacent to a first side of the block. The second reference samples are referable and located outside the block and adjacent to a second side of the block. When generating the prediction image, the circuitry applies the same prediction pixel value to inner samples among current samples to be processed that are included in the block. The inner samples constitute a quadrilateral region including at least two current samples in each of a horizontal direction and a vertical direction.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 15, 2022
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Publication number: 20220295060
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Application
    Filed: April 21, 2022
    Publication date: September 15, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 11438588
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry in operation: determines whether the shape of a current chroma block to be split satisfies a first condition; generates one or more second candidates for a block partitioning method by eliminating one or more predetermined candidates from a plurality of first candidates for a block partitioning method when the current chroma block satisfies the first condition; selects a block partitioning method from among the one or more second candidates; and splits the current chroma block according to the block partitioning method selected.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: September 6, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi
  • Patent number: 11438621
    Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: September 6, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Jing Ya Li, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Publication number: 20220279197
    Abstract: An image decoder parses an encoded bistream to obtain a first parameter and a second parameter, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image decoder executes the first partition mode including; splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and decoding the plurality of sub blocks.
    Type: Application
    Filed: May 12, 2022
    Publication date: September 1, 2022
    Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Han Boon TEO, Takahiro NISHI, Ryuichi KANOH, Tadamasa TOMA
  • Publication number: 20220279180
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Application
    Filed: April 20, 2022
    Publication date: September 1, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 11425409
    Abstract: A decoder that decodes a current block using a motion vector includes: a processor; and memory. Using the memory, the processor: derives a first candidate vector from one or more candidate vectors of one or more neighboring blocks that neighbor the current block; determines, in a first reference picture for the current block, a first adjacent region that includes a position indicated by the first candidate vector; calculates evaluation values of a plurality of candidate regions included in the first adjacent region; and determines a first motion vector of the current block, based on a first candidate region having a smallest evaluation value among the evaluation values. The first adjacent region is included in a first motion estimation region determined based on the position indicated by the first candidate vector.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: August 23, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Takashi Hashimoto, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Ryuichi Kanoh
  • Patent number: 11425413
    Abstract: An encoder that; obtains two prediction images by performing motion compensation using two motion vectors; obtains a gradient value of each of pixels included in the two prediction images; derives a local motion estimation value for each of sub-blocks based on the pixel value and the gradient value of each of the pixels, the sub-blocks being obtained by partitioning the current block; and generates a final prediction image for the current block using the pixel value and the gradient value of each of the pixels, and the local motion estimation value derived for each of the sub-blocks. Each of the pixels in the two prediction images is interpolated with sub-pixel accuracy, and a reference range for the interpolation is included in a normal reference range that is referred to for motion compensation for the current block in normal inter prediction performed without using the local motion estimation value.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: August 23, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Takashi Hashimoto
  • Publication number: 20220264112
    Abstract: An encoder which encodes a current block of a picture includes a processor and memory. Using the memory, the processor: determines whether intra prediction is to be used for the current block; and when it is determined that intra prediction is to be used for the current block, generates first transform coefficients by performing first transform of residual signals of the current block using a first transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode and the first transform basis is different from a determined transform basis; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode for the current block is not the determined mode or when the first transform basis matches the determined transform basis.
    Type: Application
    Filed: May 5, 2022
    Publication date: August 18, 2022
    Inventors: Masato OHKAWA, Hideo SAITOU, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Publication number: 20220264092
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Application
    Filed: April 25, 2022
    Publication date: August 18, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI