Patents by Inventor Ryuichi KANOH

Ryuichi KANOH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ENCODER, DECODER, ENCODING METHOD, DECODING METHOD, AND RECORDING MEDIUM
    Publication number: 20230074281
    Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 9, 2023
    Inventors: Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Chong Soon LIM, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Jing Ya LI
  • Image encoding device, image decoding device, image encoding method, and image decoding method
    Patent number: 11601669
    Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: March 7, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Encoder, decoder, encoding method, and decoding method
    Patent number: 11595654
    Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: February 28, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Encoder, decoder, encoding method, and decoding method
    Patent number: 11582450
    Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: February 14, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe
  • Encoder, decoder, encoding method, and decoding method
    Patent number: 11575931
    Abstract: Provided is an encoder that achieves further improvement. The encoder includes processing circuitry and memory. Using the memory, the processing circuitry: obtains two prediction images from two reference pictures; derives a luminance gradient value of each pixel position in each of the two prediction images; derives a luminance local motion estimation value of each pixel position in a current block; generates a luminance final prediction image using a luminance value and the luminance gradient value in each of the two prediction images, and the luminance local motion estimation value of the current block; and generates a chrominance final prediction image using at least one of the luminance gradient value of each of the two prediction images or the luminance local motion estimation value of the current block, and chrominance of each of the two prediction images.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: February 7, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Takashi Hashimoto
  • Encoder, decoder, encoding method, and decoding method
    Patent number: 11575920
    Abstract: An encoder which encodes a video including a plurality of pictures includes circuitry and memory. Using the memory, the circuitry performs: encoding a first picture among the plurality of pictures; and performing (i) a first operation for encoding a parameter set for a second picture which follows the first picture in coding order among the plurality of pictures after encoding the first picture, and encoding the second picture after encoding the parameter set, or (ii) a second operation for encoding the second picture without encoding the parameter set after encoding the first picture. The circuitry performs the first operation when the second picture is a determined picture, in the performing of the first operation or the second operation.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: February 7, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Ryuichi Kanoh
  • Encoder and encoding method
    Patent number: 11575892
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: February 7, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Sughosh Pavan Shashidhar, Hai Wei Sun, Chong Soon Lim, Ru Ling Liao, Han Boon Teo, Jing Ya Li, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh, Tadamasa Toma
  • Encoder, decoder, encoding method, and decoding method
    Patent number: 11570432
    Abstract: A decoder includes a memory and processing circuitry. The processing circuitry, in operation, changes values of pixels in a first block and a second block to filter a boundary therebetween, using clipping such that change amounts of the respective values are within respective clip widths. The clip widths for the pixels in the first block and the second block are selected based on block sizes of the first block and the second block. The pixels in the first block include a first pixel located at a first position, and the pixels in the second block include a second pixel located at a second position corresponding to the first position with respect to the boundary. The clip widths include a first clip width and a second clip width corresponding to the first pixel and the second pixel, respectively, and the first clip width is different from the second width.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: January 31, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Image encoder and related non-transitory computer readable medium for image decoding
    Patent number: 11563969
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: January 24, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Encoder, decoder, and related non-transitory computer readable medium
    Patent number: 11563940
    Abstract: Various embodiments provide a decoder configured to select a filter based on a block size of a first block and a block size of a second block in an image, and change values of pixels in the first block and the second block. The filter includes a first set of multipliers and a first set of offsets for the first block, and a second set of multipliers and a second set of offsets for the second block. The values of the pixels in the first block and the second block are changed by performing multiplication with each multiplier in the first set of multipliers, by performing multiplication with each multiplier in the second set of multipliers, and by using the first set of offsets and the second set of offsets.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: January 24, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Encoder, decoder, encoding method, and decoding method
    Patent number: 11558635
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: January 17, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Encoding method, decoding method, encoder, and decoder
    Patent number: 11553204
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry performs a primary transform on a derived prediction error, performs a secondary transform on a result of the primary transform, quantizes a result of the secondary transform, and encodes a result of the quantization as data of an image. When a current block to be processed has a predetermined shape, the encoder performs the secondary transform using, among secondary transform basis candidates that are secondary bases usable in the secondary transform, only a secondary transform basis candidate having a size that is not largest size containable in the current block.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: January 10, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi
  • ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    Publication number: 20220417549
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in inter prediction processing: derives a first motion vector of a current block to be processed, using a motion vector of a previous block which has been previously processed; derives a second motion vector of the current block by performing motion estimation in the vicinity of the first motion vector; and generates a prediction image of the current block by performing motion compensation using the second motion vector.
    Type: Application
    Filed: August 25, 2022
    Publication date: December 29, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Takashi HASHIMOTO
  • Encoder, decoder, encoding method, decoding method, and recording medium
    Patent number: 11533482
    Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: December 20, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh, Chong Soon Lim, Sughosh Pavan Shashidhar, Ru Ling Liao, Hai Wei Sun, Han Boon Teo, Jing Ya Li
  • ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    Publication number: 20220394268
    Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.
    Type: Application
    Filed: August 11, 2022
    Publication date: December 8, 2022
    Inventors: Kiyofumi ABE, Ryuichi KANOH, Takahiro NISHI, Tadamasa TOMA
  • ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    Publication number: 20220394267
    Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 8, 2022
    Inventors: Kiyofumi ABE, Ryuichi KANOH, Takahiro NISHI, Tadamasa TOMA
  • ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    Publication number: 20220394262
    Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.
    Type: Application
    Filed: August 12, 2022
    Publication date: December 8, 2022
    Inventors: Kiyofumi ABE, Ryuichi KANOH, Takahiro NISHI, Tadamasa TOMA
  • ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    Publication number: 20220394296
    Abstract: An encoder which transforms a current block to be encoded in an image to encode the current block includes circuitry and memory. The circuitry, using the memory: determines a plurality of first transform basis candidates and transforms the current block using a transform basis included in the plurality of first transform basis candidates determined, when the current block has a first size; and determines one or more second transform basis candidates different from the plurality of first transform basis candidates and transforms the current block using a transform basis included in the one or more second transform basis candidates determined, when the current block has a second size larger than the first size.
    Type: Application
    Filed: August 17, 2022
    Publication date: December 8, 2022
    Inventors: Ryuichi KANOH, Tadamasa TOMA, Kiyofumi ABE, Takahiro NISHI, Masato OHKAWA, Hideo SAITOU
  • ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    Publication number: 20220385908
    Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Kiyofumi ABE, Ryuichi KANOH, Takahiro NISHI, Tadamasa TOMA
  • ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    Publication number: 20220385909
    Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventors: Kiyofumi ABE, Ryuichi KANOH, Takahiro NISHI, Tadamasa TOMA