Patents by Inventor Ryuichi Mishima

Ryuichi Mishima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9609251
    Abstract: A drain of a first transistor is formed by performing ion implantation on a semiconductor substrate using a first member as a mask for a gate electrode of the first transistor. Further, ion implantation is performed on the gate electrode of the second transistor after thinning a second member.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: March 28, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Hideaki Ishino, Kenji Togo, Masatsugu Itahashi, Takehito Okabe
  • Patent number: 9450011
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: September 20, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Publication number: 20160126280
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Application
    Filed: January 11, 2016
    Publication date: May 5, 2016
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Patent number: 9269738
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: February 23, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Publication number: 20150304587
    Abstract: A drain of a first transistor is formed by performing ion implantation on a semiconductor substrate using a first member as a mask for a gate electrode of the first transistor. Further, ion implantation is performed on the gate electrode of the second transistor after thinning a second member.
    Type: Application
    Filed: July 2, 2015
    Publication date: October 22, 2015
    Inventors: Ryuichi Mishima, Hideaki Ishino, Kenji Togo, Masatsugu Itahashi, Takehito Okabe
  • Patent number: 9082639
    Abstract: A drain of a first transistor is formed by performing ion implantation on a semiconductor substrate using a first member as a mask for a gate electrode of the first transistor. Further, ion implantation is performed on the gate electrode of the second transistor after thinning a second member.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: July 14, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Hideaki Ishino, Kenji Togo, Masatsugu Itahashi, Takehito Okabe
  • Publication number: 20150008494
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Application
    Filed: September 24, 2014
    Publication date: January 8, 2015
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Patent number: 8878268
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: November 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Patent number: 8866205
    Abstract: A photoelectric conversion device is disclosed. The photoelectric conversion device includes a semiconductor substrate having a plurality of photoelectric converters, a multilayer wiring structure arranged on the semiconductor substrate, and a planarized layer arranged on the multilayer wiring structure. The multilayer wiring structure includes a first wiring layer, an interlayer insulation film arranged to cover the first wiring layer, and a second wiring layer serving as a top wiring layer arranged on the interlayer insulation film. The planarized layer covers the interlayer insulation film and the second wiring layer. The second wiring layer is thinner than the first wiring layer.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: October 21, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasushi Nakata, Shigeru Nishimura, Ryuichi Mishima
  • Patent number: 8786044
    Abstract: A photoelectric conversion device includes a film that covers the photoelectric conversion part and a transfer gate electrode, wherein a first region having a refractive index lower than refractive indices of the film and the photoelectric conversion part, is provided between the film and the photoelectric conversion part, and a second region having a refractive index lower than the refractive indices of the transfer gate electrode and the film, is provided between the film and the top surface of the transfer gate electrode, and wherein T1<T2<?/2?T1 is satisfied, where an optical thickness of the first region is T1, an optical thickness of the second region is T2, and a wavelength of a light incident on the photoelectric conversion part is ?.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: July 22, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Hideaki Ishino, Kenji Togo, Masatsugu Itahashi, Takehito Okabe
  • Patent number: 8698208
    Abstract: A manufacturing method of a photoelectric conversion device comprises a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: April 15, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Mineo Shimotsusa, Hiroaki Naruse
  • Publication number: 20140054663
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Application
    Filed: October 30, 2013
    Publication date: February 27, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Patent number: 8546902
    Abstract: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same substrate, comprising: a first semiconductor region of a first conductivity type for forming the photoelectric region, the first semiconductor region being formed in a second semiconductor region of a second conductivity type; and a third semiconductor region of the first conductivity type and a fourth semiconductor region of the second conductivity type for forming the peripheral circuit, the third and fourth semiconductor regions being formed in the second semiconductor region; wherein in that the impurity concentration of the first semiconductor region is higher than the impurity concentration of the third semiconductor region.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: October 1, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Seiichi Tamura, Hiroshi Yuzurihara, Takeshi Ichikawa, Ryuichi Mishima
  • Patent number: 8389923
    Abstract: A photoelectric conversion device having a pixel array region in which a plurality of pixels each including a photoelectric converter are arrayed, and a peripheral region arranged around the pixel array region, the device comprising a multilayer wiring structure which is arranged on a semiconductor substrate, and includes wiring layers in the peripheral region more than wiring layers in the pixel array region, and a plurality of interlayer lenses which is arranged on the multilayer wiring structure in the pixel array region, wherein the plurality of interlayer lenses each includes a first insulator, and a second insulator arranged to cover the first insulator, and having a refractive index higher than the first insulator, and wherein the first insulator in each of the plurality of interlayer lenses, and an uppermost interlayer insulating film in the peripheral region in the multilayer wiring structure are made of an identical material.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: March 5, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroaki Naruse, Ryuichi Mishima
  • Publication number: 20120288979
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 15, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Patent number: 8309997
    Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: November 13, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Seiichi Tamura, Ryuichi Mishima
  • Patent number: 8304278
    Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: November 6, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroaki Naruse, Takashi Okagawa, Ryuichi Mishima, Nobuhiko Sato, Hiroshi Yuzurihara
  • Patent number: 8293559
    Abstract: In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: October 23, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takehito Okabe, Hiroaki Naruse, Ryuichi Mishima, Kouhei Hashimoto
  • Patent number: 8252614
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: August 28, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Publication number: 20120181582
    Abstract: A manufacturing method of a photoelectric conversion device comprises a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.
    Type: Application
    Filed: March 27, 2012
    Publication date: July 19, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ryuichi Mishima, Mineo Shimotsusa, Hiroaki Naruse