Patents by Inventor Ryuichi Mishima

Ryuichi Mishima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7679116
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: March 16, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
  • Publication number: 20090218602
    Abstract: It is an object of the present invention to provide a manufacturing method of a photoelectric conversion device in which no plane channeling is produced even if ions are injected at a certain elevation angle into a semiconductor substrate surface made of silicon. A manufacturing method of a photoelectric conversion device including a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate, wherein the principal plane has an off-angle forming each angle ? with at least two planes perpendicular to a reference (1 0 0) plane within a range of 3.5°???4.5°, and an ion injecting direction for forming an semiconductor region constituting the photoelectric conversion element forms an angle ? to a direction perpendicular to the principal plane within a range of 0°<??45°, and further a direction of a projection of the ion injecting direction to the principal plane forms each angle ? with the two plane direction within a range of 0°<?<90°.
    Type: Application
    Filed: May 5, 2009
    Publication date: September 3, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Seiichi Tamura, Hiroshi Yuzurihara, Shigeru Nishimura, Ryuichi Mishima, Yasushi Nakata
  • Patent number: 7541211
    Abstract: It is an object of the present invention to provide a manufacturing method of a photoelectric conversion device in which no plane channeling is produced even if ions are injected at a certain elevation angle into a semiconductor substrate surface made of silicon. A manufacturing method of a photoelectric conversion device including a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate, wherein the principal plane has an off-angle forming each angle ? with at least two planes perpendicular to a reference (1 0 0) plane within a range of 3.5°???4.5°, and an ion injecting direction for forming an semiconductor region constituting the photoelectric conversion element forms an angle ? to a direction perpendicular to the principal plane within a range of 0°<??45°, and further a direction of a projection of the ion injecting direction to the principal plane forms each angle ? with the two plane direction within a range of 0°<?<90°.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: June 2, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Seiichi Tamura, Hiroshi Yuzurihara, Shigeru Nishimura, Ryuichi Mishima, Yasushi Nakata
  • Publication number: 20090104729
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Application
    Filed: October 13, 2008
    Publication date: April 23, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Publication number: 20090085144
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Application
    Filed: December 2, 2008
    Publication date: April 2, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroshi YUZURIHARA, Ryuichi MISHIMA, Takanori WATANABE, Takeshi ICHIKAWA, Seiichi TAMURA
  • Patent number: 7473948
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: January 6, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
  • Patent number: 7453109
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: November 18, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Publication number: 20080203450
    Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.
    Type: Application
    Filed: February 6, 2008
    Publication date: August 28, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroaki Naruse, Takashi Okagawa, Ryuichi Mishima, Nobuhiko Sato, Hiroshi Yuzurihara
  • Publication number: 20080203509
    Abstract: A photoelectric conversion device comprises a photoelectric conversion element disposed at a semiconductor substrate, and a multilayered wiring structure including a plurality of wiring layers disposed over the semiconductor substrate in such a manner to sandwich an interlayer insulation film therebetween. A diffusion suppressing film is disposed at least on the uppermost one of the wiring layers, the diffusion suppressing film serving to suppress diffusion of material forming the uppermost wiring layer; the diffusion suppressing film covers regions of the uppermost wiring layer and the interlayer insulation film corresponding to the photoelectric conversion element; and a lens is disposed with respect to a region of the diffusion suppressing film corresponding to the photoelectric conversion element.
    Type: Application
    Filed: February 6, 2008
    Publication date: August 28, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ryuichi Mishima, Hiroaki Naruse
  • Publication number: 20080157153
    Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).
    Type: Application
    Filed: March 4, 2008
    Publication date: July 3, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroshi Yuzurihara, Seiichi Tamura, Ryuichi Mishima
  • Patent number: 7365380
    Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate,voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: April 29, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Seiichi Tamura, Ryuichi Mishima
  • Publication number: 20080073737
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Application
    Filed: November 16, 2007
    Publication date: March 27, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroshi YUZURIHARA, Ryuichi MISHIMA, Takanori WATANABE, Takeshi ICHIKAWA, Seiichi TAMURA
  • Publication number: 20080054388
    Abstract: A photoelectric conversion device is disclosed. The photoelectric conversion device includes a semiconductor substrate having a plurality of photoelectric converters, a multilayer wiring structure arranged on the semiconductor substrate, and a planarized layer arranged on the multilayer wiring structure. The multilayer wiring structure includes a first wiring layer, an interlayer insulation film arranged to cover the first wiring layer, and a second wiring layer serving as a top wiring layer arranged on the interlayer insulation film. The planarized layer covers the interlayer insulation film and the second wiring layer. The second wiring layer is thinner than the first wiring layer.
    Type: Application
    Filed: August 24, 2007
    Publication date: March 6, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yasushi Nakata, Shigeru Nishimura, Ryuichi Mishima
  • Publication number: 20080036019
    Abstract: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same substrate, comprising: a first semiconductor region of a first conductivity type for forming the photoelectric region, the first semiconductor region being formed in a second semiconductor region of a second conductivity type; and a third semiconductor region of the first conductivity type and a fourth semiconductor region of the second conductivity type for forming the peripheral circuit, the third and fourth semiconductor regions being formed in the second semiconductor region; wherein in that the impurity concentration of the first semiconductor region is higher than the impurity concentration of the third semiconductor region.
    Type: Application
    Filed: April 27, 2005
    Publication date: February 14, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Seiichi Tamura, Hiroshi Yuzurihara, Takeshi Ichikawa, Ryuichi Mishima
  • Patent number: 7323731
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: January 29, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
  • Publication number: 20070205439
    Abstract: An image pickup apparatus of the present invention includes a plurality of photoelectric conversion elements disposed on a semiconductor substrate, a multi-layer wiring structure including a plurality of interlayer insulation films disposed above the semiconductor substrate, and a passiation layer disposed above the multi-layer wiring structure. A first insulation layer is disposed below the under surface of the passiation layer; a second insulation layer is disposed above the top surface of the passiation layer; and the refractive indices of the passiation layer and the first insulation layer differ from each other, and the refractive indices of the passiation layer and the second insulation layer differ from each other. Moreover, planarization processing is performed to at least one layer of the interlayer insulation films and the first insulation layer.
    Type: Application
    Filed: March 1, 2007
    Publication date: September 6, 2007
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Akira Okita, Hiroki Hiyama, Ryuichi Mishima, Asako Ura
  • Patent number: 7205523
    Abstract: The solid state image pickup device includes a pixel, the pixel including: a photoelectric conversion region for generating carrier by photoelectric conversion and accumulating the carrier; a carrier holding region for accumulating carrier flowing out from the photoelectric conversion region during the photoelectric conversion region generates and accumulates carrier; a source follower amplifier SF-MOS for amplifying carrier; a transfer MOS transistor Tx-MOS for transferring the carrier accumulated in the photoelectric conversion region to the source follower amplifier SF-MOS; and a transfer MOS transistor Ty-MOS for transferring the carrier accumulated in the carrier holding region to the source follower amplifier SF-MOS. The carrier holding region is formed so as to have a trench structure.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: April 17, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Seiichi Tamura, Koichi Tazoe
  • Publication number: 20060208160
    Abstract: The solid state image pickup device includes a pixel, the pixel including: a photoelectric conversion region for generating carrier by photoelectric conversion and accumulating the carrier; a carrier holding region for accumulating carrier flowing out from the photoelectric conversion region during the photoelectric conversion region generates and accumulates carrier; a source follower amplifier SF-MOS for amplifying carrier; a transfer MOS transistor Tx-MOS for transferring the carrier accumulated in the photoelectric conversion region to the source follower amplifier SF-MOS; and a transfer MOS transistor Ty-MOS for transferring the carrier accumulated in the carrier holding region to the source follower amplifier SF-MOS. The carrier holding region is formed so as to have a trench structure.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 21, 2006
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ryuichi Mishima, Seiichi Tamura, Koichi Tazoe
  • Publication number: 20060141655
    Abstract: It is an object of the present invention to provide a manufacturing method of a photoelectric conversion device in which no plane channeling is produced even if ions are injected at a certain elevation angle into a semiconductor substrate surface made of silicon. A manufacturing method of a photoelectric conversion device including a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate, wherein the principal plane has an off-angle forming each angle ? with at least two planes perpendicular to a reference (100) plane within a range of 3.5°???4.5°, and an ion injecting direction for forming an semiconductor region constituting the photoelectric conversion element forms an angle ? to a direction perpendicular to the principal plane within a range of 0°<??45°, and further a direction of a projection of the ion injecting direction to the principal plane forms each angle ? with the two plane direction within a range of 0°<?<90°.
    Type: Application
    Filed: December 28, 2005
    Publication date: June 29, 2006
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Seiichi Tamura, Hiroshi Yuzurihara, Shigeru Nishimura, Ryuichi Mishima, Yasushi Nakata
  • Publication number: 20060049476
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 9, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima