Patents by Inventor Ryuji Kyushima

Ryuji Kyushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10695015
    Abstract: The present embodiment relates to a radiation imaging system and the like provided with a solid-state imaging device having a structure enabling reduction of linear noise appearing in an integrated image. The solid-state imaging device comprises: L pieces of imaging pixel region arranged along a direction crossing a moving direction of a relative position of the solid-state imaging device; and L pieces of A/D converter provided corresponding to the L pieces of imaging pixel region. Each imaging pixel region includes pixels arranged two-dimensionally to form an M-row by N-column matrix. Any one of the L pieces of A/D converter executes a dummy A/D conversion once or more times after an A/D conversion of an electric signal from a pixel of an m-th row, before an A/D conversion of an electric signal from a pixel of an (m+1)-th row.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: June 30, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Junichi Sawada, Ryuji Kyushima, Haruyoshi Okada, Kazuki Fujita, Harumichi Mori
  • Patent number: 10685991
    Abstract: A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: June 16, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
  • Patent number: 10498995
    Abstract: A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: December 3, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Junichi Sawada, Harumichi Mori
  • Publication number: 20190167214
    Abstract: The present embodiment relates to a radiation imaging system and the like provided with a solid-state imaging device having a structure enabling reduction of linear noise appearing in an integrated image. The solid-state imaging device comprises: L pieces of imaging pixel region arranged along a direction crossing a moving direction of a relative position of the solid-state imaging device; and L pieces of A/D converter provided corresponding to the L pieces of imaging pixel region. Each imaging pixel region includes pixels arranged two-dimensionally to form an M-row by N-column matrix. Any one of the L pieces of A/D converter executes a dummy A/D conversion once or more times after an A/D conversion of an electric signal from a pixel of an m-th row, before an A/D conversion of an electric signal from a pixel of an (m+1)-th row.
    Type: Application
    Filed: August 9, 2017
    Publication date: June 6, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Junichi SAWADA, Ryuji KYUSHIMA, Haruyoshi OKADA, Kazuki FUJITA, Harumichi MORI
  • Patent number: 10225491
    Abstract: A solid-state imaging device includes a photodetecting unit including MN pixels arrayed two-dimensionally in M rows and N columns, an output unit outputting a digital value generated on the basis of the amount of charge input from the pixels, and a control unit. The control unit divides the MN pixels in the photodetecting unit into unit regions each including pixels in Q rows and R columns, divides the unit regions arrayed two-dimensionally in (M/Q) rows and (N/R) columns into binning regions each including unit regions in K rows and one column, and repeatedly outputs the digital value according to the sum of amounts of the charges output from KQR pixels included in each binning region from the output unit K times in a column order for each row sequentially for the binning regions arrayed two-dimensionally in (M/KQ) rows and (N/R) columns.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: March 5, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji Kyushima, Kazuki Fujita, Haruyoshi Okada, Junichi Sawada, Harumichi Mori
  • Publication number: 20180374882
    Abstract: A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.
    Type: Application
    Filed: August 6, 2018
    Publication date: December 27, 2018
    Inventors: Kazuki FUJITA, Ryuji KYUSHIMA, Harumichi MORI
  • Patent number: 10090341
    Abstract: A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: October 2, 2018
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
  • Publication number: 20180070037
    Abstract: A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.
    Type: Application
    Filed: October 27, 2017
    Publication date: March 8, 2018
    Inventors: Kazuki FUJITA, Ryuji KYUSHIMA, Junichi SAWADA, Harumichi MORI
  • Patent number: 9848151
    Abstract: A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: December 19, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Junichi Sawada, Harumichi Mori
  • Publication number: 20170187967
    Abstract: A solid-state imaging device includes a photodetecting unit including MN pixels arrayed two-dimensionally in M rows and N columns, an output unit outputting a digital value generated on the basis of the amount of charge input from the pixels, and a control unit. The control unit divides the MN pixels in the photodetecting unit into unit regions each including pixels in Q rows and R columns, divides the unit regions arrayed two-dimensionally in (M/Q) rows and (N/R) columns into binning regions each including unit regions in K rows and one column, and repeatedly outputs the digital value according to the sum of amounts of the charges output from KQR pixels included in each binning region from the output unit K times in a column order for each row sequentially for the binning regions arrayed two-dimensionally in (M/KQ) rows and (N/R) columns.
    Type: Application
    Filed: July 9, 2015
    Publication date: June 29, 2017
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji KYUSHIMA, Kazuki FUJITA, Haruyoshi OKADA, Junichi SAWADA, Harumichi MORI
  • Patent number: 9571766
    Abstract: A solid-state imaging device includes a sensor panel section and a readout circuit section. The sensor panel section is disposed on a glass substrate and has a photodetecting section including pixels arrayed in M rows and N columns, row selection lines, and readout lines. The readout circuit section is disposed on a substrate and has N integration circuits. Rectifier circuits are connected between nodes, between N panel-side connection points and the integration circuits, and a constant potential line. Circuit elements having resistance components are connected between the nodes and readout lines.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: February 14, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
  • Patent number: 9478683
    Abstract: A sensor unit includes a metallic base member, a solid-state imaging element, and amplifier chips. The base member has a first placement surface and a second placement surface. The solid-state imaging element has a photodetecting surface, and is disposed on the first placement surface such that a rear surface and the first placement surface face each other. The amplifier chips are mounted on a substrate disposed on the second placement surface. The base member further has side wall portions facing side surfaces of the solid-state imaging element. The chips and the solid-state imaging element are electrically connected to one another via a bonding wire. The chips are thermally coupled to the base member via a thermal via of the substrate.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: October 25, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori, Haruyoshi Okada, Junichi Sawada
  • Patent number: 9369643
    Abstract: A vertical shift register section includes M logic circuits for outputting row selection control signals respectively to M row selection wiring lines and shift register circuits disposed for every two row selection wiring lines. The M logic circuits, when a binning control signal Vbin1 or Vbin2 and an output signal of the shift register circuit both have significant values, output a row selection control signal Vsel so as to close a readout switch. The vertical shift register section, by controlling the timing at which the binning control signals Vbin1 and Vbin2 take significant values, realizes a normal operation mode for successively selecting the two row selection wiring lines and a binning operation mode for simultaneously selecting the two row selection wiring lines. Accordingly, a vertical binning operation is realized by a small vertical shift register.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: June 14, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji Kyushima, Kazuki Fujita, Harumichi Mori
  • Publication number: 20160126269
    Abstract: A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.
    Type: Application
    Filed: May 29, 2014
    Publication date: May 5, 2016
    Inventors: Kazuki FUJITA, Ryuji KYUSHIMA, Harumichi MORI
  • Publication number: 20160127668
    Abstract: A solid-state imaging device includes a sensor panel section and a readout circuit section. The sensor panel section is disposed on a glass substrate and has a photodetecting section including pixels arrayed in M rows and N columns, row selection lines, and readout lines. The readout circuit section is disposed on a substrate and has N integration circuits. Rectifier circuits are connected between nodes, between N panel-side connection points and the integration circuits, and a constant potential line. Circuit elements having resistance components are connected between the nodes and readout lines.
    Type: Application
    Filed: May 29, 2014
    Publication date: May 5, 2016
    Inventors: Kazuki FUJITA, Ryuji KYUSHIMA, Harumichi MORI
  • Publication number: 20160119565
    Abstract: A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.
    Type: Application
    Filed: May 28, 2014
    Publication date: April 28, 2016
    Inventors: Kazuki FUJITA, Ryuji KYUSHIMA, Junichi SAWADA, Harumichi MORI
  • Patent number: 9225924
    Abstract: A controlling section causes a charge of a photodiode to be output to an integration circuit by bringing a readout switch into a connected state, and then brings the readout switch into a non-connected state. Thereafter, a voltage value is output to a holding circuit from the integration circuit. After carrying out the output operation mentioned above, an operation for causing a charge held in an integrating capacitive element to be discharged, and bringing the readout switch into a connected state to cause a charge held in the photodiode to be discharged and an operation for causing voltage values held in the holding circuits to be sequentially output are carried out in parallel. Accordingly, a solid-state imaging device and a method of driving it capable of solving the problems due to a memory effect, a delay effect, and switching noise are realized.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: December 29, 2015
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji Kyushima, Kazuki Fujita, Harumichi Mori
  • Patent number: 9197826
    Abstract: Charges accumulated in pixels contained in one or a plurality of readout object rows that form a partial region of a photodetecting region are selectively read out in each of the L times (L is an integer not less than 2) of imaging frames, and in each of the L times of imaging frames, resetting of charges accumulated in pixels contained in only a part of non-readout object rows is performed, as well as, resetting is performed at least once in a period of the L times of imaging frames for each of the two or more non-readout object rows. Accordingly, a control method for a solid-state imaging element capable of reducing the time required per one imaging frame and reducing load on the peripheral circuit when selectively reading out charges accumulated in pixels in a partial region of the photodetecting region is realized.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: November 24, 2015
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
  • Patent number: 9191601
    Abstract: A controlling section causes a charge of a photodiode to be output to an integration circuit by bringing a readout switch into a connected state, and then brings the readout switch into a non-connected state. Thereafter, a voltage value is output to a holding circuit from the integration circuit. After carrying out the output operation mentioned above, an operation for causing a charge held in an integrating capacitive element to be discharged, and bringing the readout switch into a connected state to cause a charge held in the photodiode to be discharged and an operation for causing voltage values held in the holding circuits to be sequentially output are carried out in parallel. Accordingly, a solid-state imaging device and a method of driving it capable of solving the problems due to a memory effect, a delay effect, and switching noise are realized.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: November 17, 2015
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji Kyushima, Kazuki Fujita, Harumichi Mori
  • Patent number: 9191602
    Abstract: A controlling section, by bringing readout switches of pixels of a certain row out of the M rows into a connected state, causes charges generated in the row to be input to integration circuits, causes first holding circuits to hold voltage values output from the integration circuits, and then brings transfer switches into a connected state to transfer the voltage values to the second holding circuits, and thereafter performs in parallel an operation for causing the voltage values to be sequentially output from the second holding circuits and an operation for, by bringing readout switches of pixels of another row into a connected state, causing charges generated in the row to be input to the integration circuits. Accordingly, a solid-state imaging device and a driving method thereof capable of suppressing variations in output characteristics, while solving the problem due to a delay effect are realized.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: November 17, 2015
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji Kyushima, Kazuki Fujita, Harumichi Mori